drm/ast: Only warn about unsupported TX chips on Gen4 and later
[drm/drm-misc.git] / arch / riscv / include / asm / mmu_context.h
blob8c4bc49a3a0f5b8949a030e9ae7421052136ae34
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2012 Regents of the University of California
4 * Copyright (C) 2017 SiFive
5 */
7 #ifndef _ASM_RISCV_MMU_CONTEXT_H
8 #define _ASM_RISCV_MMU_CONTEXT_H
10 #include <linux/mm_types.h>
11 #include <asm-generic/mm_hooks.h>
13 #include <linux/mm.h>
14 #include <linux/sched.h>
16 void switch_mm(struct mm_struct *prev, struct mm_struct *next,
17 struct task_struct *task);
19 #define activate_mm activate_mm
20 static inline void activate_mm(struct mm_struct *prev,
21 struct mm_struct *next)
23 #ifdef CONFIG_RISCV_ISA_SUPM
24 next->context.pmlen = 0;
25 #endif
26 switch_mm(prev, next, NULL);
29 #define init_new_context init_new_context
30 static inline int init_new_context(struct task_struct *tsk,
31 struct mm_struct *mm)
33 #ifdef CONFIG_MMU
34 atomic_long_set(&mm->context.id, 0);
35 #endif
36 if (IS_ENABLED(CONFIG_RISCV_ISA_SUPM))
37 clear_bit(MM_CONTEXT_LOCK_PMLEN, &mm->context.flags);
38 return 0;
41 DECLARE_STATIC_KEY_FALSE(use_asid_allocator);
43 #ifdef CONFIG_RISCV_ISA_SUPM
44 #define mm_untag_mask mm_untag_mask
45 static inline unsigned long mm_untag_mask(struct mm_struct *mm)
47 return -1UL >> mm->context.pmlen;
49 #endif
51 #include <asm-generic/mmu_context.h>
53 #endif /* _ASM_RISCV_MMU_CONTEXT_H */