arch/riscv/include/uapi/asm/ptrace.h

   1 /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
   2 /*
   3  * Copyright (C) 2012 Regents of the University of California
   4  */
   5
   6 #ifndef _UAPI_ASM_RISCV_PTRACE_H
   7 #define _UAPI_ASM_RISCV_PTRACE_H
   8
   9 #ifndef __ASSEMBLY__
  10
  11 #include <linux/types.h>
  12
  13 #define PTRACE_GETFDPIC         33
  14
  15 #define PTRACE_GETFDPIC_EXEC    0
  16 #define PTRACE_GETFDPIC_INTERP  1
  17
  18 /*
  19  * User-mode register state for core dumps, ptrace, sigcontext
  20  *
  21  * This decouples struct pt_regs from the userspace ABI.
  22  * struct user_regs_struct must form a prefix of struct pt_regs.
  23  */
  24 struct user_regs_struct {
  25         unsigned long pc;
  26         unsigned long ra;
  27         unsigned long sp;
  28         unsigned long gp;
  29         unsigned long tp;
  30         unsigned long t0;
  31         unsigned long t1;
  32         unsigned long t2;
  33         unsigned long s0;
  34         unsigned long s1;
  35         unsigned long a0;
  36         unsigned long a1;
  37         unsigned long a2;
  38         unsigned long a3;
  39         unsigned long a4;
  40         unsigned long a5;
  41         unsigned long a6;
  42         unsigned long a7;
  43         unsigned long s2;
  44         unsigned long s3;
  45         unsigned long s4;
  46         unsigned long s5;
  47         unsigned long s6;
  48         unsigned long s7;
  49         unsigned long s8;
  50         unsigned long s9;
  51         unsigned long s10;
  52         unsigned long s11;
  53         unsigned long t3;
  54         unsigned long t4;
  55         unsigned long t5;
  56         unsigned long t6;
  57 };
  58
  59 struct __riscv_f_ext_state {
  60         __u32 f[32];
  61         __u32 fcsr;
  62 };
  63
  64 struct __riscv_d_ext_state {
  65         __u64 f[32];
  66         __u32 fcsr;
  67 };
  68
  69 struct __riscv_q_ext_state {
  70         __u64 f[64] __attribute__((aligned(16)));
  71         __u32 fcsr;
  72         /*
  73          * Reserved for expansion of sigcontext structure.  Currently zeroed
  74          * upon signal, and must be zero upon sigreturn.
  75          */
  76         __u32 reserved[3];
  77 };
  78
  79 struct __riscv_ctx_hdr {
  80         __u32 magic;
  81         __u32 size;
  82 };
  83
  84 struct __riscv_extra_ext_header {
  85         __u32 __padding[129] __attribute__((aligned(16)));
  86         /*
  87          * Reserved for expansion of sigcontext structure.  Currently zeroed
  88          * upon signal, and must be zero upon sigreturn.
  89          */
  90         __u32 reserved;
  91         struct __riscv_ctx_hdr hdr;
  92 };
  93
  94 union __riscv_fp_state {
  95         struct __riscv_f_ext_state f;
  96         struct __riscv_d_ext_state d;
  97         struct __riscv_q_ext_state q;
  98 };
  99
 100 struct __riscv_v_ext_state {
 101         unsigned long vstart;
 102         unsigned long vl;
 103         unsigned long vtype;
 104         unsigned long vcsr;
 105         unsigned long vlenb;
 106         void *datap;
 107         /*
 108          * In signal handler, datap will be set a correct user stack offset
 109          * and vector registers will be copied to the address of datap
 110          * pointer.
 111          */
 112 };
 113
 114 struct __riscv_v_regset_state {
 115         unsigned long vstart;
 116         unsigned long vl;
 117         unsigned long vtype;
 118         unsigned long vcsr;
 119         unsigned long vlenb;
 120         char vreg[];
 121 };
 122
 123 /*
 124  * According to spec: The number of bits in a single vector register,
 125  * VLEN >= ELEN, which must be a power of 2, and must be no greater than
 126  * 2^16 = 65536bits = 8192bytes
 127  */
 128 #define RISCV_MAX_VLENB (8192)
 129
 130 #endif /* __ASSEMBLY__ */
 131
 132 #endif /* _UAPI_ASM_RISCV_PTRACE_H */