drm/rockchip: vop2: Fix the windows switch between different layers
[drm/drm-misc.git] / arch / sparc / include / asm / io_32.h
blob549f0a72280d337bcd537122bf4a5851ab2e11a4
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __SPARC_IO_H
3 #define __SPARC_IO_H
5 #include <linux/kernel.h>
6 #include <linux/ioport.h> /* struct resource */
8 #define IO_SPACE_LIMIT 0xffffffff
10 #define memset_io(d,c,sz) _memset_io(d,c,sz)
11 #define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz)
12 #define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz)
15 * Bus number may be embedded in the higher bits of the physical address.
16 * This is why we have no bus number argument to ioremap().
18 void __iomem *ioremap(phys_addr_t offset, size_t size);
19 void iounmap(volatile void __iomem *addr);
21 #include <asm-generic/io.h>
23 static inline void _memset_io(volatile void __iomem *dst,
24 int c, __kernel_size_t n)
26 volatile void __iomem *d = dst;
28 while (n--) {
29 writeb(c, d);
30 d++;
34 static inline void _memcpy_fromio(void *dst, const volatile void __iomem *src,
35 __kernel_size_t n)
37 char *d = dst;
39 while (n--) {
40 char tmp = readb(src);
41 *d++ = tmp;
42 src++;
46 static inline void _memcpy_toio(volatile void __iomem *dst, const void *src,
47 __kernel_size_t n)
49 const char *s = src;
50 volatile void __iomem *d = dst;
52 while (n--) {
53 char tmp = *s++;
54 writeb(tmp, d);
55 d++;
60 * SBus accessors.
62 * SBus has only one, memory mapped, I/O space.
63 * We do not need to flip bytes for SBus of course.
65 static inline u8 sbus_readb(const volatile void __iomem *addr)
67 return *(__force volatile u8 *)addr;
70 static inline u16 sbus_readw(const volatile void __iomem *addr)
72 return *(__force volatile u16 *)addr;
75 static inline u32 sbus_readl(const volatile void __iomem *addr)
77 return *(__force volatile u32 *)addr;
80 static inline void sbus_writeb(u8 b, volatile void __iomem *addr)
82 *(__force volatile u8 *)addr = b;
85 static inline void sbus_writew(u16 w, volatile void __iomem *addr)
87 *(__force volatile u16 *)addr = w;
90 static inline void sbus_writel(u32 l, volatile void __iomem *addr)
92 *(__force volatile u32 *)addr = l;
95 static inline void sbus_memset_io(volatile void __iomem *__dst, int c,
96 __kernel_size_t n)
98 while(n--) {
99 sbus_writeb(c, __dst);
100 __dst++;
104 static inline void sbus_memcpy_fromio(void *dst,
105 const volatile void __iomem *src,
106 __kernel_size_t n)
108 char *d = dst;
110 while (n--) {
111 char tmp = sbus_readb(src);
112 *d++ = tmp;
113 src++;
117 static inline void sbus_memcpy_toio(volatile void __iomem *dst,
118 const void *src,
119 __kernel_size_t n)
121 const char *s = src;
122 volatile void __iomem *d = dst;
124 while (n--) {
125 char tmp = *s++;
126 sbus_writeb(tmp, d);
127 d++;
131 /* Create a virtual mapping cookie for an IO port range */
132 void __iomem *ioport_map(unsigned long port, unsigned int nr);
133 void ioport_unmap(void __iomem *);
135 /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
136 struct pci_dev;
137 void pci_iounmap(struct pci_dev *dev, void __iomem *);
139 static inline int sbus_can_dma_64bit(void)
141 return 0; /* actually, sparc_cpu_model==sun4d */
143 static inline int sbus_can_burst64(void)
145 return 0; /* actually, sparc_cpu_model==sun4d */
147 struct device;
148 void sbus_set_sbus64(struct device *, int);
150 #define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1
153 #endif /* !(__SPARC_IO_H) */