drm/rockchip: vop2: Fix the windows switch between different layers
[drm/drm-misc.git] / arch / sparc / kernel / vmlinux.lds.S
blobf1b86eb3034043ff9e9d568d4dcdb111b9b92dd6
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* ld script for sparc32/sparc64 kernel */
4 #include <asm-generic/vmlinux.lds.h>
6 #include <asm/page.h>
7 #include <asm/thread_info.h>
9 #ifdef CONFIG_SPARC32
10 #define INITIAL_ADDRESS  0x10000 + SIZEOF_HEADERS
11 #define TEXTSTART       0xf0004000
13 #define SMP_CACHE_BYTES_SHIFT 5
15 #else
16 #define SMP_CACHE_BYTES_SHIFT 6
17 #define INITIAL_ADDRESS 0x4000
18 #define TEXTSTART      0x0000000000404000
20 #endif
22 #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)
24 #ifdef CONFIG_SPARC32
25 OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
26 OUTPUT_ARCH(sparc)
27 ENTRY(_start)
28 jiffies = jiffies_64 + 4;
29 #else
30 /* sparc64 */
31 OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
32 OUTPUT_ARCH(sparc:v9a)
33 ENTRY(_start)
34 jiffies = jiffies_64;
35 #endif
37 #ifdef CONFIG_SPARC64
38 ASSERT((swapper_tsb == 0x0000000000408000), "Error: sparc64 early assembler too large")
39 #endif
41 SECTIONS
43 #ifdef CONFIG_SPARC64
44         swapper_pg_dir = 0x0000000000402000;
45 #endif
46         . = INITIAL_ADDRESS;
47         .text TEXTSTART :
48         {
49                 _text = .;
50                 HEAD_TEXT
51                 ALIGN_FUNCTION();
52 #ifdef CONFIG_SPARC64
53                 /* Match text section symbols in head_64.S first */
54                 *head_64.o(.text)
55 #endif
56                 TEXT_TEXT
57                 SCHED_TEXT
58                 LOCK_TEXT
59                 KPROBES_TEXT
60                 IRQENTRY_TEXT
61                 SOFTIRQENTRY_TEXT
62                 *(.gnu.warning)
63         } = 0
64         _etext = .;
66         RO_DATA(PAGE_SIZE)
68         /* Start of data section */
69         _sdata = .;
71         .data1 : {
72                 *(.data1)
73         }
74         RW_DATA(SMP_CACHE_BYTES, 0, THREAD_SIZE)
76         /* End of data section */
77         _edata = .;
79         .fixup : {
80                 __start___fixup = .;
81                 *(.fixup)
82                 __stop___fixup = .;
83         }
84         EXCEPTION_TABLE(16)
86         . = ALIGN(PAGE_SIZE);
87         __init_begin = ALIGN(PAGE_SIZE);
88         INIT_TEXT_SECTION(PAGE_SIZE)
89         __init_text_end = .;
90         INIT_DATA_SECTION(16)
92         . = ALIGN(4);
93         .tsb_ldquad_phys_patch : {
94                 __tsb_ldquad_phys_patch = .;
95                 *(.tsb_ldquad_phys_patch)
96                 __tsb_ldquad_phys_patch_end = .;
97         }
99         .tsb_phys_patch : {
100                 __tsb_phys_patch = .;
101                 *(.tsb_phys_patch)
102                 __tsb_phys_patch_end = .;
103         }
105         .cpuid_patch : {
106                 __cpuid_patch = .;
107                 *(.cpuid_patch)
108                 __cpuid_patch_end = .;
109         }
111         .sun4v_1insn_patch : {
112                 __sun4v_1insn_patch = .;
113                 *(.sun4v_1insn_patch)
114                 __sun4v_1insn_patch_end = .;
115         }
116         .sun4v_2insn_patch : {
117                 __sun4v_2insn_patch = .;
118                 *(.sun4v_2insn_patch)
119                 __sun4v_2insn_patch_end = .;
120         }
121         .leon_1insn_patch : {
122                 __leon_1insn_patch = .;
123                 *(.leon_1insn_patch)
124                 __leon_1insn_patch_end = .;
125         }
126         .swapper_tsb_phys_patch : {
127                 __swapper_tsb_phys_patch = .;
128                 *(.swapper_tsb_phys_patch)
129                 __swapper_tsb_phys_patch_end = .;
130         }
131         .swapper_4m_tsb_phys_patch : {
132                 __swapper_4m_tsb_phys_patch = .;
133                 *(.swapper_4m_tsb_phys_patch)
134                 __swapper_4m_tsb_phys_patch_end = .;
135         }
136         .popc_3insn_patch : {
137                 __popc_3insn_patch = .;
138                 *(.popc_3insn_patch)
139                 __popc_3insn_patch_end = .;
140         }
141         .popc_6insn_patch : {
142                 __popc_6insn_patch = .;
143                 *(.popc_6insn_patch)
144                 __popc_6insn_patch_end = .;
145         }
146         .pause_3insn_patch : {
147                 __pause_3insn_patch = .;
148                 *(.pause_3insn_patch)
149                 __pause_3insn_patch_end = .;
150         }
151         .sun_m7_1insn_patch : {
152                 __sun_m7_1insn_patch = .;
153                 *(.sun_m7_1insn_patch)
154                 __sun_m7_1insn_patch_end = .;
155         }
156         .sun_m7_2insn_patch : {
157                 __sun_m7_2insn_patch = .;
158                 *(.sun_m7_2insn_patch)
159                 __sun_m7_2insn_patch_end = .;
160         }
161         .get_tick_patch : {
162                 __get_tick_patch = .;
163                 *(.get_tick_patch)
164                 __get_tick_patch_end = .;
165         }
166         .pud_huge_patch : {
167                 __pud_huge_patch = .;
168                 *(.pud_huge_patch)
169                 __pud_huge_patch_end = .;
170         }
171         .fast_win_ctrl_1insn_patch : {
172                 __fast_win_ctrl_1insn_patch = .;
173                 *(.fast_win_ctrl_1insn_patch)
174                 __fast_win_ctrl_1insn_patch_end = .;
175         }
176         PERCPU_SECTION(SMP_CACHE_BYTES)
178         . = ALIGN(PAGE_SIZE);
179         .exit.text : {
180                 EXIT_TEXT
181         }
183         .exit.data : {
184                 EXIT_DATA
185         }
187         . = ALIGN(PAGE_SIZE);
188         __init_end = .;
189         BSS_SECTION(0, 0, 0)
190         _end = . ;
192         STABS_DEBUG
193         DWARF_DEBUG
194         ELF_DETAILS
196         DISCARDS