1 /* SPDX-License-Identifier: GPL-2.0 */
3 * ld script for the x86 kernel
5 * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
7 * Modernisation, unification and other changes and fixes:
8 * Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org>
11 * Don't define absolute symbols until and unless you know that symbol
12 * value is should remain constant even if kernel image is relocated
13 * at run time. Absolute symbols are not relocated. If symbol value should
14 * change if kernel is relocated, make the symbol section relative and
15 * put it inside the section definition.
18 #define LOAD_OFFSET __START_KERNEL_map
20 #define RUNTIME_DISCARD_EXIT
22 #define RO_EXCEPTION_TABLE_ALIGN 16
24 #include <asm-generic/vmlinux.lds.h>
25 #include <asm/asm-offsets.h>
26 #include <asm/thread_info.h>
27 #include <asm/page_types.h>
28 #include <asm/orc_lookup.h>
29 #include <asm/cache.h>
32 #undef i386 /* in case the preprocessor is a 32bit one */
34 OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT)
38 ENTRY(phys_startup_32)
40 OUTPUT_ARCH(i386:x86-64)
41 ENTRY(phys_startup_64)
45 const_pcpu_hot = pcpu_hot;
47 #if defined(CONFIG_X86_64)
49 * On 64-bit, align RODATA to 2MB so we retain large page mappings for
50 * boundaries spanning kernel text, rodata and data sections.
52 * However, kernel identity mappings will have different RWX permissions
53 * to the pages mapping to text and to the pages padding (which are freed) the
54 * text section. Hence kernel identity mappings will be broken to smaller
55 * pages. For 64-bit, kernel text and kernel identity mappings are different,
56 * so we can enable protection checks as well as retain 2MB large page
57 * mappings for kernel text.
59 #define X86_ALIGN_RODATA_BEGIN . = ALIGN(HPAGE_SIZE);
61 #define X86_ALIGN_RODATA_END \
62 . = ALIGN(HPAGE_SIZE); \
63 __end_rodata_hpage_align = .; \
64 __end_rodata_aligned = .;
66 #define ALIGN_ENTRY_TEXT_BEGIN . = ALIGN(PMD_SIZE);
67 #define ALIGN_ENTRY_TEXT_END . = ALIGN(PMD_SIZE);
70 * This section contains data which will be mapped as decrypted. Memory
71 * encryption operates on a page basis. Make this section PMD-aligned
72 * to avoid splitting the pages while mapping the section early.
74 * Note: We use a separate section so that only this section gets
75 * decrypted to avoid exposing more than we wish.
77 #define BSS_DECRYPTED \
78 . = ALIGN(PMD_SIZE); \
79 __start_bss_decrypted = .; \
81 . = ALIGN(PAGE_SIZE); \
82 __start_bss_decrypted_unused = .; \
83 . = ALIGN(PMD_SIZE); \
84 __end_bss_decrypted = .; \
88 #define X86_ALIGN_RODATA_BEGIN
89 #define X86_ALIGN_RODATA_END \
90 . = ALIGN(PAGE_SIZE); \
91 __end_rodata_aligned = .;
93 #define ALIGN_ENTRY_TEXT_BEGIN
94 #define ALIGN_ENTRY_TEXT_END
100 text PT_LOAD FLAGS(5); /* R_E */
101 data PT_LOAD FLAGS(6); /* RW_ */
104 percpu PT_LOAD FLAGS(6); /* RW_ */
106 init PT_LOAD FLAGS(7); /* RWE */
108 note PT_NOTE FLAGS(0); /* ___ */
115 phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET);
117 phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET);
120 /* Text and read-only data */
121 .text : AT(ADDR(.text) - LOAD_OFFSET) {
124 /* bootstrapping code */
131 #ifdef CONFIG_MITIGATION_RETPOLINE
132 *(.text..__x86.indirect_thunk)
133 *(.text..__x86.return_thunk)
137 ALIGN_ENTRY_TEXT_BEGIN
138 *(.text..__x86.rethunk_untrain)
141 #ifdef CONFIG_MITIGATION_SRSO
143 * See the comment above srso_alias_untrain_ret()'s
146 . = srso_alias_untrain_ret | (1 << 2) | (1 << 8) | (1 << 14) | (1 << 20);
147 *(.text..__x86.rethunk_safe)
154 /* End of text section, which should occupy whole number of pages */
156 . = ALIGN(PAGE_SIZE);
158 X86_ALIGN_RODATA_BEGIN
163 .data : AT(ADDR(.data) - LOAD_OFFSET) {
164 /* Start of data section */
168 INIT_TASK_DATA(THREAD_SIZE)
170 /* equivalent to task_pt_regs(&init_task) */
171 __top_init_kernel_stack = __end_init_stack - TOP_OF_KERNEL_STACK_PADDING - PTREGS_SIZE;
174 /* 32 bit has nosave before _edata */
178 PAGE_ALIGNED_DATA(PAGE_SIZE)
180 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
185 /* rarely changed data like cpu maps */
186 READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES)
188 /* End of data section */
196 /* Init code and data - will be freed after init */
197 . = ALIGN(PAGE_SIZE);
198 .init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) {
199 __init_begin = .; /* paired with __init_end */
202 #if defined(CONFIG_X86_64) && defined(CONFIG_SMP)
204 * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the
205 * output PHDR, so the next output section - .init.text - should
206 * start another segment - init.
208 PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu)
209 ASSERT(SIZEOF(.data..percpu) < CONFIG_PHYSICAL_START,
210 "per-CPU data too large - increase CONFIG_PHYSICAL_START")
213 INIT_TEXT_SECTION(PAGE_SIZE)
219 * Section for code used exclusively before alternatives are run. All
220 * references to such code must be patched out by alternatives, normally
221 * by using X86_FEATURE_ALWAYS CPU feature bit.
223 * See static_cpu_has() for an example.
225 .altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) {
229 INIT_DATA_SECTION(16)
231 .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {
232 __x86_cpu_dev_start = .;
234 __x86_cpu_dev_end = .;
237 #ifdef CONFIG_X86_INTEL_MID
238 .x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \
240 __x86_intel_mid_dev_start = .;
241 *(.x86_intel_mid_dev.init)
242 __x86_intel_mid_dev_end = .;
246 #ifdef CONFIG_MITIGATION_RETPOLINE
248 * List of instructions that call/jmp/jcc to retpoline thunks
249 * __x86_indirect_thunk_*(). These instructions can be patched along
250 * with alternatives, after which the section can be freed.
253 .retpoline_sites : AT(ADDR(.retpoline_sites) - LOAD_OFFSET) {
254 __retpoline_sites = .;
256 __retpoline_sites_end = .;
260 .return_sites : AT(ADDR(.return_sites) - LOAD_OFFSET) {
263 __return_sites_end = .;
267 .call_sites : AT(ADDR(.call_sites) - LOAD_OFFSET) {
270 __call_sites_end = .;
274 #ifdef CONFIG_X86_KERNEL_IBT
276 .ibt_endbr_seal : AT(ADDR(.ibt_endbr_seal) - LOAD_OFFSET) {
277 __ibt_endbr_seal = .;
279 __ibt_endbr_seal_end = .;
283 #ifdef CONFIG_FINEIBT
285 .cfi_sites : AT(ADDR(.cfi_sites) - LOAD_OFFSET) {
293 * struct alt_inst entries. From the header (alternative.h):
294 * "Alternative instructions for different CPU types or capabilities"
295 * Think locking instructions on spinlocks.
298 .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
299 __alt_instructions = .;
301 __alt_instructions_end = .;
305 * And here are the replacement instructions. The linker sticks
306 * them as binary blobs. The .altinstructions has enough data to
307 * get the address and the length of them to patch the kernel safely.
309 .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) {
310 *(.altinstr_replacement)
314 .apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) {
317 __apicdrivers_end = .;
322 * .exit.text is discarded at runtime, not link time, to deal with
323 * references from .altinstructions
325 .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
329 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
333 #if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP)
334 PERCPU_SECTION(INTERNODE_CACHE_BYTES)
337 RUNTIME_CONST_VARIABLES
338 RUNTIME_CONST(ptr, USER_PTR_MAX)
340 . = ALIGN(PAGE_SIZE);
342 /* freed after init ends here */
343 .init.end : AT(ADDR(.init.end) - LOAD_OFFSET) {
348 * smp_locks might be freed after init
349 * start/end must be page aligned
351 . = ALIGN(PAGE_SIZE);
352 .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
355 . = ALIGN(PAGE_SIZE);
360 .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
366 . = ALIGN(PAGE_SIZE);
367 .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
369 *(.bss..page_aligned)
370 . = ALIGN(PAGE_SIZE);
373 . = ALIGN(PAGE_SIZE);
378 * The memory occupied from _text to here, __end_of_kernel_reserve, is
379 * automatically reserved in setup_arch(). Anything after here must be
380 * explicitly reserved using memblock_reserve() or it will be discarded
381 * and treated as available memory.
383 __end_of_kernel_reserve = .;
385 . = ALIGN(PAGE_SIZE);
386 .brk : AT(ADDR(.brk) - LOAD_OFFSET) {
388 . += 64 * 1024; /* 64k alignment slop space */
389 *(.bss..brk) /* areas brk users have reserved */
393 . = ALIGN(PAGE_SIZE); /* keep VO_INIT_SIZE page aligned */
396 #ifdef CONFIG_AMD_MEM_ENCRYPT
398 * Early scratch/workarea section: Lives outside of the kernel proper
401 * Resides after _end because even though the .brk section is after
402 * __end_of_kernel_reserve, the .brk section is later reserved as a
403 * part of the kernel. Since it is located after __end_of_kernel_reserve
404 * it will be discarded and become part of the available memory. As
405 * such, it can only be used by very early boot code and must not be
408 * Currently used by SME for performing in-place encryption of the
409 * kernel during boot. Resides on a 2MB boundary to simplify the
410 * pagetable setup used for SME in-place encryption.
412 . = ALIGN(HPAGE_SIZE);
413 .init.scratch : AT(ADDR(.init.scratch) - LOAD_OFFSET) {
414 __init_scratch_begin = .;
416 . = ALIGN(HPAGE_SIZE);
417 __init_scratch_end = .;
423 #ifdef CONFIG_PROPELLER_CLANG
424 .llvm_bb_addr_map : { *(.llvm_bb_addr_map) }
432 * Make sure that the .got.plt is either completely empty or it
433 * contains only the lazy dispatch entries.
435 .got.plt (INFO) : { *(.got.plt) }
436 ASSERT(SIZEOF(.got.plt) == 0 ||
438 SIZEOF(.got.plt) == 0x18,
440 SIZEOF(.got.plt) == 0xc,
442 "Unexpected GOT/PLT entries detected!")
445 * Sections that should stay zero sized, which is safer to
446 * explicitly check instead of blindly discarding.
451 ASSERT(SIZEOF(.got) == 0, "Unexpected GOT entries detected!")
454 *(.plt) *(.plt.*) *(.iplt)
456 ASSERT(SIZEOF(.plt) == 0, "Unexpected run-time procedure linkages detected!")
461 ASSERT(SIZEOF(.rel.dyn) == 0, "Unexpected run-time relocations (.rel) detected!")
464 *(.rela.*) *(.rela_*)
466 ASSERT(SIZEOF(.rela.dyn) == 0, "Unexpected run-time relocations (.rela) detected!")
470 * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility:
472 . = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE),
473 "kernel image bigger than KERNEL_IMAGE_SIZE");
475 /* needed for Clang - see arch/x86/entry/entry.S */
476 PROVIDE(__ref_stack_chk_guard = __stack_chk_guard);
480 * Per-cpu symbols which need to be offset from __per_cpu_load
481 * for the boot processor.
483 #define INIT_PER_CPU(x) init_per_cpu__##x = ABSOLUTE(x) + __per_cpu_load
484 INIT_PER_CPU(gdt_page);
485 INIT_PER_CPU(fixed_percpu_data);
486 INIT_PER_CPU(irq_stack_backing_store);
489 . = ASSERT((fixed_percpu_data == 0),
490 "fixed_percpu_data is not at start of per-cpu area");
493 #ifdef CONFIG_MITIGATION_UNRET_ENTRY
494 . = ASSERT((retbleed_return_thunk & 0x3f) == 0, "retbleed_return_thunk not cacheline-aligned");
497 #ifdef CONFIG_MITIGATION_SRSO
498 . = ASSERT((srso_safe_ret & 0x3f) == 0, "srso_safe_ret not cacheline-aligned");
500 * GNU ld cannot do XOR until 2.41.
501 * https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=f6f78318fca803c4907fb8d7f6ded8295f1947b1
503 * LLVM lld cannot do XOR until lld-17.
504 * https://github.com/llvm/llvm-project/commit/fae96104d4378166cbe5c875ef8ed808a356f3fb
506 * Instead do: (A | B) - (A & B) in order to compute the XOR
507 * of the two function addresses:
509 . = ASSERT(((ABSOLUTE(srso_alias_untrain_ret) | srso_alias_safe_ret) -
510 (ABSOLUTE(srso_alias_untrain_ret) & srso_alias_safe_ret)) == ((1 << 2) | (1 << 8) | (1 << 14) | (1 << 20)),
511 "SRSO function pair won't alias");
514 #endif /* CONFIG_X86_64 */
517 * The symbols below are referenced using relative relocations in the
518 * respective ELF notes. This produces build time constants that the
519 * linker will never mark as relocatable. (Using just ABSOLUTE() is not
520 * sufficient for that).
524 xen_elfnote_entry_value =
525 ABSOLUTE(xen_elfnote_entry) + ABSOLUTE(startup_xen);
527 xen_elfnote_hypercall_page_value =
528 ABSOLUTE(xen_elfnote_hypercall_page) + ABSOLUTE(hypercall_page);
531 xen_elfnote_phys32_entry_value =
532 ABSOLUTE(xen_elfnote_phys32_entry) + ABSOLUTE(pvh_start_xen - LOAD_OFFSET);