1 /* SPDX-License-Identifier: GPL-2.0
3 * Copyright 2016-2018 HabanaLabs, Ltd.
8 /************************************
9 ** This is an auto-generated file **
10 ** DO NOT EDIT BELOW **
11 ************************************/
13 #ifndef ASIC_REG_MME6_RTR_REGS_H_
14 #define ASIC_REG_MME6_RTR_REGS_H_
17 *****************************************
18 * MME6_RTR (Prototype: MME_RTR)
19 *****************************************
22 #define mmMME6_RTR_HBW_RD_RQ_E_ARB 0x180100
24 #define mmMME6_RTR_HBW_RD_RQ_W_ARB 0x180104
26 #define mmMME6_RTR_HBW_RD_RQ_N_ARB 0x180108
28 #define mmMME6_RTR_HBW_RD_RQ_S_ARB 0x18010C
30 #define mmMME6_RTR_HBW_RD_RQ_L_ARB 0x180110
32 #define mmMME6_RTR_HBW_E_ARB_MAX 0x180120
34 #define mmMME6_RTR_HBW_W_ARB_MAX 0x180124
36 #define mmMME6_RTR_HBW_N_ARB_MAX 0x180128
38 #define mmMME6_RTR_HBW_S_ARB_MAX 0x18012C
40 #define mmMME6_RTR_HBW_L_ARB_MAX 0x180130
42 #define mmMME6_RTR_HBW_RD_RS_MAX_CREDIT 0x180140
44 #define mmMME6_RTR_HBW_WR_RQ_MAX_CREDIT 0x180144
46 #define mmMME6_RTR_HBW_RD_RQ_MAX_CREDIT 0x180148
48 #define mmMME6_RTR_HBW_RD_RS_E_ARB 0x180150
50 #define mmMME6_RTR_HBW_RD_RS_W_ARB 0x180154
52 #define mmMME6_RTR_HBW_RD_RS_N_ARB 0x180158
54 #define mmMME6_RTR_HBW_RD_RS_S_ARB 0x18015C
56 #define mmMME6_RTR_HBW_RD_RS_L_ARB 0x180160
58 #define mmMME6_RTR_HBW_WR_RQ_E_ARB 0x180170
60 #define mmMME6_RTR_HBW_WR_RQ_W_ARB 0x180174
62 #define mmMME6_RTR_HBW_WR_RQ_N_ARB 0x180178
64 #define mmMME6_RTR_HBW_WR_RQ_S_ARB 0x18017C
66 #define mmMME6_RTR_HBW_WR_RQ_L_ARB 0x180180
68 #define mmMME6_RTR_HBW_WR_RS_E_ARB 0x180190
70 #define mmMME6_RTR_HBW_WR_RS_W_ARB 0x180194
72 #define mmMME6_RTR_HBW_WR_RS_N_ARB 0x180198
74 #define mmMME6_RTR_HBW_WR_RS_S_ARB 0x18019C
76 #define mmMME6_RTR_HBW_WR_RS_L_ARB 0x1801A0
78 #define mmMME6_RTR_LBW_RD_RQ_E_ARB 0x180200
80 #define mmMME6_RTR_LBW_RD_RQ_W_ARB 0x180204
82 #define mmMME6_RTR_LBW_RD_RQ_N_ARB 0x180208
84 #define mmMME6_RTR_LBW_RD_RQ_S_ARB 0x18020C
86 #define mmMME6_RTR_LBW_RD_RQ_L_ARB 0x180210
88 #define mmMME6_RTR_LBW_E_ARB_MAX 0x180220
90 #define mmMME6_RTR_LBW_W_ARB_MAX 0x180224
92 #define mmMME6_RTR_LBW_N_ARB_MAX 0x180228
94 #define mmMME6_RTR_LBW_S_ARB_MAX 0x18022C
96 #define mmMME6_RTR_LBW_L_ARB_MAX 0x180230
98 #define mmMME6_RTR_LBW_SRAM_MAX_CREDIT 0x180240
100 #define mmMME6_RTR_LBW_RD_RS_E_ARB 0x180250
102 #define mmMME6_RTR_LBW_RD_RS_W_ARB 0x180254
104 #define mmMME6_RTR_LBW_RD_RS_N_ARB 0x180258
106 #define mmMME6_RTR_LBW_RD_RS_S_ARB 0x18025C
108 #define mmMME6_RTR_LBW_RD_RS_L_ARB 0x180260
110 #define mmMME6_RTR_LBW_WR_RQ_E_ARB 0x180270
112 #define mmMME6_RTR_LBW_WR_RQ_W_ARB 0x180274
114 #define mmMME6_RTR_LBW_WR_RQ_N_ARB 0x180278
116 #define mmMME6_RTR_LBW_WR_RQ_S_ARB 0x18027C
118 #define mmMME6_RTR_LBW_WR_RQ_L_ARB 0x180280
120 #define mmMME6_RTR_LBW_WR_RS_E_ARB 0x180290
122 #define mmMME6_RTR_LBW_WR_RS_W_ARB 0x180294
124 #define mmMME6_RTR_LBW_WR_RS_N_ARB 0x180298
126 #define mmMME6_RTR_LBW_WR_RS_S_ARB 0x18029C
128 #define mmMME6_RTR_LBW_WR_RS_L_ARB 0x1802A0
130 #define mmMME6_RTR_DBG_E_ARB 0x180300
132 #define mmMME6_RTR_DBG_W_ARB 0x180304
134 #define mmMME6_RTR_DBG_N_ARB 0x180308
136 #define mmMME6_RTR_DBG_S_ARB 0x18030C
138 #define mmMME6_RTR_DBG_L_ARB 0x180310
140 #define mmMME6_RTR_DBG_E_ARB_MAX 0x180320
142 #define mmMME6_RTR_DBG_W_ARB_MAX 0x180324
144 #define mmMME6_RTR_DBG_N_ARB_MAX 0x180328
146 #define mmMME6_RTR_DBG_S_ARB_MAX 0x18032C
148 #define mmMME6_RTR_DBG_L_ARB_MAX 0x180330
150 #define mmMME6_RTR_SPLIT_COEF_0 0x180400
152 #define mmMME6_RTR_SPLIT_COEF_1 0x180404
154 #define mmMME6_RTR_SPLIT_COEF_2 0x180408
156 #define mmMME6_RTR_SPLIT_COEF_3 0x18040C
158 #define mmMME6_RTR_SPLIT_COEF_4 0x180410
160 #define mmMME6_RTR_SPLIT_COEF_5 0x180414
162 #define mmMME6_RTR_SPLIT_COEF_6 0x180418
164 #define mmMME6_RTR_SPLIT_COEF_7 0x18041C
166 #define mmMME6_RTR_SPLIT_COEF_8 0x180420
168 #define mmMME6_RTR_SPLIT_COEF_9 0x180424
170 #define mmMME6_RTR_SPLIT_CFG 0x180440
172 #define mmMME6_RTR_SPLIT_RD_SAT 0x180444
174 #define mmMME6_RTR_SPLIT_RD_RST_TOKEN 0x180448
176 #define mmMME6_RTR_SPLIT_RD_TIMEOUT_0 0x18044C
178 #define mmMME6_RTR_SPLIT_RD_TIMEOUT_1 0x180450
180 #define mmMME6_RTR_SPLIT_WR_SAT 0x180454
182 #define mmMME6_RTR_WPLIT_WR_TST_TOLEN 0x180458
184 #define mmMME6_RTR_SPLIT_WR_TIMEOUT_0 0x18045C
186 #define mmMME6_RTR_SPLIT_WR_TIMEOUT_1 0x180460
188 #define mmMME6_RTR_HBW_RANGE_HIT 0x180470
190 #define mmMME6_RTR_HBW_RANGE_MASK_L_0 0x180480
192 #define mmMME6_RTR_HBW_RANGE_MASK_L_1 0x180484
194 #define mmMME6_RTR_HBW_RANGE_MASK_L_2 0x180488
196 #define mmMME6_RTR_HBW_RANGE_MASK_L_3 0x18048C
198 #define mmMME6_RTR_HBW_RANGE_MASK_L_4 0x180490
200 #define mmMME6_RTR_HBW_RANGE_MASK_L_5 0x180494
202 #define mmMME6_RTR_HBW_RANGE_MASK_L_6 0x180498
204 #define mmMME6_RTR_HBW_RANGE_MASK_L_7 0x18049C
206 #define mmMME6_RTR_HBW_RANGE_MASK_H_0 0x1804A0
208 #define mmMME6_RTR_HBW_RANGE_MASK_H_1 0x1804A4
210 #define mmMME6_RTR_HBW_RANGE_MASK_H_2 0x1804A8
212 #define mmMME6_RTR_HBW_RANGE_MASK_H_3 0x1804AC
214 #define mmMME6_RTR_HBW_RANGE_MASK_H_4 0x1804B0
216 #define mmMME6_RTR_HBW_RANGE_MASK_H_5 0x1804B4
218 #define mmMME6_RTR_HBW_RANGE_MASK_H_6 0x1804B8
220 #define mmMME6_RTR_HBW_RANGE_MASK_H_7 0x1804BC
222 #define mmMME6_RTR_HBW_RANGE_BASE_L_0 0x1804C0
224 #define mmMME6_RTR_HBW_RANGE_BASE_L_1 0x1804C4
226 #define mmMME6_RTR_HBW_RANGE_BASE_L_2 0x1804C8
228 #define mmMME6_RTR_HBW_RANGE_BASE_L_3 0x1804CC
230 #define mmMME6_RTR_HBW_RANGE_BASE_L_4 0x1804D0
232 #define mmMME6_RTR_HBW_RANGE_BASE_L_5 0x1804D4
234 #define mmMME6_RTR_HBW_RANGE_BASE_L_6 0x1804D8
236 #define mmMME6_RTR_HBW_RANGE_BASE_L_7 0x1804DC
238 #define mmMME6_RTR_HBW_RANGE_BASE_H_0 0x1804E0
240 #define mmMME6_RTR_HBW_RANGE_BASE_H_1 0x1804E4
242 #define mmMME6_RTR_HBW_RANGE_BASE_H_2 0x1804E8
244 #define mmMME6_RTR_HBW_RANGE_BASE_H_3 0x1804EC
246 #define mmMME6_RTR_HBW_RANGE_BASE_H_4 0x1804F0
248 #define mmMME6_RTR_HBW_RANGE_BASE_H_5 0x1804F4
250 #define mmMME6_RTR_HBW_RANGE_BASE_H_6 0x1804F8
252 #define mmMME6_RTR_HBW_RANGE_BASE_H_7 0x1804FC
254 #define mmMME6_RTR_LBW_RANGE_HIT 0x180500
256 #define mmMME6_RTR_LBW_RANGE_MASK_0 0x180510
258 #define mmMME6_RTR_LBW_RANGE_MASK_1 0x180514
260 #define mmMME6_RTR_LBW_RANGE_MASK_2 0x180518
262 #define mmMME6_RTR_LBW_RANGE_MASK_3 0x18051C
264 #define mmMME6_RTR_LBW_RANGE_MASK_4 0x180520
266 #define mmMME6_RTR_LBW_RANGE_MASK_5 0x180524
268 #define mmMME6_RTR_LBW_RANGE_MASK_6 0x180528
270 #define mmMME6_RTR_LBW_RANGE_MASK_7 0x18052C
272 #define mmMME6_RTR_LBW_RANGE_MASK_8 0x180530
274 #define mmMME6_RTR_LBW_RANGE_MASK_9 0x180534
276 #define mmMME6_RTR_LBW_RANGE_MASK_10 0x180538
278 #define mmMME6_RTR_LBW_RANGE_MASK_11 0x18053C
280 #define mmMME6_RTR_LBW_RANGE_MASK_12 0x180540
282 #define mmMME6_RTR_LBW_RANGE_MASK_13 0x180544
284 #define mmMME6_RTR_LBW_RANGE_MASK_14 0x180548
286 #define mmMME6_RTR_LBW_RANGE_MASK_15 0x18054C
288 #define mmMME6_RTR_LBW_RANGE_BASE_0 0x180550
290 #define mmMME6_RTR_LBW_RANGE_BASE_1 0x180554
292 #define mmMME6_RTR_LBW_RANGE_BASE_2 0x180558
294 #define mmMME6_RTR_LBW_RANGE_BASE_3 0x18055C
296 #define mmMME6_RTR_LBW_RANGE_BASE_4 0x180560
298 #define mmMME6_RTR_LBW_RANGE_BASE_5 0x180564
300 #define mmMME6_RTR_LBW_RANGE_BASE_6 0x180568
302 #define mmMME6_RTR_LBW_RANGE_BASE_7 0x18056C
304 #define mmMME6_RTR_LBW_RANGE_BASE_8 0x180570
306 #define mmMME6_RTR_LBW_RANGE_BASE_9 0x180574
308 #define mmMME6_RTR_LBW_RANGE_BASE_10 0x180578
310 #define mmMME6_RTR_LBW_RANGE_BASE_11 0x18057C
312 #define mmMME6_RTR_LBW_RANGE_BASE_12 0x180580
314 #define mmMME6_RTR_LBW_RANGE_BASE_13 0x180584
316 #define mmMME6_RTR_LBW_RANGE_BASE_14 0x180588
318 #define mmMME6_RTR_LBW_RANGE_BASE_15 0x18058C
320 #define mmMME6_RTR_RGLTR 0x180590
322 #define mmMME6_RTR_RGLTR_WR_RESULT 0x180594
324 #define mmMME6_RTR_RGLTR_RD_RESULT 0x180598
326 #define mmMME6_RTR_SCRAMB_EN 0x180600
328 #define mmMME6_RTR_NON_LIN_SCRAMB 0x180604
330 #endif /* ASIC_REG_MME6_RTR_REGS_H_ */