drivers/accel/habanalabs/include/hw_ip/mmu/mmu_general.h

   1 /* SPDX-License-Identifier: GPL-2.0
   2  *
   3  * Copyright 2016-2020 HabanaLabs, Ltd.
   4  * All Rights Reserved.
   5  *
   6  */
   7
   8 #ifndef INCLUDE_MMU_GENERAL_H_
   9 #define INCLUDE_MMU_GENERAL_H_
  10
  11 #define PAGE_SHIFT_4KB                  12
  12 #define PAGE_SHIFT_64KB                 16
  13 #define PAGE_SHIFT_2MB                  21
  14 #define PAGE_SHIFT_16MB                 24
  15 #define PAGE_SHIFT_64MB                 26
  16 #define PAGE_SHIFT_1GB                  30
  17 #define PAGE_SIZE_4KB                   _BITUL(PAGE_SHIFT_4KB)
  18 #define PAGE_SIZE_64KB                  _BITUL(PAGE_SHIFT_64KB)
  19 #define PAGE_SIZE_2MB                   _BITUL(PAGE_SHIFT_2MB)
  20 #define PAGE_SIZE_16MB                  _BITUL(PAGE_SHIFT_16MB)
  21 #define PAGE_SIZE_64MB                  _BITUL(PAGE_SHIFT_64MB)
  22 #define PAGE_SIZE_1GB                   _BITUL(PAGE_SHIFT_1GB)
  23
  24 #define PAGE_PRESENT_MASK               0x0000000000001ull
  25 #define SWAP_OUT_MASK                   0x0000000000004ull
  26 #define LAST_MASK                       0x0000000000800ull
  27 #define FLAGS_MASK                      0x0000000000FFFull
  28
  29 #define MMU_ARCH_3_HOPS                 3
  30 #define MMU_ARCH_4_HOPS                 4
  31 #define MMU_ARCH_5_HOPS                 5
  32 #define MMU_ARCH_6_HOPS                 6
  33
  34 #define HOP_PHYS_ADDR_MASK              (~FLAGS_MASK)
  35
  36 #define HL_PTE_SIZE                     sizeof(u64)
  37
  38 /* definitions for HOP with 512 PTE entries */
  39 #define HOP_PTE_ENTRIES_512             512
  40 #define HOP_TABLE_SIZE_512_PTE          (HOP_PTE_ENTRIES_512 * HL_PTE_SIZE)
  41 #define HOP0_512_PTE_TABLES_TOTAL_SIZE  (HOP_TABLE_SIZE_512_PTE * MAX_ASID)
  42
  43 #define MMU_HOP0_PA43_12_SHIFT          12
  44 #define MMU_HOP0_PA49_44_SHIFT          (12 + 32)
  45 #define MMU_HOP0_PA63_44_SHIFT          (12 + 32)
  46
  47 #define MMU_CONFIG_TIMEOUT_USEC         2000 /* 2 ms */
  48
  49 enum mmu_hop_num {
  50         MMU_HOP0,
  51         MMU_HOP1,
  52         MMU_HOP2,
  53         MMU_HOP3,
  54         MMU_HOP4,
  55         MMU_HOP5,
  56         MMU_HOP_MAX,
  57 };
  58
  59 #endif /* INCLUDE_MMU_GENERAL_H_ */