drm/rockchip: Don't change hdmi reference clock rate
[drm/drm-misc.git] / drivers / char / hw_random / ba431-rng.c
blob9de7466e68962fad16bc3f5588a6d0f1a4dce5ac
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2020 Silex Insight
4 #include <linux/delay.h>
5 #include <linux/hw_random.h>
6 #include <linux/io.h>
7 #include <linux/iopoll.h>
8 #include <linux/kernel.h>
9 #include <linux/mod_devicetable.h>
10 #include <linux/module.h>
11 #include <linux/platform_device.h>
12 #include <linux/workqueue.h>
14 #define BA431_RESET_DELAY 1 /* usec */
15 #define BA431_RESET_READ_STATUS_TIMEOUT 1000 /* usec */
16 #define BA431_RESET_READ_STATUS_INTERVAL 10 /* usec */
17 #define BA431_READ_RETRY_INTERVAL 1 /* usec */
19 #define BA431_REG_CTRL 0x00
20 #define BA431_REG_FIFO_LEVEL 0x04
21 #define BA431_REG_STATUS 0x30
22 #define BA431_REG_FIFODATA 0x80
24 #define BA431_CTRL_ENABLE BIT(0)
25 #define BA431_CTRL_SOFTRESET BIT(8)
27 #define BA431_STATUS_STATE_MASK (BIT(1) | BIT(2) | BIT(3))
28 #define BA431_STATUS_STATE_OFFSET 1
30 enum ba431_state {
31 BA431_STATE_RESET,
32 BA431_STATE_STARTUP,
33 BA431_STATE_FIFOFULLON,
34 BA431_STATE_FIFOFULLOFF,
35 BA431_STATE_RUNNING,
36 BA431_STATE_ERROR
39 struct ba431_trng {
40 struct device *dev;
41 void __iomem *base;
42 struct hwrng rng;
43 atomic_t reset_pending;
44 struct work_struct reset_work;
47 static inline u32 ba431_trng_read_reg(struct ba431_trng *ba431, u32 reg)
49 return ioread32(ba431->base + reg);
52 static inline void ba431_trng_write_reg(struct ba431_trng *ba431, u32 reg,
53 u32 val)
55 iowrite32(val, ba431->base + reg);
58 static inline enum ba431_state ba431_trng_get_state(struct ba431_trng *ba431)
60 u32 status = ba431_trng_read_reg(ba431, BA431_REG_STATUS);
62 return (status & BA431_STATUS_STATE_MASK) >> BA431_STATUS_STATE_OFFSET;
65 static int ba431_trng_is_in_error(struct ba431_trng *ba431)
67 enum ba431_state state = ba431_trng_get_state(ba431);
69 if ((state < BA431_STATE_STARTUP) ||
70 (state >= BA431_STATE_ERROR))
71 return 1;
73 return 0;
76 static int ba431_trng_reset(struct ba431_trng *ba431)
78 int ret;
80 /* Disable interrupts, random generation and enable the softreset */
81 ba431_trng_write_reg(ba431, BA431_REG_CTRL, BA431_CTRL_SOFTRESET);
82 udelay(BA431_RESET_DELAY);
83 ba431_trng_write_reg(ba431, BA431_REG_CTRL, BA431_CTRL_ENABLE);
85 /* Wait until the state changed */
86 if (readx_poll_timeout(ba431_trng_is_in_error, ba431, ret, !ret,
87 BA431_RESET_READ_STATUS_INTERVAL,
88 BA431_RESET_READ_STATUS_TIMEOUT)) {
89 dev_err(ba431->dev, "reset failed (state: %d)\n",
90 ba431_trng_get_state(ba431));
91 return -ETIMEDOUT;
94 dev_info(ba431->dev, "reset done\n");
96 return 0;
99 static void ba431_trng_reset_work(struct work_struct *work)
101 struct ba431_trng *ba431 = container_of(work, struct ba431_trng,
102 reset_work);
103 ba431_trng_reset(ba431);
104 atomic_set(&ba431->reset_pending, 0);
107 static void ba431_trng_schedule_reset(struct ba431_trng *ba431)
109 if (atomic_cmpxchg(&ba431->reset_pending, 0, 1))
110 return;
112 schedule_work(&ba431->reset_work);
115 static int ba431_trng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
117 struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);
118 u32 *data = buf;
119 unsigned int level, i;
120 int n = 0;
122 while (max > 0) {
123 level = ba431_trng_read_reg(ba431, BA431_REG_FIFO_LEVEL);
124 if (!level) {
125 if (ba431_trng_is_in_error(ba431)) {
126 ba431_trng_schedule_reset(ba431);
127 break;
130 if (!wait)
131 break;
133 udelay(BA431_READ_RETRY_INTERVAL);
134 continue;
137 i = level;
138 do {
139 data[n++] = ba431_trng_read_reg(ba431,
140 BA431_REG_FIFODATA);
141 max -= sizeof(*data);
142 } while (--i && (max > 0));
144 if (ba431_trng_is_in_error(ba431)) {
145 n -= (level - i);
146 ba431_trng_schedule_reset(ba431);
147 break;
151 n *= sizeof(data);
152 return (n || !wait) ? n : -EIO;
155 static void ba431_trng_cleanup(struct hwrng *rng)
157 struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);
159 ba431_trng_write_reg(ba431, BA431_REG_CTRL, 0);
160 cancel_work_sync(&ba431->reset_work);
163 static int ba431_trng_init(struct hwrng *rng)
165 struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);
167 return ba431_trng_reset(ba431);
170 static int ba431_trng_probe(struct platform_device *pdev)
172 struct ba431_trng *ba431;
173 int ret;
175 ba431 = devm_kzalloc(&pdev->dev, sizeof(*ba431), GFP_KERNEL);
176 if (!ba431)
177 return -ENOMEM;
179 ba431->dev = &pdev->dev;
181 ba431->base = devm_platform_ioremap_resource(pdev, 0);
182 if (IS_ERR(ba431->base))
183 return PTR_ERR(ba431->base);
185 atomic_set(&ba431->reset_pending, 0);
186 INIT_WORK(&ba431->reset_work, ba431_trng_reset_work);
187 ba431->rng.name = pdev->name;
188 ba431->rng.init = ba431_trng_init;
189 ba431->rng.cleanup = ba431_trng_cleanup;
190 ba431->rng.read = ba431_trng_read;
192 ret = devm_hwrng_register(&pdev->dev, &ba431->rng);
193 if (ret)
194 return dev_err_probe(&pdev->dev, ret, "BA431 registration failed\n");
196 dev_info(&pdev->dev, "BA431 TRNG registered\n");
198 return 0;
201 static const struct of_device_id ba431_trng_dt_ids[] = {
202 { .compatible = "silex-insight,ba431-rng" },
203 { /* sentinel */ }
205 MODULE_DEVICE_TABLE(of, ba431_trng_dt_ids);
207 static struct platform_driver ba431_trng_driver = {
208 .driver = {
209 .name = "ba431-rng",
210 .of_match_table = ba431_trng_dt_ids,
212 .probe = ba431_trng_probe,
215 module_platform_driver(ba431_trng_driver);
217 MODULE_AUTHOR("Olivier Sobrie <olivier@sobrie.be>");
218 MODULE_DESCRIPTION("TRNG driver for Silex Insight BA431");
219 MODULE_LICENSE("GPL");