1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com
6 #include <linux/kernel.h>
8 #include "k3-psil-priv.h"
10 #define PSIL_PDMA_XY_TR(x) \
14 .ep_type = PSIL_EP_PDMA_XY, \
15 .mapped_channel_id = -1, \
16 .default_flow_id = -1, \
20 #define PSIL_PDMA_XY_PKT(x) \
24 .ep_type = PSIL_EP_PDMA_XY, \
25 .mapped_channel_id = -1, \
26 .default_flow_id = -1, \
31 #define PSIL_ETHERNET(x, ch, flow_base, flow_cnt) \
35 .ep_type = PSIL_EP_NATIVE, \
39 .mapped_channel_id = ch, \
40 .flow_start = flow_base, \
41 .flow_num = flow_cnt, \
42 .default_flow_id = flow_base, \
46 #define PSIL_SAUL(x, ch, flow_base, flow_cnt, default_flow, tx) \
50 .ep_type = PSIL_EP_NATIVE, \
54 .mapped_channel_id = ch, \
55 .flow_start = flow_base, \
56 .flow_num = flow_cnt, \
57 .default_flow_id = default_flow, \
62 #define PSIL_PDMA_MCASP(x) \
66 .ep_type = PSIL_EP_PDMA_XY, \
72 #define PSIL_CSI2RX(x) \
76 .ep_type = PSIL_EP_NATIVE, \
80 /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
81 static struct psil_ep am62p_src_ep_map
[] = {
83 PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
84 PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
85 PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
86 PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
87 /* PDMA_MAIN0 - SPI0-2 */
88 PSIL_PDMA_XY_PKT(0x4300),
89 PSIL_PDMA_XY_PKT(0x4301),
90 PSIL_PDMA_XY_PKT(0x4302),
91 PSIL_PDMA_XY_PKT(0x4303),
92 PSIL_PDMA_XY_PKT(0x4304),
93 PSIL_PDMA_XY_PKT(0x4305),
94 PSIL_PDMA_XY_PKT(0x4306),
95 PSIL_PDMA_XY_PKT(0x4307),
96 PSIL_PDMA_XY_PKT(0x4308),
97 PSIL_PDMA_XY_PKT(0x4309),
98 PSIL_PDMA_XY_PKT(0x430a),
99 PSIL_PDMA_XY_PKT(0x430b),
100 /* PDMA_MAIN1 - UART0-6 */
101 PSIL_PDMA_XY_PKT(0x4400),
102 PSIL_PDMA_XY_PKT(0x4401),
103 PSIL_PDMA_XY_PKT(0x4402),
104 PSIL_PDMA_XY_PKT(0x4403),
105 PSIL_PDMA_XY_PKT(0x4404),
106 PSIL_PDMA_XY_PKT(0x4405),
107 PSIL_PDMA_XY_PKT(0x4406),
108 /* PDMA_MAIN2 - MCASP0-2 */
109 PSIL_PDMA_MCASP(0x4500),
110 PSIL_PDMA_MCASP(0x4501),
111 PSIL_PDMA_MCASP(0x4502),
113 PSIL_ETHERNET(0x4600, 19, 19, 16),
179 /* CSIRX 1-3 (only for J722S) */
278 /* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
279 static struct psil_ep am62p_dst_ep_map
[] = {
281 PSIL_SAUL(0xf500, 27, 83, 8, 83, 1),
282 PSIL_SAUL(0xf501, 28, 91, 8, 91, 1),
283 /* PDMA_MAIN0 - SPI0-2 */
284 PSIL_PDMA_XY_PKT(0xc300),
285 PSIL_PDMA_XY_PKT(0xc301),
286 PSIL_PDMA_XY_PKT(0xc302),
287 PSIL_PDMA_XY_PKT(0xc303),
288 PSIL_PDMA_XY_PKT(0xc304),
289 PSIL_PDMA_XY_PKT(0xc305),
290 PSIL_PDMA_XY_PKT(0xc306),
291 PSIL_PDMA_XY_PKT(0xc307),
292 PSIL_PDMA_XY_PKT(0xc308),
293 PSIL_PDMA_XY_PKT(0xc309),
294 PSIL_PDMA_XY_PKT(0xc30a),
295 PSIL_PDMA_XY_PKT(0xc30b),
296 /* PDMA_MAIN1 - UART0-6 */
297 PSIL_PDMA_XY_PKT(0xc400),
298 PSIL_PDMA_XY_PKT(0xc401),
299 PSIL_PDMA_XY_PKT(0xc402),
300 PSIL_PDMA_XY_PKT(0xc403),
301 PSIL_PDMA_XY_PKT(0xc404),
302 PSIL_PDMA_XY_PKT(0xc405),
303 PSIL_PDMA_XY_PKT(0xc406),
304 /* PDMA_MAIN2 - MCASP0-2 */
305 PSIL_PDMA_MCASP(0xc500),
306 PSIL_PDMA_MCASP(0xc501),
307 PSIL_PDMA_MCASP(0xc502),
309 PSIL_ETHERNET(0xc600, 19, 19, 8),
310 PSIL_ETHERNET(0xc601, 20, 27, 8),
311 PSIL_ETHERNET(0xc602, 21, 35, 8),
312 PSIL_ETHERNET(0xc603, 22, 43, 8),
313 PSIL_ETHERNET(0xc604, 23, 51, 8),
314 PSIL_ETHERNET(0xc605, 24, 59, 8),
315 PSIL_ETHERNET(0xc606, 25, 67, 8),
316 PSIL_ETHERNET(0xc607, 26, 75, 8),
319 struct psil_ep_map am62p_ep_map
= {
321 .src
= am62p_src_ep_map
,
322 .src_count
= ARRAY_SIZE(am62p_src_ep_map
),
323 .dst
= am62p_dst_ep_map
,
324 .dst_count
= ARRAY_SIZE(am62p_dst_ep_map
),