1 // SPDX-License-Identifier: GPL-2.0
3 * FPGA Freeze Bridge Controller
5 * Copyright (C) 2016 Altera Corporation. All rights reserved.
7 #include <linux/delay.h>
9 #include <linux/kernel.h>
10 #include <linux/mod_devicetable.h>
11 #include <linux/module.h>
12 #include <linux/platform_device.h>
13 #include <linux/fpga/fpga-bridge.h>
15 #define FREEZE_CSR_STATUS_OFFSET 0
16 #define FREEZE_CSR_CTRL_OFFSET 4
17 #define FREEZE_CSR_ILLEGAL_REQ_OFFSET 8
18 #define FREEZE_CSR_REG_VERSION 12
20 #define FREEZE_CSR_SUPPORTED_VERSION 2
21 #define FREEZE_CSR_OFFICIAL_VERSION 0xad000003
23 #define FREEZE_CSR_STATUS_FREEZE_REQ_DONE BIT(0)
24 #define FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE BIT(1)
26 #define FREEZE_CSR_CTRL_FREEZE_REQ BIT(0)
27 #define FREEZE_CSR_CTRL_RESET_REQ BIT(1)
28 #define FREEZE_CSR_CTRL_UNFREEZE_REQ BIT(2)
30 #define FREEZE_BRIDGE_NAME "freeze"
32 struct altera_freeze_br_data
{
34 void __iomem
*base_addr
;
39 * Poll status until status bit is set or we have a timeout.
41 static int altera_freeze_br_req_ack(struct altera_freeze_br_data
*priv
,
42 u32 timeout
, u32 req_ack
)
44 struct device
*dev
= priv
->dev
;
45 void __iomem
*csr_illegal_req_addr
= priv
->base_addr
+
46 FREEZE_CSR_ILLEGAL_REQ_OFFSET
;
47 u32 status
, illegal
, ctrl
;
51 illegal
= readl(csr_illegal_req_addr
);
53 dev_err(dev
, "illegal request detected 0x%x", illegal
);
55 writel(1, csr_illegal_req_addr
);
57 illegal
= readl(csr_illegal_req_addr
);
59 dev_err(dev
, "illegal request not cleared 0x%x",
66 status
= readl(priv
->base_addr
+ FREEZE_CSR_STATUS_OFFSET
);
67 dev_dbg(dev
, "%s %x %x\n", __func__
, status
, req_ack
);
70 ctrl
= readl(priv
->base_addr
+ FREEZE_CSR_CTRL_OFFSET
);
71 dev_dbg(dev
, "%s request %x acknowledged %x %x\n",
72 __func__
, req_ack
, status
, ctrl
);
80 if (ret
== -ETIMEDOUT
)
81 dev_err(dev
, "%s timeout waiting for 0x%x\n",
87 static int altera_freeze_br_do_freeze(struct altera_freeze_br_data
*priv
,
90 struct device
*dev
= priv
->dev
;
91 void __iomem
*csr_ctrl_addr
= priv
->base_addr
+
92 FREEZE_CSR_CTRL_OFFSET
;
96 status
= readl(priv
->base_addr
+ FREEZE_CSR_STATUS_OFFSET
);
98 dev_dbg(dev
, "%s %d %d\n", __func__
, status
, readl(csr_ctrl_addr
));
100 if (status
& FREEZE_CSR_STATUS_FREEZE_REQ_DONE
) {
101 dev_dbg(dev
, "%s bridge already disabled %d\n",
104 } else if (!(status
& FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE
)) {
105 dev_err(dev
, "%s bridge not enabled %d\n", __func__
, status
);
109 writel(FREEZE_CSR_CTRL_FREEZE_REQ
, csr_ctrl_addr
);
111 ret
= altera_freeze_br_req_ack(priv
, timeout
,
112 FREEZE_CSR_STATUS_FREEZE_REQ_DONE
);
115 writel(0, csr_ctrl_addr
);
117 writel(FREEZE_CSR_CTRL_RESET_REQ
, csr_ctrl_addr
);
122 static int altera_freeze_br_do_unfreeze(struct altera_freeze_br_data
*priv
,
125 struct device
*dev
= priv
->dev
;
126 void __iomem
*csr_ctrl_addr
= priv
->base_addr
+
127 FREEZE_CSR_CTRL_OFFSET
;
131 writel(0, csr_ctrl_addr
);
133 status
= readl(priv
->base_addr
+ FREEZE_CSR_STATUS_OFFSET
);
135 dev_dbg(dev
, "%s %d %d\n", __func__
, status
, readl(csr_ctrl_addr
));
137 if (status
& FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE
) {
138 dev_dbg(dev
, "%s bridge already enabled %d\n",
141 } else if (!(status
& FREEZE_CSR_STATUS_FREEZE_REQ_DONE
)) {
142 dev_err(dev
, "%s bridge not frozen %d\n", __func__
, status
);
146 writel(FREEZE_CSR_CTRL_UNFREEZE_REQ
, csr_ctrl_addr
);
148 ret
= altera_freeze_br_req_ack(priv
, timeout
,
149 FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE
);
151 status
= readl(priv
->base_addr
+ FREEZE_CSR_STATUS_OFFSET
);
153 dev_dbg(dev
, "%s %d %d\n", __func__
, status
, readl(csr_ctrl_addr
));
155 writel(0, csr_ctrl_addr
);
161 * enable = 1 : allow traffic through the bridge
162 * enable = 0 : disable traffic through the bridge
164 static int altera_freeze_br_enable_set(struct fpga_bridge
*bridge
,
167 struct altera_freeze_br_data
*priv
= bridge
->priv
;
168 struct fpga_image_info
*info
= bridge
->info
;
174 timeout
= info
->enable_timeout_us
;
176 ret
= altera_freeze_br_do_unfreeze(bridge
->priv
, timeout
);
179 timeout
= info
->disable_timeout_us
;
181 ret
= altera_freeze_br_do_freeze(bridge
->priv
, timeout
);
185 priv
->enable
= enable
;
190 static int altera_freeze_br_enable_show(struct fpga_bridge
*bridge
)
192 struct altera_freeze_br_data
*priv
= bridge
->priv
;
197 static const struct fpga_bridge_ops altera_freeze_br_br_ops
= {
198 .enable_set
= altera_freeze_br_enable_set
,
199 .enable_show
= altera_freeze_br_enable_show
,
202 static const struct of_device_id altera_freeze_br_of_match
[] = {
203 { .compatible
= "altr,freeze-bridge-controller", },
206 MODULE_DEVICE_TABLE(of
, altera_freeze_br_of_match
);
208 static int altera_freeze_br_probe(struct platform_device
*pdev
)
210 struct device
*dev
= &pdev
->dev
;
211 struct device_node
*np
= pdev
->dev
.of_node
;
212 void __iomem
*base_addr
;
213 struct altera_freeze_br_data
*priv
;
214 struct fpga_bridge
*br
;
215 u32 status
, revision
;
220 base_addr
= devm_platform_ioremap_resource(pdev
, 0);
221 if (IS_ERR(base_addr
))
222 return PTR_ERR(base_addr
);
224 revision
= readl(base_addr
+ FREEZE_CSR_REG_VERSION
);
225 if ((revision
!= FREEZE_CSR_SUPPORTED_VERSION
) &&
226 (revision
!= FREEZE_CSR_OFFICIAL_VERSION
)) {
228 "%s unexpected revision 0x%x != 0x%x != 0x%x\n",
229 __func__
, revision
, FREEZE_CSR_SUPPORTED_VERSION
,
230 FREEZE_CSR_OFFICIAL_VERSION
);
234 priv
= devm_kzalloc(dev
, sizeof(*priv
), GFP_KERNEL
);
240 status
= readl(base_addr
+ FREEZE_CSR_STATUS_OFFSET
);
241 if (status
& FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE
)
244 priv
->base_addr
= base_addr
;
246 br
= fpga_bridge_register(dev
, FREEZE_BRIDGE_NAME
,
247 &altera_freeze_br_br_ops
, priv
);
251 platform_set_drvdata(pdev
, br
);
256 static void altera_freeze_br_remove(struct platform_device
*pdev
)
258 struct fpga_bridge
*br
= platform_get_drvdata(pdev
);
260 fpga_bridge_unregister(br
);
263 static struct platform_driver altera_freeze_br_driver
= {
264 .probe
= altera_freeze_br_probe
,
265 .remove
= altera_freeze_br_remove
,
267 .name
= "altera_freeze_br",
268 .of_match_table
= altera_freeze_br_of_match
,
272 module_platform_driver(altera_freeze_br_driver
);
274 MODULE_DESCRIPTION("Altera Freeze Bridge");
275 MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
276 MODULE_LICENSE("GPL v2");