drivers/gpu/host1x/dev.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (c) 2012-2015, NVIDIA Corporation.
   4  */
   5
   6 #ifndef HOST1X_DEV_H
   7 #define HOST1X_DEV_H
   8
   9 #include <linux/device.h>
  10 #include <linux/iommu.h>
  11 #include <linux/iova.h>
  12 #include <linux/irqreturn.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/reset.h>
  15
  16 #include "cdma.h"
  17 #include "channel.h"
  18 #include "context.h"
  19 #include "intr.h"
  20 #include "job.h"
  21 #include "syncpt.h"
  22
  23 struct host1x_syncpt;
  24 struct host1x_syncpt_base;
  25 struct host1x_channel;
  26 struct host1x_cdma;
  27 struct host1x_job;
  28 struct push_buffer;
  29 struct output;
  30 struct dentry;
  31
  32 struct host1x_channel_ops {
  33         int (*init)(struct host1x_channel *channel, struct host1x *host,
  34                     unsigned int id);
  35         int (*submit)(struct host1x_job *job);
  36 };
  37
  38 struct host1x_cdma_ops {
  39         void (*start)(struct host1x_cdma *cdma);
  40         void (*stop)(struct host1x_cdma *cdma);
  41         void (*flush)(struct  host1x_cdma *cdma);
  42         int (*timeout_init)(struct host1x_cdma *cdma);
  43         void (*timeout_destroy)(struct host1x_cdma *cdma);
  44         void (*freeze)(struct host1x_cdma *cdma);
  45         void (*resume)(struct host1x_cdma *cdma, u32 getptr);
  46         void (*timeout_cpu_incr)(struct host1x_cdma *cdma, u32 getptr,
  47                                  u32 syncpt_incrs, u32 syncval, u32 nr_slots);
  48 };
  49
  50 struct host1x_pushbuffer_ops {
  51         void (*init)(struct push_buffer *pb);
  52 };
  53
  54 struct host1x_debug_ops {
  55         void (*debug_init)(struct dentry *de);
  56         void (*show_channel_cdma)(struct host1x *host,
  57                                   struct host1x_channel *ch,
  58                                   struct output *o);
  59         void (*show_channel_fifo)(struct host1x *host,
  60                                   struct host1x_channel *ch,
  61                                   struct output *o);
  62         void (*show_mlocks)(struct host1x *host, struct output *output);
  63
  64 };
  65
  66 struct host1x_syncpt_ops {
  67         void (*restore)(struct host1x_syncpt *syncpt);
  68         void (*restore_wait_base)(struct host1x_syncpt *syncpt);
  69         void (*load_wait_base)(struct host1x_syncpt *syncpt);
  70         u32 (*load)(struct host1x_syncpt *syncpt);
  71         int (*cpu_incr)(struct host1x_syncpt *syncpt);
  72         void (*assign_to_channel)(struct host1x_syncpt *syncpt,
  73                                   struct host1x_channel *channel);
  74         void (*enable_protection)(struct host1x *host);
  75 };
  76
  77 struct host1x_intr_ops {
  78         int (*init_host_sync)(struct host1x *host, u32 cpm);
  79         void (*set_syncpt_threshold)(
  80                 struct host1x *host, unsigned int id, u32 thresh);
  81         void (*enable_syncpt_intr)(struct host1x *host, unsigned int id);
  82         void (*disable_syncpt_intr)(struct host1x *host, unsigned int id);
  83         void (*disable_all_syncpt_intrs)(struct host1x *host);
  84         int (*free_syncpt_irq)(struct host1x *host);
  85         irqreturn_t (*isr)(int irq, void *dev_id);
  86 };
  87
  88 struct host1x_sid_entry {
  89         unsigned int base;
  90         unsigned int offset;
  91         unsigned int limit;
  92 };
  93
  94 struct host1x_table_desc {
  95         unsigned int base;
  96         unsigned int count;
  97 };
  98
  99 struct host1x_info {
 100         unsigned int nb_channels; /* host1x: number of channels supported */
 101         unsigned int nb_pts; /* host1x: number of syncpoints supported */
 102         unsigned int nb_bases; /* host1x: number of syncpoint bases supported */
 103         unsigned int nb_mlocks; /* host1x: number of mlocks supported */
 104         int (*init)(struct host1x *host1x); /* initialize per SoC ops */
 105         unsigned int sync_offset; /* offset of syncpoint registers */
 106         u64 dma_mask; /* mask of addressable memory */
 107         bool has_wide_gather; /* supports GATHER_W opcode */
 108         bool has_hypervisor; /* has hypervisor registers */
 109         bool has_common; /* has common registers separate from hypervisor */
 110         unsigned int num_sid_entries;
 111         const struct host1x_sid_entry *sid_table;
 112         struct host1x_table_desc streamid_vm_table;
 113         struct host1x_table_desc classid_vm_table;
 114         struct host1x_table_desc mmio_vm_table;
 115         /*
 116          * On T20-T148, the boot chain may setup DC to increment syncpoints
 117          * 26/27 on VBLANK. As such we cannot use these syncpoints until
 118          * the display driver disables VBLANK increments.
 119          */
 120         bool reserve_vblank_syncpts;
 121         /*
 122          * On Tegra186, secure world applications may require access to
 123          * host1x during suspend/resume. To allow this, we need to leave
 124          * host1x not in reset.
 125          */
 126         bool skip_reset_assert;
 127 };
 128
 129 struct host1x {
 130         const struct host1x_info *info;
 131
 132         void __iomem *regs;
 133         void __iomem *hv_regs; /* hypervisor region */
 134         void __iomem *common_regs;
 135         int syncpt_irqs[8];
 136         int num_syncpt_irqs;
 137         struct host1x_syncpt *syncpt;
 138         struct host1x_syncpt_base *bases;
 139         struct device *dev;
 140         struct clk *clk;
 141         struct reset_control_bulk_data resets[2];
 142         unsigned int nresets;
 143
 144         struct iommu_group *group;
 145         struct iommu_domain *domain;
 146         struct iova_domain iova;
 147         dma_addr_t iova_end;
 148
 149         struct mutex intr_mutex;
 150
 151         const struct host1x_syncpt_ops *syncpt_op;
 152         const struct host1x_intr_ops *intr_op;
 153         const struct host1x_channel_ops *channel_op;
 154         const struct host1x_cdma_ops *cdma_op;
 155         const struct host1x_pushbuffer_ops *cdma_pb_op;
 156         const struct host1x_debug_ops *debug_op;
 157
 158         struct host1x_syncpt *nop_sp;
 159
 160         struct mutex syncpt_mutex;
 161
 162         struct host1x_channel_list channel_list;
 163         struct host1x_memory_context_list context_list;
 164
 165         struct dentry *debugfs;
 166
 167         struct mutex devices_lock;
 168         struct list_head devices;
 169
 170         struct list_head list;
 171
 172         struct device_dma_parameters dma_parms;
 173
 174         struct host1x_bo_cache cache;
 175 };
 176
 177 void host1x_common_writel(struct host1x *host1x, u32 v, u32 r);
 178 void host1x_hypervisor_writel(struct host1x *host1x, u32 v, u32 r);
 179 u32 host1x_hypervisor_readl(struct host1x *host1x, u32 r);
 180 void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r);
 181 u32 host1x_sync_readl(struct host1x *host1x, u32 r);
 182 void host1x_ch_writel(struct host1x_channel *ch, u32 v, u32 r);
 183 u32 host1x_ch_readl(struct host1x_channel *ch, u32 r);
 184
 185 static inline void host1x_hw_syncpt_restore(struct host1x *host,
 186                                             struct host1x_syncpt *sp)
 187 {
 188         host->syncpt_op->restore(sp);
 189 }
 190
 191 static inline void host1x_hw_syncpt_restore_wait_base(struct host1x *host,
 192                                                       struct host1x_syncpt *sp)
 193 {
 194         host->syncpt_op->restore_wait_base(sp);
 195 }
 196
 197 static inline void host1x_hw_syncpt_load_wait_base(struct host1x *host,
 198                                                    struct host1x_syncpt *sp)
 199 {
 200         host->syncpt_op->load_wait_base(sp);
 201 }
 202
 203 static inline u32 host1x_hw_syncpt_load(struct host1x *host,
 204                                         struct host1x_syncpt *sp)
 205 {
 206         return host->syncpt_op->load(sp);
 207 }
 208
 209 static inline int host1x_hw_syncpt_cpu_incr(struct host1x *host,
 210                                             struct host1x_syncpt *sp)
 211 {
 212         return host->syncpt_op->cpu_incr(sp);
 213 }
 214
 215 static inline void host1x_hw_syncpt_assign_to_channel(
 216         struct host1x *host, struct host1x_syncpt *sp,
 217         struct host1x_channel *ch)
 218 {
 219         return host->syncpt_op->assign_to_channel(sp, ch);
 220 }
 221
 222 static inline void host1x_hw_syncpt_enable_protection(struct host1x *host)
 223 {
 224         return host->syncpt_op->enable_protection(host);
 225 }
 226
 227 static inline int host1x_hw_intr_init_host_sync(struct host1x *host, u32 cpm)
 228 {
 229         return host->intr_op->init_host_sync(host, cpm);
 230 }
 231
 232 static inline void host1x_hw_intr_set_syncpt_threshold(struct host1x *host,
 233                                                        unsigned int id,
 234                                                        u32 thresh)
 235 {
 236         host->intr_op->set_syncpt_threshold(host, id, thresh);
 237 }
 238
 239 static inline void host1x_hw_intr_enable_syncpt_intr(struct host1x *host,
 240                                                      unsigned int id)
 241 {
 242         host->intr_op->enable_syncpt_intr(host, id);
 243 }
 244
 245 static inline void host1x_hw_intr_disable_syncpt_intr(struct host1x *host,
 246                                                       unsigned int id)
 247 {
 248         host->intr_op->disable_syncpt_intr(host, id);
 249 }
 250
 251 static inline void host1x_hw_intr_disable_all_syncpt_intrs(struct host1x *host)
 252 {
 253         host->intr_op->disable_all_syncpt_intrs(host);
 254 }
 255
 256 static inline int host1x_hw_intr_free_syncpt_irq(struct host1x *host)
 257 {
 258         return host->intr_op->free_syncpt_irq(host);
 259 }
 260
 261 static inline int host1x_hw_channel_init(struct host1x *host,
 262                                          struct host1x_channel *channel,
 263                                          unsigned int id)
 264 {
 265         return host->channel_op->init(channel, host, id);
 266 }
 267
 268 static inline int host1x_hw_channel_submit(struct host1x *host,
 269                                            struct host1x_job *job)
 270 {
 271         return host->channel_op->submit(job);
 272 }
 273
 274 static inline void host1x_hw_cdma_start(struct host1x *host,
 275                                         struct host1x_cdma *cdma)
 276 {
 277         host->cdma_op->start(cdma);
 278 }
 279
 280 static inline void host1x_hw_cdma_stop(struct host1x *host,
 281                                        struct host1x_cdma *cdma)
 282 {
 283         host->cdma_op->stop(cdma);
 284 }
 285
 286 static inline void host1x_hw_cdma_flush(struct host1x *host,
 287                                         struct host1x_cdma *cdma)
 288 {
 289         host->cdma_op->flush(cdma);
 290 }
 291
 292 static inline int host1x_hw_cdma_timeout_init(struct host1x *host,
 293                                               struct host1x_cdma *cdma)
 294 {
 295         return host->cdma_op->timeout_init(cdma);
 296 }
 297
 298 static inline void host1x_hw_cdma_timeout_destroy(struct host1x *host,
 299                                                   struct host1x_cdma *cdma)
 300 {
 301         host->cdma_op->timeout_destroy(cdma);
 302 }
 303
 304 static inline void host1x_hw_cdma_freeze(struct host1x *host,
 305                                          struct host1x_cdma *cdma)
 306 {
 307         host->cdma_op->freeze(cdma);
 308 }
 309
 310 static inline void host1x_hw_cdma_resume(struct host1x *host,
 311                                          struct host1x_cdma *cdma, u32 getptr)
 312 {
 313         host->cdma_op->resume(cdma, getptr);
 314 }
 315
 316 static inline void host1x_hw_cdma_timeout_cpu_incr(struct host1x *host,
 317                                                    struct host1x_cdma *cdma,
 318                                                    u32 getptr,
 319                                                    u32 syncpt_incrs,
 320                                                    u32 syncval, u32 nr_slots)
 321 {
 322         host->cdma_op->timeout_cpu_incr(cdma, getptr, syncpt_incrs, syncval,
 323                                         nr_slots);
 324 }
 325
 326 static inline void host1x_hw_pushbuffer_init(struct host1x *host,
 327                                              struct push_buffer *pb)
 328 {
 329         host->cdma_pb_op->init(pb);
 330 }
 331
 332 static inline void host1x_hw_debug_init(struct host1x *host, struct dentry *de)
 333 {
 334         if (host->debug_op && host->debug_op->debug_init)
 335                 host->debug_op->debug_init(de);
 336 }
 337
 338 static inline void host1x_hw_show_channel_cdma(struct host1x *host,
 339                                                struct host1x_channel *channel,
 340                                                struct output *o)
 341 {
 342         host->debug_op->show_channel_cdma(host, channel, o);
 343 }
 344
 345 static inline void host1x_hw_show_channel_fifo(struct host1x *host,
 346                                                struct host1x_channel *channel,
 347                                                struct output *o)
 348 {
 349         host->debug_op->show_channel_fifo(host, channel, o);
 350 }
 351
 352 static inline void host1x_hw_show_mlocks(struct host1x *host, struct output *o)
 353 {
 354         host->debug_op->show_mlocks(host, o);
 355 }
 356
 357 extern struct platform_driver tegra_mipi_driver;
 358
 359 #endif