1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
8 #include <linux/interrupt.h>
10 #include <linux/module.h>
11 #include <linux/platform_device.h>
13 #define UNIPHIER_I2C_DTRM 0x00 /* TX register */
14 #define UNIPHIER_I2C_DTRM_IRQEN BIT(11) /* enable interrupt */
15 #define UNIPHIER_I2C_DTRM_STA BIT(10) /* start condition */
16 #define UNIPHIER_I2C_DTRM_STO BIT(9) /* stop condition */
17 #define UNIPHIER_I2C_DTRM_NACK BIT(8) /* do not return ACK */
18 #define UNIPHIER_I2C_DTRM_RD BIT(0) /* read transaction */
19 #define UNIPHIER_I2C_DREC 0x04 /* RX register */
20 #define UNIPHIER_I2C_DREC_MST BIT(14) /* 1 = controller, 0 = target */
21 #define UNIPHIER_I2C_DREC_TX BIT(13) /* 1 = transmit, 0 = receive */
22 #define UNIPHIER_I2C_DREC_STS BIT(12) /* stop condition detected */
23 #define UNIPHIER_I2C_DREC_LRB BIT(11) /* no ACK */
24 #define UNIPHIER_I2C_DREC_LAB BIT(9) /* arbitration lost */
25 #define UNIPHIER_I2C_DREC_BBN BIT(8) /* bus not busy */
26 #define UNIPHIER_I2C_MYAD 0x08 /* local target address */
27 #define UNIPHIER_I2C_CLK 0x0c /* clock frequency control */
28 #define UNIPHIER_I2C_BRST 0x10 /* bus reset */
29 #define UNIPHIER_I2C_BRST_FOEN BIT(1) /* normal operation */
30 #define UNIPHIER_I2C_BRST_RSCL BIT(0) /* release SCL */
31 #define UNIPHIER_I2C_HOLD 0x14 /* hold time control */
32 #define UNIPHIER_I2C_BSTS 0x18 /* bus status monitor */
33 #define UNIPHIER_I2C_BSTS_SDA BIT(1) /* readback of SDA line */
34 #define UNIPHIER_I2C_BSTS_SCL BIT(0) /* readback of SCL line */
35 #define UNIPHIER_I2C_NOISE 0x1c /* noise filter control */
36 #define UNIPHIER_I2C_SETUP 0x20 /* setup time control */
38 struct uniphier_i2c_priv
{
39 struct completion comp
;
40 struct i2c_adapter adap
;
41 void __iomem
*membase
;
43 unsigned int busy_cnt
;
44 unsigned int clk_cycle
;
47 static irqreturn_t
uniphier_i2c_interrupt(int irq
, void *dev_id
)
49 struct uniphier_i2c_priv
*priv
= dev_id
;
52 * This hardware uses edge triggered interrupt. Do not touch the
53 * hardware registers in this handler to make sure to catch the next
54 * interrupt edge. Just send a complete signal and return.
56 complete(&priv
->comp
);
61 static int uniphier_i2c_xfer_byte(struct i2c_adapter
*adap
, u32 txdata
,
64 struct uniphier_i2c_priv
*priv
= i2c_get_adapdata(adap
);
65 unsigned long time_left
;
68 reinit_completion(&priv
->comp
);
70 txdata
|= UNIPHIER_I2C_DTRM_IRQEN
;
71 writel(txdata
, priv
->membase
+ UNIPHIER_I2C_DTRM
);
73 time_left
= wait_for_completion_timeout(&priv
->comp
, adap
->timeout
);
74 if (unlikely(!time_left
))
77 rxdata
= readl(priv
->membase
+ UNIPHIER_I2C_DREC
);
84 static int uniphier_i2c_send_byte(struct i2c_adapter
*adap
, u32 txdata
)
89 ret
= uniphier_i2c_xfer_byte(adap
, txdata
, &rxdata
);
93 if (unlikely(rxdata
& UNIPHIER_I2C_DREC_LAB
))
96 if (unlikely(rxdata
& UNIPHIER_I2C_DREC_LRB
))
102 static int uniphier_i2c_tx(struct i2c_adapter
*adap
, u16 addr
, u16 len
,
107 ret
= uniphier_i2c_send_byte(adap
, addr
<< 1 |
108 UNIPHIER_I2C_DTRM_STA
|
109 UNIPHIER_I2C_DTRM_NACK
);
114 ret
= uniphier_i2c_send_byte(adap
,
115 UNIPHIER_I2C_DTRM_NACK
| *buf
++);
123 static int uniphier_i2c_rx(struct i2c_adapter
*adap
, u16 addr
, u16 len
,
128 ret
= uniphier_i2c_send_byte(adap
, addr
<< 1 |
129 UNIPHIER_I2C_DTRM_STA
|
130 UNIPHIER_I2C_DTRM_NACK
|
131 UNIPHIER_I2C_DTRM_RD
);
138 ret
= uniphier_i2c_xfer_byte(adap
,
139 len
? 0 : UNIPHIER_I2C_DTRM_NACK
,
149 static int uniphier_i2c_stop(struct i2c_adapter
*adap
)
151 return uniphier_i2c_send_byte(adap
, UNIPHIER_I2C_DTRM_STO
|
152 UNIPHIER_I2C_DTRM_NACK
);
155 static int uniphier_i2c_xfer_one(struct i2c_adapter
*adap
,
156 struct i2c_msg
*msg
, bool stop
)
158 bool is_read
= msg
->flags
& I2C_M_RD
;
159 bool recovery
= false;
163 ret
= uniphier_i2c_rx(adap
, msg
->addr
, msg
->len
, msg
->buf
);
165 ret
= uniphier_i2c_tx(adap
, msg
->addr
, msg
->len
, msg
->buf
);
167 if (ret
== -EAGAIN
) /* could not acquire bus. bail out without STOP */
170 if (ret
== -ETIMEDOUT
) {
171 /* This error is fatal. Needs recovery. */
177 int ret2
= uniphier_i2c_stop(adap
);
180 /* Failed to issue STOP. The bus needs recovery. */
187 i2c_recover_bus(adap
);
192 static int uniphier_i2c_check_bus_busy(struct i2c_adapter
*adap
)
194 struct uniphier_i2c_priv
*priv
= i2c_get_adapdata(adap
);
196 if (!(readl(priv
->membase
+ UNIPHIER_I2C_DREC
) &
197 UNIPHIER_I2C_DREC_BBN
)) {
198 if (priv
->busy_cnt
++ > 3) {
200 * If bus busy continues too long, it is probably
201 * in a wrong state. Try bus recovery.
203 i2c_recover_bus(adap
);
214 static int uniphier_i2c_xfer(struct i2c_adapter
*adap
, struct i2c_msg
*msgs
, int num
)
216 struct i2c_msg
*msg
, *emsg
= msgs
+ num
;
219 ret
= uniphier_i2c_check_bus_busy(adap
);
223 for (msg
= msgs
; msg
< emsg
; msg
++) {
224 /* Emit STOP if it is the last message or I2C_M_STOP is set. */
225 bool stop
= (msg
+ 1 == emsg
) || (msg
->flags
& I2C_M_STOP
);
227 ret
= uniphier_i2c_xfer_one(adap
, msg
, stop
);
235 static u32
uniphier_i2c_functionality(struct i2c_adapter
*adap
)
237 return I2C_FUNC_I2C
| I2C_FUNC_SMBUS_EMUL
;
240 static const struct i2c_algorithm uniphier_i2c_algo
= {
241 .xfer
= uniphier_i2c_xfer
,
242 .functionality
= uniphier_i2c_functionality
,
245 static void uniphier_i2c_reset(struct uniphier_i2c_priv
*priv
, bool reset_on
)
247 u32 val
= UNIPHIER_I2C_BRST_RSCL
;
249 val
|= reset_on
? 0 : UNIPHIER_I2C_BRST_FOEN
;
250 writel(val
, priv
->membase
+ UNIPHIER_I2C_BRST
);
253 static int uniphier_i2c_get_scl(struct i2c_adapter
*adap
)
255 struct uniphier_i2c_priv
*priv
= i2c_get_adapdata(adap
);
257 return !!(readl(priv
->membase
+ UNIPHIER_I2C_BSTS
) &
258 UNIPHIER_I2C_BSTS_SCL
);
261 static void uniphier_i2c_set_scl(struct i2c_adapter
*adap
, int val
)
263 struct uniphier_i2c_priv
*priv
= i2c_get_adapdata(adap
);
265 writel(val
? UNIPHIER_I2C_BRST_RSCL
: 0,
266 priv
->membase
+ UNIPHIER_I2C_BRST
);
269 static int uniphier_i2c_get_sda(struct i2c_adapter
*adap
)
271 struct uniphier_i2c_priv
*priv
= i2c_get_adapdata(adap
);
273 return !!(readl(priv
->membase
+ UNIPHIER_I2C_BSTS
) &
274 UNIPHIER_I2C_BSTS_SDA
);
277 static void uniphier_i2c_unprepare_recovery(struct i2c_adapter
*adap
)
279 uniphier_i2c_reset(i2c_get_adapdata(adap
), false);
282 static struct i2c_bus_recovery_info uniphier_i2c_bus_recovery_info
= {
283 .recover_bus
= i2c_generic_scl_recovery
,
284 .get_scl
= uniphier_i2c_get_scl
,
285 .set_scl
= uniphier_i2c_set_scl
,
286 .get_sda
= uniphier_i2c_get_sda
,
287 .unprepare_recovery
= uniphier_i2c_unprepare_recovery
,
290 static void uniphier_i2c_hw_init(struct uniphier_i2c_priv
*priv
)
292 unsigned int cyc
= priv
->clk_cycle
;
294 uniphier_i2c_reset(priv
, true);
297 * Bit30-16: clock cycles of tLOW.
298 * Standard-mode: tLOW = 4.7 us, tHIGH = 4.0 us
299 * Fast-mode: tLOW = 1.3 us, tHIGH = 0.6 us
300 * "tLow/tHIGH = 5/4" meets both.
302 writel((cyc
* 5 / 9 << 16) | cyc
, priv
->membase
+ UNIPHIER_I2C_CLK
);
304 uniphier_i2c_reset(priv
, false);
307 static int uniphier_i2c_probe(struct platform_device
*pdev
)
309 struct device
*dev
= &pdev
->dev
;
310 struct uniphier_i2c_priv
*priv
;
312 unsigned long clk_rate
;
315 priv
= devm_kzalloc(dev
, sizeof(*priv
), GFP_KERNEL
);
319 priv
->membase
= devm_platform_ioremap_resource(pdev
, 0);
320 if (IS_ERR(priv
->membase
))
321 return PTR_ERR(priv
->membase
);
323 irq
= platform_get_irq(pdev
, 0);
327 if (of_property_read_u32(dev
->of_node
, "clock-frequency", &bus_speed
))
328 bus_speed
= I2C_MAX_STANDARD_MODE_FREQ
;
330 if (!bus_speed
|| bus_speed
> I2C_MAX_FAST_MODE_FREQ
) {
331 dev_err(dev
, "invalid clock-frequency %d\n", bus_speed
);
335 priv
->clk
= devm_clk_get_enabled(dev
, NULL
);
336 if (IS_ERR(priv
->clk
)) {
337 dev_err(dev
, "failed to enable clock\n");
338 return PTR_ERR(priv
->clk
);
341 clk_rate
= clk_get_rate(priv
->clk
);
343 dev_err(dev
, "input clock rate should not be zero\n");
347 priv
->clk_cycle
= clk_rate
/ bus_speed
;
348 init_completion(&priv
->comp
);
349 priv
->adap
.owner
= THIS_MODULE
;
350 priv
->adap
.algo
= &uniphier_i2c_algo
;
351 priv
->adap
.dev
.parent
= dev
;
352 priv
->adap
.dev
.of_node
= dev
->of_node
;
353 strscpy(priv
->adap
.name
, "UniPhier I2C", sizeof(priv
->adap
.name
));
354 priv
->adap
.bus_recovery_info
= &uniphier_i2c_bus_recovery_info
;
355 i2c_set_adapdata(&priv
->adap
, priv
);
356 platform_set_drvdata(pdev
, priv
);
358 uniphier_i2c_hw_init(priv
);
360 ret
= devm_request_irq(dev
, irq
, uniphier_i2c_interrupt
, 0, pdev
->name
,
363 dev_err(dev
, "failed to request irq %d\n", irq
);
367 return i2c_add_adapter(&priv
->adap
);
370 static void uniphier_i2c_remove(struct platform_device
*pdev
)
372 struct uniphier_i2c_priv
*priv
= platform_get_drvdata(pdev
);
374 i2c_del_adapter(&priv
->adap
);
377 static int __maybe_unused
uniphier_i2c_suspend(struct device
*dev
)
379 struct uniphier_i2c_priv
*priv
= dev_get_drvdata(dev
);
381 clk_disable_unprepare(priv
->clk
);
386 static int __maybe_unused
uniphier_i2c_resume(struct device
*dev
)
388 struct uniphier_i2c_priv
*priv
= dev_get_drvdata(dev
);
391 ret
= clk_prepare_enable(priv
->clk
);
395 uniphier_i2c_hw_init(priv
);
400 static const struct dev_pm_ops uniphier_i2c_pm_ops
= {
401 SET_SYSTEM_SLEEP_PM_OPS(uniphier_i2c_suspend
, uniphier_i2c_resume
)
404 static const struct of_device_id uniphier_i2c_match
[] = {
405 { .compatible
= "socionext,uniphier-i2c" },
408 MODULE_DEVICE_TABLE(of
, uniphier_i2c_match
);
410 static struct platform_driver uniphier_i2c_drv
= {
411 .probe
= uniphier_i2c_probe
,
412 .remove
= uniphier_i2c_remove
,
414 .name
= "uniphier-i2c",
415 .of_match_table
= uniphier_i2c_match
,
416 .pm
= &uniphier_i2c_pm_ops
,
419 module_platform_driver(uniphier_i2c_drv
);
421 MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>");
422 MODULE_DESCRIPTION("UniPhier I2C bus driver");
423 MODULE_LICENSE("GPL");