drm/panel: simple: add Multi-Inno Technology MI0700A2T-30
[drm/drm-misc.git] / drivers / iio / adc / ad7606.h
blob998814a92b8258296777c19df82f35903e7b3deb
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * AD7606 ADC driver
5 * Copyright 2011 Analog Devices Inc.
6 */
8 #ifndef IIO_ADC_AD7606_H_
9 #define IIO_ADC_AD7606_H_
11 #define AD760X_MAX_CHANNELS 16
13 #define AD760X_CHANNEL(num, mask_sep, mask_type, mask_all, bits) { \
14 .type = IIO_VOLTAGE, \
15 .indexed = 1, \
16 .channel = num, \
17 .address = num, \
18 .info_mask_separate = mask_sep, \
19 .info_mask_shared_by_type = mask_type, \
20 .info_mask_shared_by_all = mask_all, \
21 .scan_index = num, \
22 .scan_type = { \
23 .sign = 's', \
24 .realbits = (bits), \
25 .storagebits = (bits) > 16 ? 32 : 16, \
26 .endianness = IIO_CPU, \
27 }, \
30 #define AD7606_SW_CHANNEL(num, bits) { \
31 .type = IIO_VOLTAGE, \
32 .indexed = 1, \
33 .channel = num, \
34 .address = num, \
35 .info_mask_separate = \
36 BIT(IIO_CHAN_INFO_RAW) | \
37 BIT(IIO_CHAN_INFO_SCALE), \
38 .info_mask_separate_available = \
39 BIT(IIO_CHAN_INFO_SCALE), \
40 .info_mask_shared_by_all = \
41 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
42 .info_mask_shared_by_all_available = \
43 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
44 .scan_index = num, \
45 .scan_type = { \
46 .sign = 's', \
47 .realbits = (bits), \
48 .storagebits = (bits) > 16 ? 32 : 16, \
49 .endianness = IIO_CPU, \
50 }, \
53 #define AD7605_CHANNEL(num) \
54 AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \
55 BIT(IIO_CHAN_INFO_SCALE), 0, 16)
57 #define AD7606_CHANNEL(num, bits) \
58 AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \
59 BIT(IIO_CHAN_INFO_SCALE), \
60 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), bits)
62 #define AD7616_CHANNEL(num) AD7606_SW_CHANNEL(num, 16)
64 #define AD7606_BI_CHANNEL(num) \
65 AD760X_CHANNEL(num, 0, \
66 BIT(IIO_CHAN_INFO_SCALE), \
67 BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
68 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 16)
70 struct ad7606_state;
72 typedef int (*ad7606_scale_setup_cb_t)(struct ad7606_state *st,
73 struct iio_chan_spec *chan, int ch);
75 /**
76 * struct ad7606_chip_info - chip specific information
77 * @channels: channel specification
78 * @max_samplerate: maximum supported samplerate
79 * @name device name
80 * @num_channels: number of channels
81 * @num_adc_channels the number of channels the ADC actually inputs.
82 * @scale_setup_cb: callback to setup the scales for each channel
83 * @oversampling_avail pointer to the array which stores the available
84 * oversampling ratios.
85 * @oversampling_num number of elements stored in oversampling_avail array
86 * @os_req_reset some devices require a reset to update oversampling
87 * @init_delay_ms required delay in milliseconds for initialization
88 * after a restart
90 struct ad7606_chip_info {
91 const struct iio_chan_spec *channels;
92 unsigned int max_samplerate;
93 const char *name;
94 unsigned int num_adc_channels;
95 unsigned int num_channels;
96 ad7606_scale_setup_cb_t scale_setup_cb;
97 const unsigned int *oversampling_avail;
98 unsigned int oversampling_num;
99 bool os_req_reset;
100 unsigned long init_delay_ms;
104 * struct ad7606_chan_scale - channel scale configuration
105 * @scale_avail pointer to the array which stores the available scales
106 * @num_scales number of elements stored in the scale_avail array
107 * @range voltage range selection, selects which scale to apply
108 * @reg_offset offset for the register value, to be applied when
109 * writing the value of 'range' to the register value
111 struct ad7606_chan_scale {
112 #define AD760X_MAX_SCALES 16
113 const unsigned int (*scale_avail)[2];
114 unsigned int num_scales;
115 unsigned int range;
116 unsigned int reg_offset;
120 * struct ad7606_state - driver instance specific data
121 * @dev pointer to kernel device
122 * @chip_info entry in the table of chips that describes this device
123 * @bops bus operations (SPI or parallel)
124 * @chan_scales scale configuration for channels
125 * @oversampling oversampling selection
126 * @cnvst_pwm pointer to the PWM device connected to the cnvst pin
127 * @base_address address from where to read data in parallel operation
128 * @sw_mode_en software mode enabled
129 * @oversampling_avail pointer to the array which stores the available
130 * oversampling ratios.
131 * @num_os_ratios number of elements stored in oversampling_avail array
132 * @write_scale pointer to the function which writes the scale
133 * @write_os pointer to the function which writes the os
134 * @lock protect sensor state from concurrent accesses to GPIOs
135 * @gpio_convst GPIO descriptor for conversion start signal (CONVST)
136 * @gpio_reset GPIO descriptor for device hard-reset
137 * @gpio_range GPIO descriptor for range selection
138 * @gpio_standby GPIO descriptor for stand-by signal (STBY),
139 * controls power-down mode of device
140 * @gpio_frstdata GPIO descriptor for reading from device when data
141 * is being read on the first channel
142 * @gpio_os GPIO descriptors to control oversampling on the device
143 * @complete completion to indicate end of conversion
144 * @trig The IIO trigger associated with the device.
145 * @data buffer for reading data from the device
146 * @d16 be16 buffer for reading data from the device
148 struct ad7606_state {
149 struct device *dev;
150 const struct ad7606_chip_info *chip_info;
151 const struct ad7606_bus_ops *bops;
152 struct ad7606_chan_scale chan_scales[AD760X_MAX_CHANNELS];
153 unsigned int oversampling;
154 struct pwm_device *cnvst_pwm;
155 void __iomem *base_address;
156 bool sw_mode_en;
157 const unsigned int *oversampling_avail;
158 unsigned int num_os_ratios;
159 struct iio_backend *back;
160 int (*write_scale)(struct iio_dev *indio_dev, int ch, int val);
161 int (*write_os)(struct iio_dev *indio_dev, int val);
163 struct mutex lock; /* protect sensor state */
164 struct gpio_desc *gpio_convst;
165 struct gpio_desc *gpio_reset;
166 struct gpio_desc *gpio_range;
167 struct gpio_desc *gpio_standby;
168 struct gpio_desc *gpio_frstdata;
169 struct gpio_descs *gpio_os;
170 struct iio_trigger *trig;
171 struct completion completion;
174 * DMA (thus cache coherency maintenance) may require the
175 * transfer buffers to live in their own cache lines.
176 * 16 * 16-bit samples + 64-bit timestamp - for AD7616
177 * 8 * 32-bit samples + 64-bit timestamp - for AD7616C-18 (and similar)
179 union {
180 u16 buf16[20];
181 u32 buf32[10];
182 } data __aligned(IIO_DMA_MINALIGN);
183 __be16 d16[2];
187 * struct ad7606_bus_ops - driver bus operations
188 * @iio_backend_config function pointer for configuring the iio_backend for
189 * the compatibles that use it
190 * @read_block function pointer for reading blocks of data
191 * @sw_mode_config: pointer to a function which configured the device
192 * for software mode
193 * @reg_read function pointer for reading spi register
194 * @reg_write function pointer for writing spi register
195 * @write_mask function pointer for write spi register with mask
196 * @update_scan_mode function pointer for handling the calls to iio_info's update_scan
197 * mode when enabling/disabling channels.
198 * @rd_wr_cmd pointer to the function which calculates the spi address
200 struct ad7606_bus_ops {
201 /* more methods added in future? */
202 int (*iio_backend_config)(struct device *dev, struct iio_dev *indio_dev);
203 int (*read_block)(struct device *dev, int num, void *data);
204 int (*sw_mode_config)(struct iio_dev *indio_dev);
205 int (*reg_read)(struct ad7606_state *st, unsigned int addr);
206 int (*reg_write)(struct ad7606_state *st,
207 unsigned int addr,
208 unsigned int val);
209 int (*write_mask)(struct ad7606_state *st,
210 unsigned int addr,
211 unsigned long mask,
212 unsigned int val);
213 int (*update_scan_mode)(struct iio_dev *indio_dev, const unsigned long *scan_mask);
214 u16 (*rd_wr_cmd)(int addr, char isWriteOp);
218 * struct ad7606_bus_info - agregate ad7606_chip_info and ad7606_bus_ops
219 * @chip_info entry in the table of chips that describes this device
220 * @bops bus operations (SPI or parallel)
222 struct ad7606_bus_info {
223 const struct ad7606_chip_info *chip_info;
224 const struct ad7606_bus_ops *bops;
227 int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
228 const struct ad7606_chip_info *info,
229 const struct ad7606_bus_ops *bops);
231 int ad7606_reset(struct ad7606_state *st);
233 extern const struct ad7606_chip_info ad7605_4_info;
234 extern const struct ad7606_chip_info ad7606_8_info;
235 extern const struct ad7606_chip_info ad7606_6_info;
236 extern const struct ad7606_chip_info ad7606_4_info;
237 extern const struct ad7606_chip_info ad7606b_info;
238 extern const struct ad7606_chip_info ad7606c_16_info;
239 extern const struct ad7606_chip_info ad7606c_18_info;
240 extern const struct ad7606_chip_info ad7607_info;
241 extern const struct ad7606_chip_info ad7608_info;
242 extern const struct ad7606_chip_info ad7609_info;
243 extern const struct ad7606_chip_info ad7616_info;
245 #ifdef CONFIG_PM_SLEEP
246 extern const struct dev_pm_ops ad7606_pm_ops;
247 #define AD7606_PM_OPS (&ad7606_pm_ops)
248 #else
249 #define AD7606_PM_OPS NULL
250 #endif
252 #endif /* IIO_ADC_AD7606_H_ */