drivers/iio/adc/ad7625.c

   1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
   2 /*
   3  * Analog Devices Inc. AD7625 ADC driver
   4  *
   5  * Copyright 2024 Analog Devices Inc.
   6  * Copyright 2024 BayLibre, SAS
   7  *
   8  * Note that this driver requires the AXI ADC IP block configured for
   9  * LVDS to function. See Documentation/iio/ad7625.rst for more
  10  * information.
  11  */
  12
  13 #include <linux/clk.h>
  14 #include <linux/device.h>
  15 #include <linux/err.h>
  16 #include <linux/gpio/consumer.h>
  17 #include <linux/iio/backend.h>
  18 #include <linux/iio/iio.h>
  19 #include <linux/kernel.h>
  20 #include <linux/mod_devicetable.h>
  21 #include <linux/module.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/pwm.h>
  24 #include <linux/regulator/consumer.h>
  25 #include <linux/units.h>
  26
  27 #define AD7625_INTERNAL_REF_MV 4096
  28 #define AD7960_MAX_NBW_FREQ (2 * MEGA)
  29
  30 struct ad7625_timing_spec {
  31         /* Max conversion high time (t_{CNVH}). */
  32         unsigned int conv_high_ns;
  33         /* Max conversion to MSB delay (t_{MSB}). */
  34         unsigned int conv_msb_ns;
  35 };
  36
  37 struct ad7625_chip_info {
  38         const char *name;
  39         const unsigned int max_sample_freq_hz;
  40         const struct ad7625_timing_spec *timing_spec;
  41         const struct iio_chan_spec chan_spec;
  42         const bool has_power_down_state;
  43         const bool has_bandwidth_control;
  44         const bool has_internal_vref;
  45 };
  46
  47 /* AD7625_CHAN_SPEC - Define a chan spec structure for a specific chip */
  48 #define AD7625_CHAN_SPEC(_bits) {                                       \
  49         .type = IIO_VOLTAGE,                                            \
  50         .indexed = 1,                                                   \
  51         .differential = 1,                                              \
  52         .channel = 0,                                                   \
  53         .channel2 = 1,                                                  \
  54         .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE),                 \
  55         .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),        \
  56         .scan_index = 0,                                                \
  57         .scan_type.sign = 's',                                          \
  58         .scan_type.storagebits = (_bits) > 16 ? 32 : 16,                \
  59         .scan_type.realbits = (_bits),                                  \
  60 }
  61
  62 struct ad7625_state {
  63         const struct ad7625_chip_info *info;
  64         struct iio_backend *back;
  65         /* rate of the clock gated by the "clk_gate" PWM */
  66         u32 ref_clk_rate_hz;
  67         /* PWM burst signal for transferring acquired data to the host */
  68         struct pwm_device *clk_gate_pwm;
  69         /*
  70          * PWM control signal for initiating data conversion. Analog
  71          * inputs are sampled beginning on this signal's rising edge.
  72          */
  73         struct pwm_device *cnv_pwm;
  74         /*
  75          * Waveforms containing the last-requested and rounded
  76          * properties for the clk_gate and cnv PWMs
  77          */
  78         struct pwm_waveform clk_gate_wf;
  79         struct pwm_waveform cnv_wf;
  80         unsigned int vref_mv;
  81         u32 sampling_freq_hz;
  82         /*
  83          * Optional GPIOs for controlling device state. EN0 and EN1
  84          * determine voltage reference configuration and on/off state.
  85          * EN2 controls the device -3dB bandwidth (and by extension, max
  86          * sample rate). EN3 controls the VCM reference output. EN2 and
  87          * EN3 are only present for the AD796x devices.
  88          */
  89         struct gpio_desc *en_gpios[4];
  90         bool can_power_down;
  91         bool can_refin;
  92         bool can_ref_4v096;
  93         /*
  94          * Indicate whether the bandwidth can be narrow (9MHz).
  95          * When true, device sample rate must also be < 2MSPS.
  96          */
  97         bool can_narrow_bandwidth;
  98         /* Indicate whether the bandwidth can be wide (28MHz). */
  99         bool can_wide_bandwidth;
 100         bool can_ref_5v;
 101         bool can_snooze;
 102         bool can_test_pattern;
 103         /* Indicate whether there is a REFIN supply connected */
 104         bool have_refin;
 105 };
 106
 107 static const struct ad7625_timing_spec ad7625_timing_spec = {
 108         .conv_high_ns = 40,
 109         .conv_msb_ns = 145,
 110 };
 111
 112 static const struct ad7625_timing_spec ad7626_timing_spec = {
 113         .conv_high_ns = 40,
 114         .conv_msb_ns = 80,
 115 };
 116
 117 /*
 118  * conv_msb_ns is set to 0 instead of the datasheet maximum of 200ns to
 119  * avoid exceeding the minimum conversion time, i.e. it is effectively
 120  * modulo 200 and offset by a full period. Values greater than or equal
 121  * to the period would be rejected by the PWM API.
 122  */
 123 static const struct ad7625_timing_spec ad7960_timing_spec = {
 124         .conv_high_ns = 80,
 125         .conv_msb_ns = 0,
 126 };
 127
 128 static const struct ad7625_chip_info ad7625_chip_info = {
 129         .name = "ad7625",
 130         .max_sample_freq_hz = 6 * MEGA,
 131         .timing_spec = &ad7625_timing_spec,
 132         .chan_spec = AD7625_CHAN_SPEC(16),
 133         .has_power_down_state = false,
 134         .has_bandwidth_control = false,
 135         .has_internal_vref = true,
 136 };
 137
 138 static const struct ad7625_chip_info ad7626_chip_info = {
 139         .name = "ad7626",
 140         .max_sample_freq_hz = 10 * MEGA,
 141         .timing_spec = &ad7626_timing_spec,
 142         .chan_spec = AD7625_CHAN_SPEC(16),
 143         .has_power_down_state = true,
 144         .has_bandwidth_control = false,
 145         .has_internal_vref = true,
 146 };
 147
 148 static const struct ad7625_chip_info ad7960_chip_info = {
 149         .name = "ad7960",
 150         .max_sample_freq_hz = 5 * MEGA,
 151         .timing_spec = &ad7960_timing_spec,
 152         .chan_spec = AD7625_CHAN_SPEC(18),
 153         .has_power_down_state = true,
 154         .has_bandwidth_control = true,
 155         .has_internal_vref = false,
 156 };
 157
 158 static const struct ad7625_chip_info ad7961_chip_info = {
 159         .name = "ad7961",
 160         .max_sample_freq_hz = 5 * MEGA,
 161         .timing_spec = &ad7960_timing_spec,
 162         .chan_spec = AD7625_CHAN_SPEC(16),
 163         .has_power_down_state = true,
 164         .has_bandwidth_control = true,
 165         .has_internal_vref = false,
 166 };
 167
 168 enum ad7960_mode {
 169         AD7960_MODE_POWER_DOWN,
 170         AD7960_MODE_SNOOZE,
 171         AD7960_MODE_NARROW_BANDWIDTH,
 172         AD7960_MODE_WIDE_BANDWIDTH,
 173         AD7960_MODE_TEST_PATTERN,
 174 };
 175
 176 static int ad7625_set_sampling_freq(struct ad7625_state *st, u32 freq)
 177 {
 178         u32 target;
 179         struct pwm_waveform clk_gate_wf = { }, cnv_wf = { };
 180         int ret;
 181
 182         target = DIV_ROUND_UP(NSEC_PER_SEC, freq);
 183         cnv_wf.period_length_ns = clamp(target, 100, 10 * KILO);
 184
 185         /*
 186          * Use the maximum conversion time t_CNVH from the datasheet as
 187          * the duty_cycle for ref_clk, cnv, and clk_gate
 188          */
 189         cnv_wf.duty_length_ns = st->info->timing_spec->conv_high_ns;
 190
 191         ret = pwm_round_waveform_might_sleep(st->cnv_pwm, &cnv_wf);
 192         if (ret)
 193                 return ret;
 194
 195         /*
 196          * Set up the burst signal for transferring data. period and
 197          * offset should mirror the CNV signal
 198          */
 199         clk_gate_wf.period_length_ns = cnv_wf.period_length_ns;
 200
 201         clk_gate_wf.duty_length_ns = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC *
 202                 st->info->chan_spec.scan_type.realbits,
 203                 st->ref_clk_rate_hz);
 204
 205         /* max t_MSB from datasheet */
 206         clk_gate_wf.duty_offset_ns = st->info->timing_spec->conv_msb_ns;
 207
 208         ret = pwm_round_waveform_might_sleep(st->clk_gate_pwm, &clk_gate_wf);
 209         if (ret)
 210                 return ret;
 211
 212         st->cnv_wf = cnv_wf;
 213         st->clk_gate_wf = clk_gate_wf;
 214
 215         /* TODO: Add a rounding API for PWMs that can simplify this */
 216         target = DIV_ROUND_CLOSEST(st->ref_clk_rate_hz, freq);
 217         st->sampling_freq_hz = DIV_ROUND_CLOSEST(st->ref_clk_rate_hz,
 218                                                  target);
 219
 220         return 0;
 221 }
 222
 223 static int ad7625_read_raw(struct iio_dev *indio_dev,
 224                            const struct iio_chan_spec *chan,
 225                            int *val, int *val2, long info)
 226 {
 227         struct ad7625_state *st = iio_priv(indio_dev);
 228
 229         switch (info) {
 230         case IIO_CHAN_INFO_SAMP_FREQ:
 231                 *val = st->sampling_freq_hz;
 232
 233                 return IIO_VAL_INT;
 234
 235         case IIO_CHAN_INFO_SCALE:
 236                 *val = st->vref_mv;
 237                 *val2 = chan->scan_type.realbits - 1;
 238
 239                 return IIO_VAL_FRACTIONAL_LOG2;
 240
 241         default:
 242                 return -EINVAL;
 243         }
 244 }
 245
 246 static int ad7625_write_raw(struct iio_dev *indio_dev,
 247                             struct iio_chan_spec const *chan,
 248                             int val, int val2, long info)
 249 {
 250         struct ad7625_state *st = iio_priv(indio_dev);
 251
 252         switch (info) {
 253         case IIO_CHAN_INFO_SAMP_FREQ:
 254                 iio_device_claim_direct_scoped(return -EBUSY, indio_dev)
 255                         return ad7625_set_sampling_freq(st, val);
 256                 unreachable();
 257         default:
 258                 return -EINVAL;
 259         }
 260 }
 261
 262 static int ad7625_parse_mode(struct device *dev, struct ad7625_state *st,
 263                              int num_gpios)
 264 {
 265         bool en_always_on[4], en_always_off[4];
 266         bool en_may_be_on[4], en_may_be_off[4];
 267         char en_gpio_buf[4];
 268         char always_on_buf[18];
 269         int i;
 270
 271         for (i = 0; i < num_gpios; i++) {
 272                 snprintf(en_gpio_buf, sizeof(en_gpio_buf), "en%d", i);
 273                 snprintf(always_on_buf, sizeof(always_on_buf),
 274                          "adi,en%d-always-on", i);
 275                 /* Set the device to 0b0000 (power-down mode) by default */
 276                 st->en_gpios[i] = devm_gpiod_get_optional(dev, en_gpio_buf,
 277                                                           GPIOD_OUT_LOW);
 278                 if (IS_ERR(st->en_gpios[i]))
 279                         return dev_err_probe(dev, PTR_ERR(st->en_gpios[i]),
 280                                              "failed to get EN%d GPIO\n", i);
 281
 282                 en_always_on[i] = device_property_read_bool(dev, always_on_buf);
 283                 if (st->en_gpios[i] && en_always_on[i])
 284                         return dev_err_probe(dev, -EINVAL,
 285                                 "cannot have adi,en%d-always-on and en%d-gpios\n", i, i);
 286
 287                 en_may_be_off[i] = !en_always_on[i];
 288                 en_may_be_on[i] = en_always_on[i] || st->en_gpios[i];
 289                 en_always_off[i] = !en_always_on[i] && !st->en_gpios[i];
 290         }
 291
 292         /*
 293          * Power down is mode 0bXX00, but not all devices have a valid
 294          * power down state.
 295          */
 296         st->can_power_down = en_may_be_off[1] && en_may_be_off[0] &&
 297                              st->info->has_power_down_state;
 298         /*
 299          * The REFIN pin can take a 1.2V (AD762x) or 2.048V (AD796x)
 300          * external reference when the mode is 0bXX01.
 301          */
 302         st->can_refin = en_may_be_off[1] && en_may_be_on[0];
 303         /* 4.096V can be applied to REF when the EN mode is 0bXX10. */
 304         st->can_ref_4v096 = en_may_be_on[1] && en_may_be_off[0];
 305
 306         /* Avoid AD796x-specific setup if the part is an AD762x */
 307         if (num_gpios == 2)
 308                 return 0;
 309
 310         /* mode 0b1100 (AD796x) is invalid */
 311         if (en_always_on[3] && en_always_on[2] &&
 312             en_always_off[1] && en_always_off[0])
 313                 return dev_err_probe(dev, -EINVAL,
 314                                      "EN GPIOs set to invalid mode 0b1100\n");
 315         /*
 316          * 5V can be applied to the AD796x REF pin when the EN mode is
 317          * the same (0bX001 or 0bX101) as for can_refin, and REFIN is
 318          * 0V.
 319          */
 320         st->can_ref_5v = st->can_refin;
 321         /*
 322          * Bandwidth (AD796x) is controlled solely by EN2. If it's
 323          * specified and not hard-wired, then we can configure it to
 324          * change the bandwidth between 28MHz and 9MHz.
 325          */
 326         st->can_narrow_bandwidth = en_may_be_on[2];
 327         /* Wide bandwidth mode is possible if EN2 can be 0. */
 328         st->can_wide_bandwidth = en_may_be_off[2];
 329         /* Snooze mode (AD796x) is 0bXX11 when REFIN = 0V. */
 330         st->can_snooze = en_may_be_on[1] && en_may_be_on[0];
 331         /* Test pattern mode (AD796x) is 0b0100. */
 332         st->can_test_pattern = en_may_be_off[3] && en_may_be_on[2] &&
 333                                en_may_be_off[1] && en_may_be_off[0];
 334
 335         return 0;
 336 }
 337
 338 /* Set EN1 and EN0 based on reference voltage source */
 339 static void ad7625_set_en_gpios_for_vref(struct ad7625_state *st,
 340                                          bool have_refin, int ref_mv)
 341 {
 342         if (have_refin || ref_mv == 5000) {
 343                 gpiod_set_value_cansleep(st->en_gpios[1], 0);
 344                 gpiod_set_value_cansleep(st->en_gpios[0], 1);
 345         } else if (ref_mv == 4096) {
 346                 gpiod_set_value_cansleep(st->en_gpios[1], 1);
 347                 gpiod_set_value_cansleep(st->en_gpios[0], 0);
 348         } else {
 349                 /*
 350                  * Unreachable by AD796x, since the driver will error if
 351                  * neither REF nor REFIN is provided
 352                  */
 353                 gpiod_set_value_cansleep(st->en_gpios[1], 1);
 354                 gpiod_set_value_cansleep(st->en_gpios[0], 1);
 355         }
 356 }
 357
 358 static int ad7960_set_mode(struct ad7625_state *st, enum ad7960_mode mode,
 359                            bool have_refin, int ref_mv)
 360 {
 361         switch (mode) {
 362         case AD7960_MODE_POWER_DOWN:
 363                 if (!st->can_power_down)
 364                         return -EINVAL;
 365
 366                 gpiod_set_value_cansleep(st->en_gpios[2], 0);
 367                 gpiod_set_value_cansleep(st->en_gpios[1], 0);
 368                 gpiod_set_value_cansleep(st->en_gpios[0], 0);
 369
 370                 return 0;
 371
 372         case AD7960_MODE_SNOOZE:
 373                 if (!st->can_snooze)
 374                         return -EINVAL;
 375
 376                 gpiod_set_value_cansleep(st->en_gpios[1], 1);
 377                 gpiod_set_value_cansleep(st->en_gpios[0], 1);
 378
 379                 return 0;
 380
 381         case AD7960_MODE_NARROW_BANDWIDTH:
 382                 if (!st->can_narrow_bandwidth)
 383                         return -EINVAL;
 384
 385                 gpiod_set_value_cansleep(st->en_gpios[2], 1);
 386                 ad7625_set_en_gpios_for_vref(st, have_refin, ref_mv);
 387
 388                 return 0;
 389
 390         case AD7960_MODE_WIDE_BANDWIDTH:
 391                 if (!st->can_wide_bandwidth)
 392                         return -EINVAL;
 393
 394                 gpiod_set_value_cansleep(st->en_gpios[2], 0);
 395                 ad7625_set_en_gpios_for_vref(st, have_refin, ref_mv);
 396
 397                 return 0;
 398
 399         case AD7960_MODE_TEST_PATTERN:
 400                 if (!st->can_test_pattern)
 401                         return -EINVAL;
 402
 403                 gpiod_set_value_cansleep(st->en_gpios[3], 0);
 404                 gpiod_set_value_cansleep(st->en_gpios[2], 1);
 405                 gpiod_set_value_cansleep(st->en_gpios[1], 0);
 406                 gpiod_set_value_cansleep(st->en_gpios[0], 0);
 407
 408                 return 0;
 409
 410         default:
 411                 return -EINVAL;
 412         }
 413 }
 414
 415 static int ad7625_buffer_preenable(struct iio_dev *indio_dev)
 416 {
 417         struct ad7625_state *st = iio_priv(indio_dev);
 418         int ret;
 419
 420         ret = pwm_set_waveform_might_sleep(st->cnv_pwm, &st->cnv_wf, false);
 421         if (ret)
 422                 return ret;
 423
 424         ret = pwm_set_waveform_might_sleep(st->clk_gate_pwm,
 425                                            &st->clk_gate_wf, false);
 426         if (ret) {
 427                 /* Disable cnv PWM if clk_gate setup failed */
 428                 pwm_disable(st->cnv_pwm);
 429                 return ret;
 430         }
 431
 432         return 0;
 433 }
 434
 435 static int ad7625_buffer_postdisable(struct iio_dev *indio_dev)
 436 {
 437         struct ad7625_state *st = iio_priv(indio_dev);
 438
 439         pwm_disable(st->clk_gate_pwm);
 440         pwm_disable(st->cnv_pwm);
 441
 442         return 0;
 443 }
 444
 445 static const struct iio_info ad7625_info = {
 446         .read_raw = ad7625_read_raw,
 447         .write_raw = ad7625_write_raw,
 448 };
 449
 450 static const struct iio_buffer_setup_ops ad7625_buffer_setup_ops = {
 451         .preenable = &ad7625_buffer_preenable,
 452         .postdisable = &ad7625_buffer_postdisable,
 453 };
 454
 455 static int devm_ad7625_pwm_get(struct device *dev,
 456                                struct ad7625_state *st)
 457 {
 458         struct clk *ref_clk;
 459         u32 ref_clk_rate_hz;
 460
 461         st->cnv_pwm = devm_pwm_get(dev, "cnv");
 462         if (IS_ERR(st->cnv_pwm))
 463                 return dev_err_probe(dev, PTR_ERR(st->cnv_pwm),
 464                                      "failed to get cnv pwm\n");
 465
 466         /* Preemptively disable the PWM in case it was enabled at boot */
 467         pwm_disable(st->cnv_pwm);
 468
 469         st->clk_gate_pwm = devm_pwm_get(dev, "clk_gate");
 470         if (IS_ERR(st->clk_gate_pwm))
 471                 return dev_err_probe(dev, PTR_ERR(st->clk_gate_pwm),
 472                                      "failed to get clk_gate pwm\n");
 473
 474         /* Preemptively disable the PWM in case it was enabled at boot */
 475         pwm_disable(st->clk_gate_pwm);
 476
 477         ref_clk = devm_clk_get_enabled(dev, NULL);
 478         if (IS_ERR(ref_clk))
 479                 return dev_err_probe(dev, PTR_ERR(ref_clk),
 480                                      "failed to get ref_clk");
 481
 482         ref_clk_rate_hz = clk_get_rate(ref_clk);
 483         if (!ref_clk_rate_hz)
 484                 return dev_err_probe(dev, -EINVAL,
 485                                      "failed to get ref_clk rate");
 486
 487         st->ref_clk_rate_hz = ref_clk_rate_hz;
 488
 489         return 0;
 490 }
 491
 492 /*
 493  * There are three required input voltages for each device, plus two
 494  * conditionally-optional (depending on part) REF and REFIN voltages
 495  * where their validity depends upon the EN pin configuration.
 496  *
 497  * Power-up info for the device says to bring up vio, then vdd2, then
 498  * vdd1, so list them in that order in the regulator_names array.
 499  *
 500  * The reference voltage source is determined like so:
 501  * - internal reference: neither REF or REFIN is connected (invalid for
 502  *   AD796x)
 503  * - internal buffer, external reference: REF not connected, REFIN
 504  *   connected
 505  * - external reference: REF connected, REFIN not connected
 506  */
 507 static int devm_ad7625_regulator_setup(struct device *dev,
 508                                        struct ad7625_state *st)
 509 {
 510         static const char * const regulator_names[] = { "vio", "vdd2", "vdd1" };
 511         int ret, ref_mv;
 512
 513         ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulator_names),
 514                                              regulator_names);
 515         if (ret)
 516                 return ret;
 517
 518         ret = devm_regulator_get_enable_read_voltage(dev, "ref");
 519         if (ret < 0 && ret != -ENODEV)
 520                 return dev_err_probe(dev, ret, "failed to get REF voltage\n");
 521
 522         ref_mv = ret == -ENODEV ? 0 : ret / 1000;
 523
 524         ret = devm_regulator_get_enable_optional(dev, "refin");
 525         if (ret < 0 && ret != -ENODEV)
 526                 return dev_err_probe(dev, ret, "failed to get REFIN voltage\n");
 527
 528         st->have_refin = ret != -ENODEV;
 529
 530         if (st->have_refin && !st->can_refin)
 531                 return dev_err_probe(dev, -EINVAL,
 532                                      "REFIN provided in unsupported mode\n");
 533
 534         if (!st->info->has_internal_vref && !st->have_refin && !ref_mv)
 535                 return dev_err_probe(dev, -EINVAL,
 536                                      "Need either REFIN or REF");
 537
 538         if (st->have_refin && ref_mv)
 539                 return dev_err_probe(dev, -EINVAL,
 540                                      "cannot have both REFIN and REF supplies\n");
 541
 542         if (ref_mv == 4096 && !st->can_ref_4v096)
 543                 return dev_err_probe(dev, -EINVAL,
 544                                      "REF is 4.096V in unsupported mode\n");
 545
 546         if (ref_mv == 5000 && !st->can_ref_5v)
 547                 return dev_err_probe(dev, -EINVAL,
 548                                      "REF is 5V in unsupported mode\n");
 549
 550         st->vref_mv = ref_mv ?: AD7625_INTERNAL_REF_MV;
 551
 552         return 0;
 553 }
 554
 555 static int ad7625_probe(struct platform_device *pdev)
 556 {
 557         struct device *dev = &pdev->dev;
 558         struct iio_dev *indio_dev;
 559         struct ad7625_state *st;
 560         int ret;
 561         u32 default_sample_freq;
 562
 563         indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
 564         if (!indio_dev)
 565                 return -ENOMEM;
 566
 567         st = iio_priv(indio_dev);
 568
 569         st->info = device_get_match_data(dev);
 570         if (!st->info)
 571                 return dev_err_probe(dev, -EINVAL, "no chip info\n");
 572
 573         if (device_property_read_bool(dev, "adi,no-dco"))
 574                 return dev_err_probe(dev, -EINVAL,
 575                                      "self-clocked mode not supported\n");
 576
 577         if (st->info->has_bandwidth_control)
 578                 ret = ad7625_parse_mode(dev, st, 4);
 579         else
 580                 ret = ad7625_parse_mode(dev, st, 2);
 581
 582         if (ret)
 583                 return ret;
 584
 585         ret = devm_ad7625_regulator_setup(dev, st);
 586         if (ret)
 587                 return ret;
 588
 589         /* Set the device mode based on detected EN configuration. */
 590         if (!st->info->has_bandwidth_control) {
 591                 ad7625_set_en_gpios_for_vref(st, st->have_refin, st->vref_mv);
 592         } else {
 593                 /*
 594                  * If neither sampling mode is available, then report an error,
 595                  * since the other modes are not useful defaults.
 596                  */
 597                 if (st->can_wide_bandwidth) {
 598                         ret = ad7960_set_mode(st, AD7960_MODE_WIDE_BANDWIDTH,
 599                                               st->have_refin, st->vref_mv);
 600                 } else if (st->can_narrow_bandwidth) {
 601                         ret = ad7960_set_mode(st, AD7960_MODE_NARROW_BANDWIDTH,
 602                                               st->have_refin, st->vref_mv);
 603                 } else {
 604                         return dev_err_probe(dev, -EINVAL,
 605                                 "couldn't set device to wide or narrow bandwidth modes\n");
 606                 }
 607
 608                 if (ret)
 609                         return dev_err_probe(dev, -EINVAL,
 610                                              "failed to set EN pins\n");
 611         }
 612
 613         ret = devm_ad7625_pwm_get(dev, st);
 614         if (ret)
 615                 return ret;
 616
 617         indio_dev->channels = &st->info->chan_spec;
 618         indio_dev->num_channels = 1;
 619         indio_dev->name = st->info->name;
 620         indio_dev->info = &ad7625_info;
 621         indio_dev->setup_ops = &ad7625_buffer_setup_ops;
 622
 623         st->back = devm_iio_backend_get(dev, NULL);
 624         if (IS_ERR(st->back))
 625                 return dev_err_probe(dev, PTR_ERR(st->back),
 626                                      "failed to get IIO backend");
 627
 628         ret = devm_iio_backend_request_buffer(dev, st->back, indio_dev);
 629         if (ret)
 630                 return ret;
 631
 632         ret = devm_iio_backend_enable(dev, st->back);
 633         if (ret)
 634                 return ret;
 635
 636         /*
 637          * Set the initial sampling frequency to the maximum, unless the
 638          * AD796x device is limited to narrow bandwidth by EN2 == 1, in
 639          * which case the sampling frequency should be limited to 2MSPS
 640          */
 641         default_sample_freq = st->info->max_sample_freq_hz;
 642         if (st->info->has_bandwidth_control && !st->can_wide_bandwidth)
 643                 default_sample_freq = AD7960_MAX_NBW_FREQ;
 644
 645         ret = ad7625_set_sampling_freq(st, default_sample_freq);
 646         if (ret)
 647                 dev_err_probe(dev, ret,
 648                               "failed to set valid sampling frequency\n");
 649
 650         return devm_iio_device_register(dev, indio_dev);
 651 }
 652
 653 static const struct of_device_id ad7625_of_match[] = {
 654         { .compatible = "adi,ad7625", .data = &ad7625_chip_info },
 655         { .compatible = "adi,ad7626", .data = &ad7626_chip_info },
 656         { .compatible = "adi,ad7960", .data = &ad7960_chip_info },
 657         { .compatible = "adi,ad7961", .data = &ad7961_chip_info },
 658         { }
 659 };
 660 MODULE_DEVICE_TABLE(of, ad7625_of_match);
 661
 662 static const struct platform_device_id ad7625_device_ids[] = {
 663         { .name = "ad7625", .driver_data = (kernel_ulong_t)&ad7625_chip_info },
 664         { .name = "ad7626", .driver_data = (kernel_ulong_t)&ad7626_chip_info },
 665         { .name = "ad7960", .driver_data = (kernel_ulong_t)&ad7960_chip_info },
 666         { .name = "ad7961", .driver_data = (kernel_ulong_t)&ad7961_chip_info },
 667         { }
 668 };
 669 MODULE_DEVICE_TABLE(platform, ad7625_device_ids);
 670
 671 static struct platform_driver ad7625_driver = {
 672         .probe = ad7625_probe,
 673         .driver = {
 674                 .name = "ad7625",
 675                 .of_match_table = ad7625_of_match,
 676         },
 677         .id_table = ad7625_device_ids,
 678 };
 679 module_platform_driver(ad7625_driver);
 680
 681 MODULE_AUTHOR("Trevor Gamblin <tgamblin@baylibre.com>");
 682 MODULE_DESCRIPTION("Analog Devices AD7625 ADC");
 683 MODULE_LICENSE("Dual BSD/GPL");
 684 MODULE_IMPORT_NS("IIO_BACKEND");