1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * mcp3422.c - driver for the Microchip mcp3421/2/3/4/5/6/7/8 chip family
5 * Copyright (C) 2013, Angelo Compagnucci
6 * Author: Angelo Compagnucci <angelo.compagnucci@gmail.com>
8 * Datasheet: http://ww1.microchip.com/downloads/en/devicedoc/22088b.pdf
9 * https://ww1.microchip.com/downloads/en/DeviceDoc/22226a.pdf
10 * https://ww1.microchip.com/downloads/en/DeviceDoc/22072b.pdf
12 * This driver exports the value of analog input voltage to sysfs, the
16 #include <linux/err.h>
17 #include <linux/i2c.h>
18 #include <linux/module.h>
19 #include <linux/mod_devicetable.h>
20 #include <linux/delay.h>
21 #include <linux/sysfs.h>
22 #include <linux/unaligned.h>
24 #include <linux/iio/iio.h>
25 #include <linux/iio/sysfs.h>
28 #define MCP3422_CHANNEL_MASK 0x60
29 #define MCP3422_PGA_MASK 0x03
30 #define MCP3422_SRATE_MASK 0x0C
31 #define MCP3422_SRATE_240 0x0
32 #define MCP3422_SRATE_60 0x1
33 #define MCP3422_SRATE_15 0x2
34 #define MCP3422_SRATE_3 0x3
35 #define MCP3422_PGA_1 0
36 #define MCP3422_PGA_2 1
37 #define MCP3422_PGA_4 2
38 #define MCP3422_PGA_8 3
39 #define MCP3422_CONT_SAMPLING 0x10
41 #define MCP3422_CHANNEL(config) (((config) & MCP3422_CHANNEL_MASK) >> 5)
42 #define MCP3422_PGA(config) ((config) & MCP3422_PGA_MASK)
43 #define MCP3422_SAMPLE_RATE(config) (((config) & MCP3422_SRATE_MASK) >> 2)
45 #define MCP3422_CHANNEL_VALUE(value) (((value) << 5) & MCP3422_CHANNEL_MASK)
46 #define MCP3422_PGA_VALUE(value) ((value) & MCP3422_PGA_MASK)
47 #define MCP3422_SAMPLE_RATE_VALUE(value) ((value << 2) & MCP3422_SRATE_MASK)
49 #define MCP3422_CHAN(_index) \
51 .type = IIO_VOLTAGE, \
54 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
55 | BIT(IIO_CHAN_INFO_SCALE), \
56 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
59 static const int mcp3422_scales
[4][4] = {
60 { 1000000, 500000, 250000, 125000 },
61 { 250000, 125000, 62500, 31250 },
62 { 62500, 31250, 15625, 7812 },
63 { 15625, 7812, 3906, 1953 } };
65 /* Constant msleep times for data acquisitions */
66 static const int mcp3422_read_times
[4] = {
67 [MCP3422_SRATE_240
] = 1000 / 240,
68 [MCP3422_SRATE_60
] = 1000 / 60,
69 [MCP3422_SRATE_15
] = 1000 / 15,
70 [MCP3422_SRATE_3
] = 1000 / 3 };
72 /* sample rates to integer conversion table */
73 static const int mcp3422_sample_rates
[4] = {
74 [MCP3422_SRATE_240
] = 240,
75 [MCP3422_SRATE_60
] = 60,
76 [MCP3422_SRATE_15
] = 15,
77 [MCP3422_SRATE_3
] = 3 };
79 /* sample rates to sign extension table */
80 static const int mcp3422_sign_extend
[4] = {
81 [MCP3422_SRATE_240
] = 11,
82 [MCP3422_SRATE_60
] = 13,
83 [MCP3422_SRATE_15
] = 15,
84 [MCP3422_SRATE_3
] = 17 };
86 /* Client data (each client gets its own) */
88 struct i2c_client
*i2c
;
95 static int mcp3422_update_config(struct mcp3422
*adc
, u8 newconfig
)
99 ret
= i2c_master_send(adc
->i2c
, &newconfig
, 1);
101 adc
->config
= newconfig
;
108 static int mcp3422_read(struct mcp3422
*adc
, int *value
, u8
*config
)
111 u8 sample_rate
= MCP3422_SAMPLE_RATE(adc
->config
);
112 u8 buf
[4] = {0, 0, 0, 0};
115 if (sample_rate
== MCP3422_SRATE_3
) {
116 ret
= i2c_master_recv(adc
->i2c
, buf
, 4);
117 temp
= get_unaligned_be24(&buf
[0]);
120 ret
= i2c_master_recv(adc
->i2c
, buf
, 3);
121 temp
= get_unaligned_be16(&buf
[0]);
125 *value
= sign_extend32(temp
, mcp3422_sign_extend
[sample_rate
]);
130 static int mcp3422_read_channel(struct mcp3422
*adc
,
131 struct iio_chan_spec
const *channel
, int *value
)
135 u8 req_channel
= channel
->channel
;
137 mutex_lock(&adc
->lock
);
139 if (req_channel
!= MCP3422_CHANNEL(adc
->config
)) {
140 config
= adc
->config
;
141 config
&= ~MCP3422_CHANNEL_MASK
;
142 config
|= MCP3422_CHANNEL_VALUE(req_channel
);
143 config
&= ~MCP3422_PGA_MASK
;
144 config
|= MCP3422_PGA_VALUE(adc
->pga
[req_channel
]);
145 ret
= mcp3422_update_config(adc
, config
);
147 mutex_unlock(&adc
->lock
);
150 msleep(mcp3422_read_times
[MCP3422_SAMPLE_RATE(adc
->config
)]);
153 ret
= mcp3422_read(adc
, value
, &config
);
155 mutex_unlock(&adc
->lock
);
160 static int mcp3422_read_raw(struct iio_dev
*iio
,
161 struct iio_chan_spec
const *channel
, int *val1
,
162 int *val2
, long mask
)
164 struct mcp3422
*adc
= iio_priv(iio
);
167 u8 sample_rate
= MCP3422_SAMPLE_RATE(adc
->config
);
168 u8 pga
= MCP3422_PGA(adc
->config
);
171 case IIO_CHAN_INFO_RAW
:
172 err
= mcp3422_read_channel(adc
, channel
, val1
);
177 case IIO_CHAN_INFO_SCALE
:
180 *val2
= mcp3422_scales
[sample_rate
][pga
];
181 return IIO_VAL_INT_PLUS_NANO
;
183 case IIO_CHAN_INFO_SAMP_FREQ
:
184 *val1
= mcp3422_sample_rates
[MCP3422_SAMPLE_RATE(adc
->config
)];
194 static int mcp3422_write_raw(struct iio_dev
*iio
,
195 struct iio_chan_spec
const *channel
, int val1
,
198 struct mcp3422
*adc
= iio_priv(iio
);
200 u8 config
= adc
->config
;
201 u8 req_channel
= channel
->channel
;
202 u8 sample_rate
= MCP3422_SAMPLE_RATE(config
);
206 case IIO_CHAN_INFO_SCALE
:
210 for (i
= 0; i
< ARRAY_SIZE(mcp3422_scales
[0]); i
++) {
211 if (val2
== mcp3422_scales
[sample_rate
][i
]) {
212 adc
->pga
[req_channel
] = i
;
214 config
&= ~MCP3422_CHANNEL_MASK
;
215 config
|= MCP3422_CHANNEL_VALUE(req_channel
);
216 config
&= ~MCP3422_PGA_MASK
;
217 config
|= MCP3422_PGA_VALUE(adc
->pga
[req_channel
]);
219 return mcp3422_update_config(adc
, config
);
224 case IIO_CHAN_INFO_SAMP_FREQ
:
227 temp
= MCP3422_SRATE_240
;
230 temp
= MCP3422_SRATE_60
;
233 temp
= MCP3422_SRATE_15
;
238 temp
= MCP3422_SRATE_3
;
244 config
&= ~MCP3422_CHANNEL_MASK
;
245 config
|= MCP3422_CHANNEL_VALUE(req_channel
);
246 config
&= ~MCP3422_SRATE_MASK
;
247 config
|= MCP3422_SAMPLE_RATE_VALUE(temp
);
249 return mcp3422_update_config(adc
, config
);
258 static int mcp3422_write_raw_get_fmt(struct iio_dev
*indio_dev
,
259 struct iio_chan_spec
const *chan
, long mask
)
262 case IIO_CHAN_INFO_SCALE
:
263 return IIO_VAL_INT_PLUS_NANO
;
264 case IIO_CHAN_INFO_SAMP_FREQ
:
265 return IIO_VAL_INT_PLUS_MICRO
;
271 static ssize_t
mcp3422_show_samp_freqs(struct device
*dev
,
272 struct device_attribute
*attr
, char *buf
)
274 struct mcp3422
*adc
= iio_priv(dev_to_iio_dev(dev
));
277 return sprintf(buf
, "240 60 15\n");
279 return sprintf(buf
, "240 60 15 3\n");
282 static ssize_t
mcp3422_show_scales(struct device
*dev
,
283 struct device_attribute
*attr
, char *buf
)
285 struct mcp3422
*adc
= iio_priv(dev_to_iio_dev(dev
));
286 u8 sample_rate
= MCP3422_SAMPLE_RATE(adc
->config
);
288 return sprintf(buf
, "0.%09u 0.%09u 0.%09u 0.%09u\n",
289 mcp3422_scales
[sample_rate
][0],
290 mcp3422_scales
[sample_rate
][1],
291 mcp3422_scales
[sample_rate
][2],
292 mcp3422_scales
[sample_rate
][3]);
295 static IIO_DEVICE_ATTR(sampling_frequency_available
, S_IRUGO
,
296 mcp3422_show_samp_freqs
, NULL
, 0);
297 static IIO_DEVICE_ATTR(in_voltage_scale_available
, S_IRUGO
,
298 mcp3422_show_scales
, NULL
, 0);
300 static struct attribute
*mcp3422_attributes
[] = {
301 &iio_dev_attr_sampling_frequency_available
.dev_attr
.attr
,
302 &iio_dev_attr_in_voltage_scale_available
.dev_attr
.attr
,
306 static const struct attribute_group mcp3422_attribute_group
= {
307 .attrs
= mcp3422_attributes
,
310 static const struct iio_chan_spec mcp3421_channels
[] = {
314 static const struct iio_chan_spec mcp3422_channels
[] = {
319 static const struct iio_chan_spec mcp3424_channels
[] = {
326 static const struct iio_info mcp3422_info
= {
327 .read_raw
= mcp3422_read_raw
,
328 .write_raw
= mcp3422_write_raw
,
329 .write_raw_get_fmt
= mcp3422_write_raw_get_fmt
,
330 .attrs
= &mcp3422_attribute_group
,
333 static int mcp3422_probe(struct i2c_client
*client
)
335 const struct i2c_device_id
*id
= i2c_client_get_device_id(client
);
336 struct iio_dev
*indio_dev
;
341 if (!i2c_check_functionality(client
->adapter
, I2C_FUNC_I2C
))
344 indio_dev
= devm_iio_device_alloc(&client
->dev
, sizeof(*adc
));
348 adc
= iio_priv(indio_dev
);
350 adc
->id
= (u8
)(id
->driver_data
);
352 mutex_init(&adc
->lock
);
354 indio_dev
->name
= dev_name(&client
->dev
);
355 indio_dev
->modes
= INDIO_DIRECT_MODE
;
356 indio_dev
->info
= &mcp3422_info
;
361 indio_dev
->channels
= mcp3421_channels
;
362 indio_dev
->num_channels
= ARRAY_SIZE(mcp3421_channels
);
368 indio_dev
->channels
= mcp3422_channels
;
369 indio_dev
->num_channels
= ARRAY_SIZE(mcp3422_channels
);
373 indio_dev
->channels
= mcp3424_channels
;
374 indio_dev
->num_channels
= ARRAY_SIZE(mcp3424_channels
);
378 /* meaningful default configuration */
379 config
= (MCP3422_CONT_SAMPLING
380 | MCP3422_CHANNEL_VALUE(0)
381 | MCP3422_PGA_VALUE(MCP3422_PGA_1
)
382 | MCP3422_SAMPLE_RATE_VALUE(MCP3422_SRATE_240
));
383 err
= mcp3422_update_config(adc
, config
);
387 err
= devm_iio_device_register(&client
->dev
, indio_dev
);
391 i2c_set_clientdata(client
, indio_dev
);
396 static const struct i2c_device_id mcp3422_id
[] = {
407 MODULE_DEVICE_TABLE(i2c
, mcp3422_id
);
409 static const struct of_device_id mcp3422_of_match
[] = {
410 { .compatible
= "mcp3422" },
413 MODULE_DEVICE_TABLE(of
, mcp3422_of_match
);
415 static struct i2c_driver mcp3422_driver
= {
418 .of_match_table
= mcp3422_of_match
,
420 .probe
= mcp3422_probe
,
421 .id_table
= mcp3422_id
,
423 module_i2c_driver(mcp3422_driver
);
425 MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
426 MODULE_DESCRIPTION("Microchip mcp3421/2/3/4/5/6/7/8 driver");
427 MODULE_LICENSE("GPL v2");