1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
3 * Copyright (c) 2018 Hisilicon Limited.
7 #include <rdma/ib_umem.h>
8 #include <rdma/uverbs_ioctl.h>
9 #include "hns_roce_device.h"
10 #include "hns_roce_cmd.h"
11 #include "hns_roce_hem.h"
13 void hns_roce_srq_event(struct hns_roce_dev
*hr_dev
, u32 srqn
, int event_type
)
15 struct hns_roce_srq_table
*srq_table
= &hr_dev
->srq_table
;
16 struct hns_roce_srq
*srq
;
18 xa_lock(&srq_table
->xa
);
19 srq
= xa_load(&srq_table
->xa
, srqn
& (hr_dev
->caps
.num_srqs
- 1));
21 refcount_inc(&srq
->refcount
);
22 xa_unlock(&srq_table
->xa
);
25 dev_warn(hr_dev
->dev
, "Async event for bogus SRQ %08x\n", srqn
);
29 srq
->event(srq
, event_type
);
31 if (refcount_dec_and_test(&srq
->refcount
))
35 static void hns_roce_ib_srq_event(struct hns_roce_srq
*srq
,
36 enum hns_roce_event event_type
)
38 struct hns_roce_dev
*hr_dev
= to_hr_dev(srq
->ibsrq
.device
);
39 struct ib_srq
*ibsrq
= &srq
->ibsrq
;
40 struct ib_event event
;
42 if (ibsrq
->event_handler
) {
43 event
.device
= ibsrq
->device
;
44 event
.element
.srq
= ibsrq
;
46 case HNS_ROCE_EVENT_TYPE_SRQ_LIMIT_REACH
:
47 event
.event
= IB_EVENT_SRQ_LIMIT_REACHED
;
49 case HNS_ROCE_EVENT_TYPE_SRQ_CATAS_ERROR
:
50 event
.event
= IB_EVENT_SRQ_ERR
;
54 "hns_roce:Unexpected event type 0x%x on SRQ %06lx\n",
55 event_type
, srq
->srqn
);
59 ibsrq
->event_handler(&event
, ibsrq
->srq_context
);
63 static int alloc_srqn(struct hns_roce_dev
*hr_dev
, struct hns_roce_srq
*srq
)
65 struct hns_roce_ida
*srq_ida
= &hr_dev
->srq_table
.srq_ida
;
68 id
= ida_alloc_range(&srq_ida
->ida
, srq_ida
->min
, srq_ida
->max
,
71 ibdev_err(&hr_dev
->ib_dev
, "failed to alloc srq(%d).\n", id
);
80 static void free_srqn(struct hns_roce_dev
*hr_dev
, struct hns_roce_srq
*srq
)
82 ida_free(&hr_dev
->srq_table
.srq_ida
.ida
, (int)srq
->srqn
);
85 static int hns_roce_create_srqc(struct hns_roce_dev
*hr_dev
,
86 struct hns_roce_srq
*srq
)
88 struct ib_device
*ibdev
= &hr_dev
->ib_dev
;
89 struct hns_roce_cmd_mailbox
*mailbox
;
92 mailbox
= hns_roce_alloc_cmd_mailbox(hr_dev
);
93 if (IS_ERR(mailbox
)) {
94 ibdev_err(ibdev
, "failed to alloc mailbox for SRQC.\n");
95 return PTR_ERR(mailbox
);
98 ret
= hr_dev
->hw
->write_srqc(srq
, mailbox
->buf
);
100 ibdev_err(ibdev
, "failed to write SRQC.\n");
104 ret
= hns_roce_create_hw_ctx(hr_dev
, mailbox
, HNS_ROCE_CMD_CREATE_SRQ
,
107 ibdev_err(ibdev
, "failed to config SRQC, ret = %d.\n", ret
);
110 hns_roce_free_cmd_mailbox(hr_dev
, mailbox
);
114 static int alloc_srqc(struct hns_roce_dev
*hr_dev
, struct hns_roce_srq
*srq
)
116 struct hns_roce_srq_table
*srq_table
= &hr_dev
->srq_table
;
117 struct ib_device
*ibdev
= &hr_dev
->ib_dev
;
120 ret
= hns_roce_table_get(hr_dev
, &srq_table
->table
, srq
->srqn
);
122 ibdev_err(ibdev
, "failed to get SRQC table, ret = %d.\n", ret
);
126 ret
= xa_err(xa_store_irq(&srq_table
->xa
, srq
->srqn
, srq
, GFP_KERNEL
));
128 ibdev_err(ibdev
, "failed to store SRQC, ret = %d.\n", ret
);
132 ret
= hns_roce_create_srqc(hr_dev
, srq
);
139 xa_erase_irq(&srq_table
->xa
, srq
->srqn
);
141 hns_roce_table_put(hr_dev
, &srq_table
->table
, srq
->srqn
);
146 static void free_srqc(struct hns_roce_dev
*hr_dev
, struct hns_roce_srq
*srq
)
148 struct hns_roce_srq_table
*srq_table
= &hr_dev
->srq_table
;
151 ret
= hns_roce_destroy_hw_ctx(hr_dev
, HNS_ROCE_CMD_DESTROY_SRQ
,
154 dev_err_ratelimited(hr_dev
->dev
, "DESTROY_SRQ failed (%d) for SRQN %06lx\n",
157 xa_erase_irq(&srq_table
->xa
, srq
->srqn
);
159 if (refcount_dec_and_test(&srq
->refcount
))
160 complete(&srq
->free
);
161 wait_for_completion(&srq
->free
);
163 hns_roce_table_put(hr_dev
, &srq_table
->table
, srq
->srqn
);
166 static int alloc_srq_idx(struct hns_roce_dev
*hr_dev
, struct hns_roce_srq
*srq
,
167 struct ib_udata
*udata
, unsigned long addr
)
169 struct hns_roce_idx_que
*idx_que
= &srq
->idx_que
;
170 struct ib_device
*ibdev
= &hr_dev
->ib_dev
;
171 struct hns_roce_buf_attr buf_attr
= {};
174 srq
->idx_que
.entry_shift
= ilog2(HNS_ROCE_IDX_QUE_ENTRY_SZ
);
176 buf_attr
.page_shift
= hr_dev
->caps
.idx_buf_pg_sz
+ PAGE_SHIFT
;
177 buf_attr
.region
[0].size
= to_hr_hem_entries_size(srq
->wqe_cnt
,
178 srq
->idx_que
.entry_shift
);
179 buf_attr
.region
[0].hopnum
= hr_dev
->caps
.idx_hop_num
;
180 buf_attr
.region_count
= 1;
182 ret
= hns_roce_mtr_create(hr_dev
, &idx_que
->mtr
, &buf_attr
,
183 hr_dev
->caps
.idx_ba_pg_sz
+ PAGE_SHIFT
,
187 "failed to alloc SRQ idx mtr, ret = %d.\n", ret
);
192 idx_que
->bitmap
= bitmap_zalloc(srq
->wqe_cnt
, GFP_KERNEL
);
193 if (!idx_que
->bitmap
) {
194 ibdev_err(ibdev
, "failed to alloc SRQ idx bitmap.\n");
205 hns_roce_mtr_destroy(hr_dev
, &idx_que
->mtr
);
210 static void free_srq_idx(struct hns_roce_dev
*hr_dev
, struct hns_roce_srq
*srq
)
212 struct hns_roce_idx_que
*idx_que
= &srq
->idx_que
;
214 bitmap_free(idx_que
->bitmap
);
215 idx_que
->bitmap
= NULL
;
216 hns_roce_mtr_destroy(hr_dev
, &idx_que
->mtr
);
219 static int alloc_srq_wqe_buf(struct hns_roce_dev
*hr_dev
,
220 struct hns_roce_srq
*srq
,
221 struct ib_udata
*udata
, unsigned long addr
)
223 struct ib_device
*ibdev
= &hr_dev
->ib_dev
;
224 struct hns_roce_buf_attr buf_attr
= {};
227 srq
->wqe_shift
= ilog2(roundup_pow_of_two(max(HNS_ROCE_SGE_SIZE
,
231 buf_attr
.page_shift
= hr_dev
->caps
.srqwqe_buf_pg_sz
+ PAGE_SHIFT
;
232 buf_attr
.region
[0].size
= to_hr_hem_entries_size(srq
->wqe_cnt
,
234 buf_attr
.region
[0].hopnum
= hr_dev
->caps
.srqwqe_hop_num
;
235 buf_attr
.region_count
= 1;
237 ret
= hns_roce_mtr_create(hr_dev
, &srq
->buf_mtr
, &buf_attr
,
238 hr_dev
->caps
.srqwqe_ba_pg_sz
+ PAGE_SHIFT
,
242 "failed to alloc SRQ buf mtr, ret = %d.\n", ret
);
247 static void free_srq_wqe_buf(struct hns_roce_dev
*hr_dev
,
248 struct hns_roce_srq
*srq
)
250 hns_roce_mtr_destroy(hr_dev
, &srq
->buf_mtr
);
253 static int alloc_srq_wrid(struct hns_roce_srq
*srq
)
255 srq
->wrid
= kvmalloc_array(srq
->wqe_cnt
, sizeof(u64
), GFP_KERNEL
);
262 static void free_srq_wrid(struct hns_roce_srq
*srq
)
268 static u32
proc_srq_sge(struct hns_roce_dev
*dev
, struct hns_roce_srq
*hr_srq
,
271 u32 max_sge
= dev
->caps
.max_srq_sges
;
273 if (dev
->pci_dev
->revision
>= PCI_REVISION_ID_HIP09
)
276 /* Reserve SGEs only for HIP08 in kernel; The userspace driver will
277 * calculate number of max_sge with reserved SGEs when allocating wqe
278 * buf, so there is no need to do this again in kernel. But the number
279 * may exceed the capacity of SGEs recorded in the firmware, so the
280 * kernel driver should just adapt the value accordingly.
283 max_sge
= roundup_pow_of_two(max_sge
+ 1);
290 static int set_srq_basic_param(struct hns_roce_srq
*srq
,
291 struct ib_srq_init_attr
*init_attr
,
292 struct ib_udata
*udata
)
294 struct hns_roce_dev
*hr_dev
= to_hr_dev(srq
->ibsrq
.device
);
295 struct ib_srq_attr
*attr
= &init_attr
->attr
;
298 max_sge
= proc_srq_sge(hr_dev
, srq
, !!udata
);
299 if (attr
->max_wr
> hr_dev
->caps
.max_srq_wrs
||
300 attr
->max_sge
> max_sge
|| !attr
->max_sge
) {
301 ibdev_err(&hr_dev
->ib_dev
,
302 "invalid SRQ attr, depth = %u, sge = %u.\n",
303 attr
->max_wr
, attr
->max_sge
);
307 attr
->max_wr
= max_t(u32
, attr
->max_wr
, HNS_ROCE_MIN_SRQ_WQE_NUM
);
308 srq
->wqe_cnt
= roundup_pow_of_two(attr
->max_wr
);
309 srq
->max_gs
= roundup_pow_of_two(attr
->max_sge
+ srq
->rsv_sge
);
311 attr
->max_wr
= srq
->wqe_cnt
;
312 attr
->max_sge
= srq
->max_gs
- srq
->rsv_sge
;
318 static void set_srq_ext_param(struct hns_roce_srq
*srq
,
319 struct ib_srq_init_attr
*init_attr
)
321 srq
->cqn
= ib_srq_has_cq(init_attr
->srq_type
) ?
322 to_hr_cq(init_attr
->ext
.cq
)->cqn
: 0;
324 srq
->xrcdn
= (init_attr
->srq_type
== IB_SRQT_XRC
) ?
325 to_hr_xrcd(init_attr
->ext
.xrc
.xrcd
)->xrcdn
: 0;
328 static int set_srq_param(struct hns_roce_srq
*srq
,
329 struct ib_srq_init_attr
*init_attr
,
330 struct ib_udata
*udata
)
334 ret
= set_srq_basic_param(srq
, init_attr
, udata
);
338 set_srq_ext_param(srq
, init_attr
);
343 static int alloc_srq_buf(struct hns_roce_dev
*hr_dev
, struct hns_roce_srq
*srq
,
344 struct ib_udata
*udata
)
346 struct hns_roce_ib_create_srq ucmd
= {};
350 ret
= ib_copy_from_udata(&ucmd
, udata
,
351 min(udata
->inlen
, sizeof(ucmd
)));
353 ibdev_err(&hr_dev
->ib_dev
,
354 "failed to copy SRQ udata, ret = %d.\n",
360 ret
= alloc_srq_idx(hr_dev
, srq
, udata
, ucmd
.que_addr
);
364 ret
= alloc_srq_wqe_buf(hr_dev
, srq
, udata
, ucmd
.buf_addr
);
369 ret
= alloc_srq_wrid(srq
);
377 free_srq_wqe_buf(hr_dev
, srq
);
379 free_srq_idx(hr_dev
, srq
);
384 static void free_srq_buf(struct hns_roce_dev
*hr_dev
, struct hns_roce_srq
*srq
)
387 free_srq_wqe_buf(hr_dev
, srq
);
388 free_srq_idx(hr_dev
, srq
);
391 static int get_srq_ucmd(struct hns_roce_srq
*srq
, struct ib_udata
*udata
,
392 struct hns_roce_ib_create_srq
*ucmd
)
394 struct ib_device
*ibdev
= srq
->ibsrq
.device
;
397 ret
= ib_copy_from_udata(ucmd
, udata
, min(udata
->inlen
, sizeof(*ucmd
)));
399 ibdev_err(ibdev
, "failed to copy SRQ udata, ret = %d.\n", ret
);
406 static void free_srq_db(struct hns_roce_dev
*hr_dev
, struct hns_roce_srq
*srq
,
407 struct ib_udata
*udata
)
409 struct hns_roce_ucontext
*uctx
;
411 if (!(srq
->cap_flags
& HNS_ROCE_SRQ_CAP_RECORD_DB
))
414 srq
->cap_flags
&= ~HNS_ROCE_SRQ_CAP_RECORD_DB
;
416 uctx
= rdma_udata_to_drv_context(udata
,
417 struct hns_roce_ucontext
,
419 hns_roce_db_unmap_user(uctx
, &srq
->rdb
);
421 hns_roce_free_db(hr_dev
, &srq
->rdb
);
425 static int alloc_srq_db(struct hns_roce_dev
*hr_dev
, struct hns_roce_srq
*srq
,
426 struct ib_udata
*udata
,
427 struct hns_roce_ib_create_srq_resp
*resp
)
429 struct hns_roce_ib_create_srq ucmd
= {};
430 struct hns_roce_ucontext
*uctx
;
434 ret
= get_srq_ucmd(srq
, udata
, &ucmd
);
438 if ((hr_dev
->caps
.flags
& HNS_ROCE_CAP_FLAG_SRQ_RECORD_DB
) &&
439 (ucmd
.req_cap_flags
& HNS_ROCE_SRQ_CAP_RECORD_DB
)) {
440 uctx
= rdma_udata_to_drv_context(udata
,
441 struct hns_roce_ucontext
, ibucontext
);
442 ret
= hns_roce_db_map_user(uctx
, ucmd
.db_addr
,
447 srq
->cap_flags
|= HNS_ROCE_RSP_SRQ_CAP_RECORD_DB
;
450 if (hr_dev
->caps
.flags
& HNS_ROCE_CAP_FLAG_SRQ_RECORD_DB
) {
451 ret
= hns_roce_alloc_db(hr_dev
, &srq
->rdb
, 1);
455 *srq
->rdb
.db_record
= 0;
456 srq
->cap_flags
|= HNS_ROCE_RSP_SRQ_CAP_RECORD_DB
;
458 srq
->db_reg
= hr_dev
->reg_base
+ SRQ_DB_REG
;
464 int hns_roce_create_srq(struct ib_srq
*ib_srq
,
465 struct ib_srq_init_attr
*init_attr
,
466 struct ib_udata
*udata
)
468 struct hns_roce_dev
*hr_dev
= to_hr_dev(ib_srq
->device
);
469 struct hns_roce_ib_create_srq_resp resp
= {};
470 struct hns_roce_srq
*srq
= to_hr_srq(ib_srq
);
473 mutex_init(&srq
->mutex
);
474 spin_lock_init(&srq
->lock
);
476 ret
= set_srq_param(srq
, init_attr
, udata
);
480 ret
= alloc_srq_buf(hr_dev
, srq
, udata
);
484 ret
= alloc_srq_db(hr_dev
, srq
, udata
, &resp
);
488 ret
= alloc_srqn(hr_dev
, srq
);
492 ret
= alloc_srqc(hr_dev
, srq
);
497 resp
.cap_flags
= srq
->cap_flags
;
498 resp
.srqn
= srq
->srqn
;
499 if (ib_copy_to_udata(udata
, &resp
,
500 min(udata
->outlen
, sizeof(resp
)))) {
506 srq
->event
= hns_roce_ib_srq_event
;
507 refcount_set(&srq
->refcount
, 1);
508 init_completion(&srq
->free
);
513 free_srqc(hr_dev
, srq
);
515 free_srqn(hr_dev
, srq
);
517 free_srq_db(hr_dev
, srq
, udata
);
519 free_srq_buf(hr_dev
, srq
);
521 mutex_destroy(&srq
->mutex
);
522 atomic64_inc(&hr_dev
->dfx_cnt
[HNS_ROCE_DFX_SRQ_CREATE_ERR_CNT
]);
527 int hns_roce_destroy_srq(struct ib_srq
*ibsrq
, struct ib_udata
*udata
)
529 struct hns_roce_dev
*hr_dev
= to_hr_dev(ibsrq
->device
);
530 struct hns_roce_srq
*srq
= to_hr_srq(ibsrq
);
532 free_srqc(hr_dev
, srq
);
533 free_srqn(hr_dev
, srq
);
534 free_srq_db(hr_dev
, srq
, udata
);
535 free_srq_buf(hr_dev
, srq
);
536 mutex_destroy(&srq
->mutex
);
540 void hns_roce_init_srq_table(struct hns_roce_dev
*hr_dev
)
542 struct hns_roce_srq_table
*srq_table
= &hr_dev
->srq_table
;
543 struct hns_roce_ida
*srq_ida
= &srq_table
->srq_ida
;
545 xa_init(&srq_table
->xa
);
547 ida_init(&srq_ida
->ida
);
548 srq_ida
->max
= hr_dev
->caps
.num_srqs
- 1;
549 srq_ida
->min
= hr_dev
->caps
.reserved_srqs
;