drm/dp_mst: Add helper to get port number at specific LCT from RAD
[drm/drm-misc.git] / drivers / interconnect / qcom / qdu1000.h
blobe75a6419df235353a5dcfbefe1cb3979ae966054
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
4 */
6 #ifndef __DRIVERS_INTERCONNECT_QCOM_QDU1000_H
7 #define __DRIVERS_INTERCONNECT_QCOM_QDU1000_H
9 #define QDU1000_MASTER_SYS_TCU 0
10 #define QDU1000_MASTER_APPSS_PROC 1
11 #define QDU1000_MASTER_LLCC 2
12 #define QDU1000_MASTER_GIC_AHB 3
13 #define QDU1000_MASTER_QDSS_BAM 4
14 #define QDU1000_MASTER_QPIC 5
15 #define QDU1000_MASTER_QSPI_0 6
16 #define QDU1000_MASTER_QUP_0 7
17 #define QDU1000_MASTER_QUP_1 8
18 #define QDU1000_MASTER_SNOC_CFG 9
19 #define QDU1000_MASTER_ANOC_SNOC 10
20 #define QDU1000_MASTER_ANOC_GSI 11
21 #define QDU1000_MASTER_GEMNOC_ECPRI_DMA 12
22 #define QDU1000_MASTER_FEC_2_GEMNOC 13
23 #define QDU1000_MASTER_GEM_NOC_CNOC 14
24 #define QDU1000_MASTER_GEMNOC_MODEM_CNOC 15
25 #define QDU1000_MASTER_GEM_NOC_PCIE_SNOC 16
26 #define QDU1000_MASTER_ANOC_PCIE_GEM_NOC 17
27 #define QDU1000_MASTER_SNOC_GC_MEM_NOC 18
28 #define QDU1000_MASTER_SNOC_SF_MEM_NOC 19
29 #define QDU1000_MASTER_QUP_CORE_0 20
30 #define QDU1000_MASTER_QUP_CORE_1 21
31 #define QDU1000_MASTER_CRYPTO 22
32 #define QDU1000_MASTER_ECPRI_GSI 23
33 #define QDU1000_MASTER_MSS_PROC 24
34 #define QDU1000_MASTER_PIMEM 25
35 #define QDU1000_MASTER_SNOC_ECPRI_DMA 26
36 #define QDU1000_MASTER_GIC 27
37 #define QDU1000_MASTER_PCIE 28
38 #define QDU1000_MASTER_QDSS_ETR 29
39 #define QDU1000_MASTER_QDSS_ETR_1 30
40 #define QDU1000_MASTER_SDCC_1 31
41 #define QDU1000_MASTER_USB3 32
42 #define QDU1000_SLAVE_EBI1 512
43 #define QDU1000_SLAVE_AHB2PHY_SOUTH 513
44 #define QDU1000_SLAVE_AHB2PHY_NORTH 514
45 #define QDU1000_SLAVE_AHB2PHY_EAST 515
46 #define QDU1000_SLAVE_AOSS 516
47 #define QDU1000_SLAVE_CLK_CTL 517
48 #define QDU1000_SLAVE_RBCPR_CX_CFG 518
49 #define QDU1000_SLAVE_RBCPR_MX_CFG 519
50 #define QDU1000_SLAVE_CRYPTO_0_CFG 520
51 #define QDU1000_SLAVE_ECPRI_CFG 521
52 #define QDU1000_SLAVE_IMEM_CFG 522
53 #define QDU1000_SLAVE_IPC_ROUTER_CFG 523
54 #define QDU1000_SLAVE_CNOC_MSS 524
55 #define QDU1000_SLAVE_PCIE_CFG 525
56 #define QDU1000_SLAVE_PDM 526
57 #define QDU1000_SLAVE_PIMEM_CFG 527
58 #define QDU1000_SLAVE_PRNG 528
59 #define QDU1000_SLAVE_QDSS_CFG 529
60 #define QDU1000_SLAVE_QPIC 530
61 #define QDU1000_SLAVE_QSPI_0 531
62 #define QDU1000_SLAVE_QUP_0 532
63 #define QDU1000_SLAVE_QUP_1 533
64 #define QDU1000_SLAVE_SDCC_2 534
65 #define QDU1000_SLAVE_SMBUS_CFG 535
66 #define QDU1000_SLAVE_SNOC_CFG 536
67 #define QDU1000_SLAVE_TCSR 537
68 #define QDU1000_SLAVE_TLMM 538
69 #define QDU1000_SLAVE_TME_CFG 539
70 #define QDU1000_SLAVE_TSC_CFG 540
71 #define QDU1000_SLAVE_USB3_0 541
72 #define QDU1000_SLAVE_VSENSE_CTRL_CFG 542
73 #define QDU1000_SLAVE_A1NOC_SNOC 543
74 #define QDU1000_SLAVE_ANOC_SNOC_GSI 544
75 #define QDU1000_SLAVE_DDRSS_CFG 545
76 #define QDU1000_SLAVE_ECPRI_GEMNOC 546
77 #define QDU1000_SLAVE_GEM_NOC_CNOC 547
78 #define QDU1000_SLAVE_SNOC_GEM_NOC_GC 548
79 #define QDU1000_SLAVE_SNOC_GEM_NOC_SF 549
80 #define QDU1000_SLAVE_LLCC 550
81 #define QDU1000_SLAVE_MODEM_OFFLINE 551
82 #define QDU1000_SLAVE_GEMNOC_MODEM_CNOC 552
83 #define QDU1000_SLAVE_MEM_NOC_PCIE_SNOC 553
84 #define QDU1000_SLAVE_ANOC_PCIE_GEM_NOC 554
85 #define QDU1000_SLAVE_QUP_CORE_0 555
86 #define QDU1000_SLAVE_QUP_CORE_1 556
87 #define QDU1000_SLAVE_IMEM 557
88 #define QDU1000_SLAVE_PIMEM 558
89 #define QDU1000_SLAVE_SERVICE_SNOC 559
90 #define QDU1000_SLAVE_ETHERNET_SS 560
91 #define QDU1000_SLAVE_PCIE_0 561
92 #define QDU1000_SLAVE_QDSS_STM 562
93 #define QDU1000_SLAVE_TCU 563
95 #endif