drm/rockchip: Don't change hdmi reference clock rate
[drm/drm-misc.git] / drivers / media / pci / bt8xx / bt878.h
blob5b1c7f56e5534cb196e61e1d0b6980457d2c64e4
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 bt878.h - Bt878 audio module (register offsets)
5 Copyright (C) 2002 Peter Hettkamp <peter.hettkamp@htp-tel.de>
7 */
9 #ifndef _BT878_H_
10 #define _BT878_H_
12 #include <linux/interrupt.h>
13 #include <linux/pci.h>
14 #include <linux/sched.h>
15 #include <linux/spinlock.h>
16 #include <linux/mutex.h>
17 #include <linux/workqueue.h>
19 #include "bt848.h"
20 #include "bttv.h"
22 #define BT878_VERSION_CODE 0x000000
24 #define BT878_AINT_STAT 0x100
25 #define BT878_ARISCS (0xf<<28)
26 #define BT878_ARISC_EN (1<<27)
27 #define BT878_ASCERR (1<<19)
28 #define BT878_AOCERR (1<<18)
29 #define BT878_APABORT (1<<17)
30 #define BT878_ARIPERR (1<<16)
31 #define BT878_APPERR (1<<15)
32 #define BT878_AFDSR (1<<14)
33 #define BT878_AFTRGT (1<<13)
34 #define BT878_AFBUS (1<<12)
35 #define BT878_ARISCI (1<<11)
36 #define BT878_AOFLOW (1<<3)
38 #define BT878_AINT_MASK 0x104
40 #define BT878_AGPIO_DMA_CTL 0x10c
41 #define BT878_A_GAIN (0xf<<28)
42 #define BT878_A_G2X (1<<27)
43 #define BT878_A_PWRDN (1<<26)
44 #define BT878_A_SEL (3<<24)
45 #define BT878_DA_SCE (1<<23)
46 #define BT878_DA_LRI (1<<22)
47 #define BT878_DA_MLB (1<<21)
48 #define BT878_DA_LRD (0x1f<<16)
49 #define BT878_DA_DPM (1<<15)
50 #define BT878_DA_SBR (1<<14)
51 #define BT878_DA_ES2 (1<<13)
52 #define BT878_DA_LMT (1<<12)
53 #define BT878_DA_SDR (0xf<<8)
54 #define BT878_DA_IOM (3<<6)
55 #define BT878_DA_APP (1<<5)
56 #define BT878_ACAP_EN (1<<4)
57 #define BT878_PKTP (3<<2)
58 #define BT878_RISC_EN (1<<1)
59 #define BT878_FIFO_EN 1
61 #define BT878_APACK_LEN 0x110
62 #define BT878_AFP_LEN (0xff<<16)
63 #define BT878_ALP_LEN 0xfff
65 #define BT878_ARISC_START 0x114
67 #define BT878_ARISC_PC 0x120
69 /* BT878 FUNCTION 0 REGISTERS */
70 #define BT878_GPIO_DMA_CTL 0x10c
72 /* Interrupt register */
73 #define BT878_INT_STAT 0x100
74 #define BT878_INT_MASK 0x104
75 #define BT878_I2CRACK (1<<25)
76 #define BT878_I2CDONE (1<<8)
78 #define BT878_MAX 4
80 #define BT878_RISC_SYNC_MASK (1 << 15)
83 #define BTTV_BOARD_UNKNOWN 0x00
84 #define BTTV_BOARD_PINNACLESAT 0x5e
85 #define BTTV_BOARD_NEBULA_DIGITV 0x68
86 #define BTTV_BOARD_PC_HDTV 0x70
87 #define BTTV_BOARD_TWINHAN_DST 0x71
88 #define BTTV_BOARD_AVDVBT_771 0x7b
89 #define BTTV_BOARD_AVDVBT_761 0x7c
90 #define BTTV_BOARD_DVICO_DVBT_LITE 0x80
91 #define BTTV_BOARD_DVICO_FUSIONHDTV_5_LITE 0x87
93 extern int bt878_num;
95 struct bt878 {
96 struct mutex gpio_lock;
97 unsigned int nr;
98 unsigned int bttv_nr;
99 struct i2c_adapter *adapter;
100 struct pci_dev *dev;
101 unsigned int id;
102 unsigned int TS_Size;
103 unsigned char revision;
104 unsigned int irq;
105 unsigned long bt878_adr;
106 volatile void __iomem *bt878_mem; /* function 1 */
108 volatile u32 finished_block;
109 volatile u32 last_block;
110 u32 block_count;
111 u32 block_bytes;
112 u32 line_bytes;
113 u32 line_count;
115 u32 buf_size;
116 u8 *buf_cpu;
117 dma_addr_t buf_dma;
119 u32 risc_size;
120 __le32 *risc_cpu;
121 dma_addr_t risc_dma;
122 u32 risc_pos;
124 struct work_struct bh_work;
125 int shutdown;
128 extern struct bt878 bt878[BT878_MAX];
130 void bt878_start(struct bt878 *bt, u32 controlreg, u32 op_sync_orin,
131 u32 irq_err_ignore);
132 void bt878_stop(struct bt878 *bt);
134 #define bmtwrite(dat,adr) writel((dat), (adr))
135 #define bmtread(adr) readl(adr)
137 #endif