drm/rockchip: Don't change hdmi reference clock rate
[drm/drm-misc.git] / drivers / media / pci / intel / ipu6 / ipu6-fw-com.h
blobb02285a3e43eb2a1139b535f91d938a778be03b5
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (C) 2013--2024 Intel Corporation */
4 #ifndef IPU6_FW_COM_H
5 #define IPU6_FW_COM_H
7 struct ipu6_fw_com_context;
8 struct ipu6_bus_device;
10 struct ipu6_fw_syscom_queue_config {
11 unsigned int queue_size; /* tokens per queue */
12 unsigned int token_size; /* bytes per token */
15 #define SYSCOM_BUTTRESS_FW_PARAMS_ISYS_OFFSET 0
17 struct ipu6_fw_com_cfg {
18 unsigned int num_input_queues;
19 unsigned int num_output_queues;
20 struct ipu6_fw_syscom_queue_config *input;
21 struct ipu6_fw_syscom_queue_config *output;
23 unsigned int dmem_addr;
25 /* firmware-specific configuration data */
26 void *specific_addr;
27 unsigned int specific_size;
28 int (*cell_ready)(struct ipu6_bus_device *adev);
29 void (*cell_start)(struct ipu6_bus_device *adev);
31 unsigned int buttress_boot_offset;
34 void *ipu6_fw_com_prepare(struct ipu6_fw_com_cfg *cfg,
35 struct ipu6_bus_device *adev, void __iomem *base);
37 int ipu6_fw_com_open(struct ipu6_fw_com_context *ctx);
38 bool ipu6_fw_com_ready(struct ipu6_fw_com_context *ctx);
39 int ipu6_fw_com_close(struct ipu6_fw_com_context *ctx);
40 int ipu6_fw_com_release(struct ipu6_fw_com_context *ctx, unsigned int force);
42 void *ipu6_recv_get_token(struct ipu6_fw_com_context *ctx, int q_nbr);
43 void ipu6_recv_put_token(struct ipu6_fw_com_context *ctx, int q_nbr);
44 void *ipu6_send_get_token(struct ipu6_fw_com_context *ctx, int q_nbr);
45 void ipu6_send_put_token(struct ipu6_fw_com_context *ctx, int q_nbr);
47 #endif