1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * SN Platform GRU Driver
5 * DRIVER TABLE MANAGER + GRU CONTEXT LOAD/UNLOAD
7 * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
13 #include <linux/spinlock.h>
14 #include <linux/sched.h>
15 #include <linux/device.h>
16 #include <linux/list.h>
17 #include <linux/err.h>
18 #include <linux/prefetch.h>
19 #include <asm/uv/uv_hub.h>
21 #include "grutables.h"
22 #include "gruhandles.h"
24 unsigned long gru_options __read_mostly
;
26 static struct device_driver gru_driver
= {
30 static struct device gru_device
= {
32 .driver
= &gru_driver
,
35 struct device
*grudev
= &gru_device
;
38 * Select a gru fault map to be used by the current cpu. Note that
39 * multiple cpus may be using the same map.
40 * ZZZ should be inline but did not work on emulator
42 int gru_cpu_fault_map_id(void)
44 int cpu
= smp_processor_id();
47 core
= uv_cpu_core_number(cpu
);
48 id
= core
+ UV_MAX_INT_CORES
* uv_cpu_socket_number(cpu
);
52 /*--------- ASID Management -------------------------------------------
54 * Initially, assign asids sequentially from MIN_ASID .. MAX_ASID.
55 * Once MAX is reached, flush the TLB & start over. However,
56 * some asids may still be in use. There won't be many (percentage wise) still
57 * in use. Search active contexts & determine the value of the first
58 * asid in use ("x"s below). Set "limit" to this value.
59 * This defines a block of assignable asids.
61 * When "limit" is reached, search forward from limit+1 and determine the
62 * next block of assignable asids.
64 * Repeat until MAX_ASID is reached, then start over again.
66 * Each time MAX_ASID is reached, increment the asid generation. Since
67 * the search for in-use asids only checks contexts with GRUs currently
68 * assigned, asids in some contexts will be missed. Prior to loading
69 * a context, the asid generation of the GTS asid is rechecked. If it
70 * doesn't match the current generation, a new asid will be assigned.
72 * 0---------------x------------x---------------------x----|
73 * ^-next ^-limit ^-MAX_ASID
75 * All asid manipulation & context loading/unloading is protected by the
79 /* Hit the asid limit. Start over */
80 static int gru_wrap_asid(struct gru_state
*gru
)
82 gru_dbg(grudev
, "gid %d\n", gru
->gs_gid
);
88 /* Find the next chunk of unused asids */
89 static int gru_reset_asid_limit(struct gru_state
*gru
, int asid
)
91 int i
, gid
, inuse_asid
, limit
;
93 gru_dbg(grudev
, "gid %d, asid 0x%x\n", gru
->gs_gid
, asid
);
97 asid
= gru_wrap_asid(gru
);
98 gru_flush_all_tlb(gru
);
101 for (i
= 0; i
< GRU_NUM_CCH
; i
++) {
102 if (!gru
->gs_gts
[i
] || is_kernel_context(gru
->gs_gts
[i
]))
104 inuse_asid
= gru
->gs_gts
[i
]->ts_gms
->ms_asids
[gid
].mt_asid
;
105 gru_dbg(grudev
, "gid %d, gts %p, gms %p, inuse 0x%x, cxt %d\n",
106 gru
->gs_gid
, gru
->gs_gts
[i
], gru
->gs_gts
[i
]->ts_gms
,
108 if (inuse_asid
== asid
) {
112 * empty range: reset the range limit and
116 if (asid
>= MAX_ASID
)
117 asid
= gru_wrap_asid(gru
);
122 if ((inuse_asid
> asid
) && (inuse_asid
< limit
))
125 gru
->gs_asid_limit
= limit
;
127 gru_dbg(grudev
, "gid %d, new asid 0x%x, new_limit 0x%x\n", gru
->gs_gid
,
132 /* Assign a new ASID to a thread context. */
133 static int gru_assign_asid(struct gru_state
*gru
)
137 gru
->gs_asid
+= ASID_INC
;
139 if (asid
>= gru
->gs_asid_limit
)
140 asid
= gru_reset_asid_limit(gru
, asid
);
142 gru_dbg(grudev
, "gid %d, asid 0x%x\n", gru
->gs_gid
, asid
);
147 * Clear n bits in a word. Return a word indicating the bits that were cleared.
148 * Optionally, build an array of chars that contain the bit numbers allocated.
150 static unsigned long reserve_resources(unsigned long *p
, int n
, int mmax
,
153 unsigned long bits
= 0;
157 i
= find_first_bit(p
, mmax
);
168 unsigned long gru_reserve_cb_resources(struct gru_state
*gru
, int cbr_au_count
,
171 return reserve_resources(&gru
->gs_cbr_map
, cbr_au_count
, GRU_CBR_AU
,
175 unsigned long gru_reserve_ds_resources(struct gru_state
*gru
, int dsr_au_count
,
178 return reserve_resources(&gru
->gs_dsr_map
, dsr_au_count
, GRU_DSR_AU
,
182 static void reserve_gru_resources(struct gru_state
*gru
,
183 struct gru_thread_state
*gts
)
185 gru
->gs_active_contexts
++;
187 gru_reserve_cb_resources(gru
, gts
->ts_cbr_au_count
,
190 gru_reserve_ds_resources(gru
, gts
->ts_dsr_au_count
, NULL
);
193 static void free_gru_resources(struct gru_state
*gru
,
194 struct gru_thread_state
*gts
)
196 gru
->gs_active_contexts
--;
197 gru
->gs_cbr_map
|= gts
->ts_cbr_map
;
198 gru
->gs_dsr_map
|= gts
->ts_dsr_map
;
202 * Check if a GRU has sufficient free resources to satisfy an allocation
203 * request. Note: GRU locks may or may not be held when this is called. If
204 * not held, recheck after acquiring the appropriate locks.
206 * Returns 1 if sufficient resources, 0 if not
208 static int check_gru_resources(struct gru_state
*gru
, int cbr_au_count
,
209 int dsr_au_count
, int max_active_contexts
)
211 return hweight64(gru
->gs_cbr_map
) >= cbr_au_count
212 && hweight64(gru
->gs_dsr_map
) >= dsr_au_count
213 && gru
->gs_active_contexts
< max_active_contexts
;
217 * TLB manangment requires tracking all GRU chiplets that have loaded a GSEG
220 static int gru_load_mm_tracker(struct gru_state
*gru
,
221 struct gru_thread_state
*gts
)
223 struct gru_mm_struct
*gms
= gts
->ts_gms
;
224 struct gru_mm_tracker
*asids
= &gms
->ms_asids
[gru
->gs_gid
];
225 unsigned short ctxbitmap
= (1 << gts
->ts_ctxnum
);
228 spin_lock(&gms
->ms_asid_lock
);
229 asid
= asids
->mt_asid
;
231 spin_lock(&gru
->gs_asid_lock
);
232 if (asid
== 0 || (asids
->mt_ctxbitmap
== 0 && asids
->mt_asid_gen
!=
234 asid
= gru_assign_asid(gru
);
235 asids
->mt_asid
= asid
;
236 asids
->mt_asid_gen
= gru
->gs_asid_gen
;
241 spin_unlock(&gru
->gs_asid_lock
);
243 BUG_ON(asids
->mt_ctxbitmap
& ctxbitmap
);
244 asids
->mt_ctxbitmap
|= ctxbitmap
;
245 if (!test_bit(gru
->gs_gid
, gms
->ms_asidmap
))
246 __set_bit(gru
->gs_gid
, gms
->ms_asidmap
);
247 spin_unlock(&gms
->ms_asid_lock
);
250 "gid %d, gts %p, gms %p, ctxnum %d, asid 0x%x, asidmap 0x%lx\n",
251 gru
->gs_gid
, gts
, gms
, gts
->ts_ctxnum
, asid
,
256 static void gru_unload_mm_tracker(struct gru_state
*gru
,
257 struct gru_thread_state
*gts
)
259 struct gru_mm_struct
*gms
= gts
->ts_gms
;
260 struct gru_mm_tracker
*asids
;
261 unsigned short ctxbitmap
;
263 asids
= &gms
->ms_asids
[gru
->gs_gid
];
264 ctxbitmap
= (1 << gts
->ts_ctxnum
);
265 spin_lock(&gms
->ms_asid_lock
);
266 spin_lock(&gru
->gs_asid_lock
);
267 BUG_ON((asids
->mt_ctxbitmap
& ctxbitmap
) != ctxbitmap
);
268 asids
->mt_ctxbitmap
^= ctxbitmap
;
269 gru_dbg(grudev
, "gid %d, gts %p, gms %p, ctxnum %d, asidmap 0x%lx\n",
270 gru
->gs_gid
, gts
, gms
, gts
->ts_ctxnum
, gms
->ms_asidmap
[0]);
271 spin_unlock(&gru
->gs_asid_lock
);
272 spin_unlock(&gms
->ms_asid_lock
);
276 * Decrement the reference count on a GTS structure. Free the structure
277 * if the reference count goes to zero.
279 void gts_drop(struct gru_thread_state
*gts
)
281 if (gts
&& refcount_dec_and_test(>s
->ts_refcnt
)) {
283 gru_drop_mmu_notifier(gts
->ts_gms
);
290 * Locate the GTS structure for the current thread.
292 static struct gru_thread_state
*gru_find_current_gts_nolock(struct gru_vma_data
295 struct gru_thread_state
*gts
;
297 list_for_each_entry(gts
, &vdata
->vd_head
, ts_next
)
298 if (gts
->ts_tsid
== tsid
)
304 * Allocate a thread state structure.
306 struct gru_thread_state
*gru_alloc_gts(struct vm_area_struct
*vma
,
307 int cbr_au_count
, int dsr_au_count
,
308 unsigned char tlb_preload_count
, int options
, int tsid
)
310 struct gru_thread_state
*gts
;
311 struct gru_mm_struct
*gms
;
314 bytes
= DSR_BYTES(dsr_au_count
) + CBR_BYTES(cbr_au_count
);
315 bytes
+= sizeof(struct gru_thread_state
);
316 gts
= kmalloc(bytes
, GFP_KERNEL
);
318 return ERR_PTR(-ENOMEM
);
321 memset(gts
, 0, sizeof(struct gru_thread_state
)); /* zero out header */
322 refcount_set(>s
->ts_refcnt
, 1);
323 mutex_init(>s
->ts_ctxlock
);
324 gts
->ts_cbr_au_count
= cbr_au_count
;
325 gts
->ts_dsr_au_count
= dsr_au_count
;
326 gts
->ts_tlb_preload_count
= tlb_preload_count
;
327 gts
->ts_user_options
= options
;
328 gts
->ts_user_blade_id
= -1;
329 gts
->ts_user_chiplet_id
= -1;
331 gts
->ts_ctxnum
= NULLCTX
;
332 gts
->ts_tlb_int_select
= -1;
333 gts
->ts_cch_req_slice
= -1;
334 gts
->ts_sizeavail
= GRU_SIZEAVAIL(PAGE_SHIFT
);
336 gts
->ts_mm
= current
->mm
;
338 gms
= gru_register_mmu_notifier();
344 gru_dbg(grudev
, "alloc gts %p\n", gts
);
349 return ERR_CAST(gms
);
353 * Allocate a vma private data structure.
355 struct gru_vma_data
*gru_alloc_vma_data(struct vm_area_struct
*vma
, int tsid
)
357 struct gru_vma_data
*vdata
= NULL
;
359 vdata
= kmalloc(sizeof(*vdata
), GFP_KERNEL
);
364 INIT_LIST_HEAD(&vdata
->vd_head
);
365 spin_lock_init(&vdata
->vd_lock
);
366 gru_dbg(grudev
, "alloc vdata %p\n", vdata
);
371 * Find the thread state structure for the current thread.
373 struct gru_thread_state
*gru_find_thread_state(struct vm_area_struct
*vma
,
376 struct gru_vma_data
*vdata
= vma
->vm_private_data
;
377 struct gru_thread_state
*gts
;
379 spin_lock(&vdata
->vd_lock
);
380 gts
= gru_find_current_gts_nolock(vdata
, tsid
);
381 spin_unlock(&vdata
->vd_lock
);
382 gru_dbg(grudev
, "vma %p, gts %p\n", vma
, gts
);
387 * Allocate a new thread state for a GSEG. Note that races may allow
388 * another thread to race to create a gts.
390 struct gru_thread_state
*gru_alloc_thread_state(struct vm_area_struct
*vma
,
393 struct gru_vma_data
*vdata
= vma
->vm_private_data
;
394 struct gru_thread_state
*gts
, *ngts
;
396 gts
= gru_alloc_gts(vma
, vdata
->vd_cbr_au_count
,
397 vdata
->vd_dsr_au_count
,
398 vdata
->vd_tlb_preload_count
,
399 vdata
->vd_user_options
, tsid
);
403 spin_lock(&vdata
->vd_lock
);
404 ngts
= gru_find_current_gts_nolock(vdata
, tsid
);
408 STAT(gts_double_allocate
);
410 list_add(>s
->ts_next
, &vdata
->vd_head
);
412 spin_unlock(&vdata
->vd_lock
);
413 gru_dbg(grudev
, "vma %p, gts %p\n", vma
, gts
);
418 * Free the GRU context assigned to the thread state.
420 static void gru_free_gru_context(struct gru_thread_state
*gts
)
422 struct gru_state
*gru
;
425 gru_dbg(grudev
, "gts %p, gid %d\n", gts
, gru
->gs_gid
);
427 spin_lock(&gru
->gs_lock
);
428 gru
->gs_gts
[gts
->ts_ctxnum
] = NULL
;
429 free_gru_resources(gru
, gts
);
430 BUG_ON(test_bit(gts
->ts_ctxnum
, &gru
->gs_context_map
) == 0);
431 __clear_bit(gts
->ts_ctxnum
, &gru
->gs_context_map
);
432 gts
->ts_ctxnum
= NULLCTX
;
435 spin_unlock(&gru
->gs_lock
);
442 * Prefetching cachelines help hardware performance.
443 * (Strictly a performance enhancement. Not functionally required).
445 static void prefetch_data(void *p
, int num
, int stride
)
453 static inline long gru_copy_handle(void *d
, void *s
)
455 memcpy(d
, s
, GRU_HANDLE_BYTES
);
456 return GRU_HANDLE_BYTES
;
459 static void gru_prefetch_context(void *gseg
, void *cb
, void *cbe
,
460 unsigned long cbrmap
, unsigned long length
)
464 prefetch_data(gseg
+ GRU_DS_BASE
, length
/ GRU_CACHE_LINE_BYTES
,
465 GRU_CACHE_LINE_BYTES
);
467 for_each_cbr_in_allocation_map(i
, &cbrmap
, scr
) {
468 prefetch_data(cb
, 1, GRU_CACHE_LINE_BYTES
);
469 prefetch_data(cbe
+ i
* GRU_HANDLE_STRIDE
, 1,
470 GRU_CACHE_LINE_BYTES
);
471 cb
+= GRU_HANDLE_STRIDE
;
475 static void gru_load_context_data(void *save
, void *grubase
, int ctxnum
,
476 unsigned long cbrmap
, unsigned long dsrmap
,
479 void *gseg
, *cb
, *cbe
;
480 unsigned long length
;
483 gseg
= grubase
+ ctxnum
* GRU_GSEG_STRIDE
;
484 cb
= gseg
+ GRU_CB_BASE
;
485 cbe
= grubase
+ GRU_CBE_BASE
;
486 length
= hweight64(dsrmap
) * GRU_DSR_AU_BYTES
;
487 gru_prefetch_context(gseg
, cb
, cbe
, cbrmap
, length
);
489 for_each_cbr_in_allocation_map(i
, &cbrmap
, scr
) {
491 save
+= gru_copy_handle(cb
, save
);
492 save
+= gru_copy_handle(cbe
+ i
* GRU_HANDLE_STRIDE
,
495 memset(cb
, 0, GRU_CACHE_LINE_BYTES
);
496 memset(cbe
+ i
* GRU_HANDLE_STRIDE
, 0,
497 GRU_CACHE_LINE_BYTES
);
499 /* Flush CBE to hide race in context restart */
501 gru_flush_cache(cbe
+ i
* GRU_HANDLE_STRIDE
);
502 cb
+= GRU_HANDLE_STRIDE
;
506 memcpy(gseg
+ GRU_DS_BASE
, save
, length
);
508 memset(gseg
+ GRU_DS_BASE
, 0, length
);
511 static void gru_unload_context_data(void *save
, void *grubase
, int ctxnum
,
512 unsigned long cbrmap
, unsigned long dsrmap
)
514 void *gseg
, *cb
, *cbe
;
515 unsigned long length
;
518 gseg
= grubase
+ ctxnum
* GRU_GSEG_STRIDE
;
519 cb
= gseg
+ GRU_CB_BASE
;
520 cbe
= grubase
+ GRU_CBE_BASE
;
521 length
= hweight64(dsrmap
) * GRU_DSR_AU_BYTES
;
523 /* CBEs may not be coherent. Flush them from cache */
524 for_each_cbr_in_allocation_map(i
, &cbrmap
, scr
)
525 gru_flush_cache(cbe
+ i
* GRU_HANDLE_STRIDE
);
526 mb(); /* Let the CL flush complete */
528 gru_prefetch_context(gseg
, cb
, cbe
, cbrmap
, length
);
530 for_each_cbr_in_allocation_map(i
, &cbrmap
, scr
) {
531 save
+= gru_copy_handle(save
, cb
);
532 save
+= gru_copy_handle(save
, cbe
+ i
* GRU_HANDLE_STRIDE
);
533 cb
+= GRU_HANDLE_STRIDE
;
535 memcpy(save
, gseg
+ GRU_DS_BASE
, length
);
538 void gru_unload_context(struct gru_thread_state
*gts
, int savestate
)
540 struct gru_state
*gru
= gts
->ts_gru
;
541 struct gru_context_configuration_handle
*cch
;
542 int ctxnum
= gts
->ts_ctxnum
;
544 if (!is_kernel_context(gts
))
545 zap_vma_ptes(gts
->ts_vma
, UGRUADDR(gts
), GRU_GSEG_PAGESIZE
);
546 cch
= get_cch(gru
->gs_gru_base_vaddr
, ctxnum
);
548 gru_dbg(grudev
, "gts %p, cbrmap 0x%lx, dsrmap 0x%lx\n",
549 gts
, gts
->ts_cbr_map
, gts
->ts_dsr_map
);
550 lock_cch_handle(cch
);
551 if (cch_interrupt_sync(cch
))
554 if (!is_kernel_context(gts
))
555 gru_unload_mm_tracker(gru
, gts
);
557 gru_unload_context_data(gts
->ts_gdata
, gru
->gs_gru_base_vaddr
,
558 ctxnum
, gts
->ts_cbr_map
,
560 gts
->ts_data_valid
= 1;
563 if (cch_deallocate(cch
))
565 unlock_cch_handle(cch
);
567 gru_free_gru_context(gts
);
571 * Load a GRU context by copying it from the thread data structure in memory
574 void gru_load_context(struct gru_thread_state
*gts
)
576 struct gru_state
*gru
= gts
->ts_gru
;
577 struct gru_context_configuration_handle
*cch
;
578 int i
, err
, asid
, ctxnum
= gts
->ts_ctxnum
;
580 cch
= get_cch(gru
->gs_gru_base_vaddr
, ctxnum
);
581 lock_cch_handle(cch
);
582 cch
->tfm_fault_bit_enable
=
583 (gts
->ts_user_options
== GRU_OPT_MISS_FMM_POLL
584 || gts
->ts_user_options
== GRU_OPT_MISS_FMM_INTR
);
585 cch
->tlb_int_enable
= (gts
->ts_user_options
== GRU_OPT_MISS_FMM_INTR
);
586 if (cch
->tlb_int_enable
) {
587 gts
->ts_tlb_int_select
= gru_cpu_fault_map_id();
588 cch
->tlb_int_select
= gts
->ts_tlb_int_select
;
590 if (gts
->ts_cch_req_slice
>= 0) {
591 cch
->req_slice_set_enable
= 1;
592 cch
->req_slice
= gts
->ts_cch_req_slice
;
594 cch
->req_slice_set_enable
=0;
596 cch
->tfm_done_bit_enable
= 0;
597 cch
->dsr_allocation_map
= gts
->ts_dsr_map
;
598 cch
->cbr_allocation_map
= gts
->ts_cbr_map
;
600 if (is_kernel_context(gts
)) {
601 cch
->unmap_enable
= 1;
602 cch
->tfm_done_bit_enable
= 1;
603 cch
->cb_int_enable
= 1;
604 cch
->tlb_int_select
= 0; /* For now, ints go to cpu 0 */
606 cch
->unmap_enable
= 0;
607 cch
->tfm_done_bit_enable
= 0;
608 cch
->cb_int_enable
= 0;
609 asid
= gru_load_mm_tracker(gru
, gts
);
610 for (i
= 0; i
< 8; i
++) {
611 cch
->asid
[i
] = asid
+ i
;
612 cch
->sizeavail
[i
] = gts
->ts_sizeavail
;
616 err
= cch_allocate(cch
);
619 "err %d: cch %p, gts %p, cbr 0x%lx, dsr 0x%lx\n",
620 err
, cch
, gts
, gts
->ts_cbr_map
, gts
->ts_dsr_map
);
624 gru_load_context_data(gts
->ts_gdata
, gru
->gs_gru_base_vaddr
, ctxnum
,
625 gts
->ts_cbr_map
, gts
->ts_dsr_map
, gts
->ts_data_valid
);
629 unlock_cch_handle(cch
);
631 gru_dbg(grudev
, "gid %d, gts %p, cbrmap 0x%lx, dsrmap 0x%lx, tie %d, tis %d\n",
632 gts
->ts_gru
->gs_gid
, gts
, gts
->ts_cbr_map
, gts
->ts_dsr_map
,
633 (gts
->ts_user_options
== GRU_OPT_MISS_FMM_INTR
), gts
->ts_tlb_int_select
);
637 * Update fields in an active CCH:
638 * - retarget interrupts on local blade
639 * - update sizeavail mask
641 int gru_update_cch(struct gru_thread_state
*gts
)
643 struct gru_context_configuration_handle
*cch
;
644 struct gru_state
*gru
= gts
->ts_gru
;
645 int i
, ctxnum
= gts
->ts_ctxnum
, ret
= 0;
647 cch
= get_cch(gru
->gs_gru_base_vaddr
, ctxnum
);
649 lock_cch_handle(cch
);
650 if (cch
->state
== CCHSTATE_ACTIVE
) {
651 if (gru
->gs_gts
[gts
->ts_ctxnum
] != gts
)
653 if (cch_interrupt(cch
))
655 for (i
= 0; i
< 8; i
++)
656 cch
->sizeavail
[i
] = gts
->ts_sizeavail
;
657 gts
->ts_tlb_int_select
= gru_cpu_fault_map_id();
658 cch
->tlb_int_select
= gru_cpu_fault_map_id();
659 cch
->tfm_fault_bit_enable
=
660 (gts
->ts_user_options
== GRU_OPT_MISS_FMM_POLL
661 || gts
->ts_user_options
== GRU_OPT_MISS_FMM_INTR
);
667 unlock_cch_handle(cch
);
672 * Update CCH tlb interrupt select. Required when all the following is true:
673 * - task's GRU context is loaded into a GRU
674 * - task is using interrupt notification for TLB faults
675 * - task has migrated to a different cpu on the same blade where
676 * it was previously running.
678 static int gru_retarget_intr(struct gru_thread_state
*gts
)
680 if (gts
->ts_tlb_int_select
< 0
681 || gts
->ts_tlb_int_select
== gru_cpu_fault_map_id())
684 gru_dbg(grudev
, "retarget from %d to %d\n", gts
->ts_tlb_int_select
,
685 gru_cpu_fault_map_id());
686 return gru_update_cch(gts
);
690 * Check if a GRU context is allowed to use a specific chiplet. By default
691 * a context is assigned to any blade-local chiplet. However, users can
693 * Returns 1 if assignment allowed, 0 otherwise
695 static int gru_check_chiplet_assignment(struct gru_state
*gru
,
696 struct gru_thread_state
*gts
)
701 blade_id
= gts
->ts_user_blade_id
;
703 blade_id
= uv_numa_blade_id();
705 chiplet_id
= gts
->ts_user_chiplet_id
;
706 return gru
->gs_blade_id
== blade_id
&&
707 (chiplet_id
< 0 || chiplet_id
== gru
->gs_chiplet_id
);
711 * Unload the gru context if it is not assigned to the correct blade or
712 * chiplet. Misassignment can occur if the process migrates to a different
713 * blade or if the user changes the selected blade/chiplet.
715 int gru_check_context_placement(struct gru_thread_state
*gts
)
717 struct gru_state
*gru
;
721 * If the current task is the context owner, verify that the
722 * context is correctly placed. This test is skipped for non-owner
723 * references. Pthread apps use non-owner references to the CBRs.
727 * If gru or gts->ts_tgid_owner isn't initialized properly, return
728 * success to indicate that the caller does not need to unload the
729 * gru context.The caller is responsible for their inspection and
730 * reinitialization if needed.
732 if (!gru
|| gts
->ts_tgid_owner
!= current
->tgid
)
735 if (!gru_check_chiplet_assignment(gru
, gts
)) {
736 STAT(check_context_unload
);
738 } else if (gru_retarget_intr(gts
)) {
739 STAT(check_context_retarget_intr
);
747 * Insufficient GRU resources available on the local blade. Steal a context from
748 * a process. This is a hack until a _real_ resource scheduler is written....
750 #define next_ctxnum(n) ((n) < GRU_NUM_CCH - 2 ? (n) + 1 : 0)
751 #define next_gru(b, g) (((g) < &(b)->bs_grus[GRU_CHIPLETS_PER_BLADE - 1]) ? \
752 ((g)+1) : &(b)->bs_grus[0])
754 static int is_gts_stealable(struct gru_thread_state
*gts
,
755 struct gru_blade_state
*bs
)
757 if (is_kernel_context(gts
))
758 return down_write_trylock(&bs
->bs_kgts_sema
);
760 return mutex_trylock(>s
->ts_ctxlock
);
763 static void gts_stolen(struct gru_thread_state
*gts
,
764 struct gru_blade_state
*bs
)
766 if (is_kernel_context(gts
)) {
767 up_write(&bs
->bs_kgts_sema
);
768 STAT(steal_kernel_context
);
770 mutex_unlock(>s
->ts_ctxlock
);
771 STAT(steal_user_context
);
775 void gru_steal_context(struct gru_thread_state
*gts
)
777 struct gru_blade_state
*blade
;
778 struct gru_state
*gru
, *gru0
;
779 struct gru_thread_state
*ngts
= NULL
;
780 int ctxnum
, ctxnum0
, flag
= 0, cbr
, dsr
;
783 blade_id
= gts
->ts_user_blade_id
;
785 blade_id
= uv_numa_blade_id();
786 cbr
= gts
->ts_cbr_au_count
;
787 dsr
= gts
->ts_dsr_au_count
;
789 blade
= gru_base
[blade_id
];
790 spin_lock(&blade
->bs_lock
);
792 ctxnum
= next_ctxnum(blade
->bs_lru_ctxnum
);
793 gru
= blade
->bs_lru_gru
;
795 gru
= next_gru(blade
, gru
);
796 blade
->bs_lru_gru
= gru
;
797 blade
->bs_lru_ctxnum
= ctxnum
;
801 if (gru_check_chiplet_assignment(gru
, gts
)) {
802 if (check_gru_resources(gru
, cbr
, dsr
, GRU_NUM_CCH
))
804 spin_lock(&gru
->gs_lock
);
805 for (; ctxnum
< GRU_NUM_CCH
; ctxnum
++) {
806 if (flag
&& gru
== gru0
&& ctxnum
== ctxnum0
)
808 ngts
= gru
->gs_gts
[ctxnum
];
810 * We are grabbing locks out of order, so trylock is
811 * needed. GTSs are usually not locked, so the odds of
812 * success are high. If trylock fails, try to steal a
815 if (ngts
&& is_gts_stealable(ngts
, blade
))
819 spin_unlock(&gru
->gs_lock
);
820 if (ngts
|| (flag
&& gru
== gru0
&& ctxnum
== ctxnum0
))
823 if (flag
&& gru
== gru0
)
827 gru
= next_gru(blade
, gru
);
829 spin_unlock(&blade
->bs_lock
);
832 gts
->ustats
.context_stolen
++;
833 ngts
->ts_steal_jiffies
= jiffies
;
834 gru_unload_context(ngts
, is_kernel_context(ngts
) ? 0 : 1);
835 gts_stolen(ngts
, blade
);
837 STAT(steal_context_failed
);
840 "stole gid %d, ctxnum %d from gts %p. Need cb %d, ds %d;"
841 " avail cb %ld, ds %ld\n",
842 gru
->gs_gid
, ctxnum
, ngts
, cbr
, dsr
, hweight64(gru
->gs_cbr_map
),
843 hweight64(gru
->gs_dsr_map
));
847 * Assign a gru context.
849 static int gru_assign_context_number(struct gru_state
*gru
)
853 ctxnum
= find_first_zero_bit(&gru
->gs_context_map
, GRU_NUM_CCH
);
854 __set_bit(ctxnum
, &gru
->gs_context_map
);
859 * Scan the GRUs on the local blade & assign a GRU context.
861 struct gru_state
*gru_assign_gru_context(struct gru_thread_state
*gts
)
863 struct gru_state
*gru
, *grux
;
864 int i
, max_active_contexts
;
865 int blade_id
= gts
->ts_user_blade_id
;
868 blade_id
= uv_numa_blade_id();
871 max_active_contexts
= GRU_NUM_CCH
;
872 for_each_gru_on_blade(grux
, blade_id
, i
) {
873 if (!gru_check_chiplet_assignment(grux
, gts
))
875 if (check_gru_resources(grux
, gts
->ts_cbr_au_count
,
876 gts
->ts_dsr_au_count
,
877 max_active_contexts
)) {
879 max_active_contexts
= grux
->gs_active_contexts
;
880 if (max_active_contexts
== 0)
886 spin_lock(&gru
->gs_lock
);
887 if (!check_gru_resources(gru
, gts
->ts_cbr_au_count
,
888 gts
->ts_dsr_au_count
, GRU_NUM_CCH
)) {
889 spin_unlock(&gru
->gs_lock
);
892 reserve_gru_resources(gru
, gts
);
894 gts
->ts_blade
= gru
->gs_blade_id
;
895 gts
->ts_ctxnum
= gru_assign_context_number(gru
);
896 refcount_inc(>s
->ts_refcnt
);
897 gru
->gs_gts
[gts
->ts_ctxnum
] = gts
;
898 spin_unlock(&gru
->gs_lock
);
900 STAT(assign_context
);
902 "gseg %p, gts %p, gid %d, ctx %d, cbr %d, dsr %d\n",
903 gseg_virtual_address(gts
->ts_gru
, gts
->ts_ctxnum
), gts
,
904 gts
->ts_gru
->gs_gid
, gts
->ts_ctxnum
,
905 gts
->ts_cbr_au_count
, gts
->ts_dsr_au_count
);
907 gru_dbg(grudev
, "failed to allocate a GTS %s\n", "");
908 STAT(assign_context_failed
);
917 * Map the user's GRU segment
919 * Note: gru segments alway mmaped on GRU_GSEG_PAGESIZE boundaries.
921 vm_fault_t
gru_fault(struct vm_fault
*vmf
)
923 struct vm_area_struct
*vma
= vmf
->vma
;
924 struct gru_thread_state
*gts
;
925 unsigned long paddr
, vaddr
;
926 unsigned long expires
;
928 vaddr
= vmf
->address
;
929 gru_dbg(grudev
, "vma %p, vaddr 0x%lx (0x%lx)\n",
930 vma
, vaddr
, GSEG_BASE(vaddr
));
933 /* The following check ensures vaddr is a valid address in the VMA */
934 gts
= gru_find_thread_state(vma
, TSID(vaddr
, vma
));
936 return VM_FAULT_SIGBUS
;
939 mutex_lock(>s
->ts_ctxlock
);
941 if (gru_check_context_placement(gts
)) {
942 mutex_unlock(>s
->ts_ctxlock
);
943 gru_unload_context(gts
, 1);
944 return VM_FAULT_NOPAGE
;
948 STAT(load_user_context
);
949 if (!gru_assign_gru_context(gts
)) {
950 mutex_unlock(>s
->ts_ctxlock
);
951 set_current_state(TASK_INTERRUPTIBLE
);
952 schedule_timeout(GRU_ASSIGN_DELAY
); /* true hack ZZZ */
953 expires
= gts
->ts_steal_jiffies
+ GRU_STEAL_DELAY
;
954 if (time_before(expires
, jiffies
))
955 gru_steal_context(gts
);
958 gru_load_context(gts
);
959 paddr
= gseg_physical_address(gts
->ts_gru
, gts
->ts_ctxnum
);
960 remap_pfn_range(vma
, vaddr
& ~(GRU_GSEG_PAGESIZE
- 1),
961 paddr
>> PAGE_SHIFT
, GRU_GSEG_PAGESIZE
,
965 mutex_unlock(>s
->ts_ctxlock
);
967 return VM_FAULT_NOPAGE
;