1 // SPDX-License-Identifier: GPL-2.0-or-later
10 static int mv88e6xxx_atu_get_hash(struct mv88e6xxx_chip
*chip
, u8
*hash
)
12 if (chip
->info
->ops
->atu_get_hash
)
13 return chip
->info
->ops
->atu_get_hash(chip
, hash
);
18 static int mv88e6xxx_atu_set_hash(struct mv88e6xxx_chip
*chip
, u8 hash
)
20 if (chip
->info
->ops
->atu_set_hash
)
21 return chip
->info
->ops
->atu_set_hash(chip
, hash
);
26 enum mv88e6xxx_devlink_param_id
{
27 MV88E6XXX_DEVLINK_PARAM_ID_BASE
= DEVLINK_PARAM_GENERIC_ID_MAX
,
28 MV88E6XXX_DEVLINK_PARAM_ID_ATU_HASH
,
31 int mv88e6xxx_devlink_param_get(struct dsa_switch
*ds
, u32 id
,
32 struct devlink_param_gset_ctx
*ctx
)
34 struct mv88e6xxx_chip
*chip
= ds
->priv
;
37 mv88e6xxx_reg_lock(chip
);
40 case MV88E6XXX_DEVLINK_PARAM_ID_ATU_HASH
:
41 err
= mv88e6xxx_atu_get_hash(chip
, &ctx
->val
.vu8
);
48 mv88e6xxx_reg_unlock(chip
);
53 int mv88e6xxx_devlink_param_set(struct dsa_switch
*ds
, u32 id
,
54 struct devlink_param_gset_ctx
*ctx
)
56 struct mv88e6xxx_chip
*chip
= ds
->priv
;
59 mv88e6xxx_reg_lock(chip
);
62 case MV88E6XXX_DEVLINK_PARAM_ID_ATU_HASH
:
63 err
= mv88e6xxx_atu_set_hash(chip
, ctx
->val
.vu8
);
70 mv88e6xxx_reg_unlock(chip
);
75 static const struct devlink_param mv88e6xxx_devlink_params
[] = {
76 DSA_DEVLINK_PARAM_DRIVER(MV88E6XXX_DEVLINK_PARAM_ID_ATU_HASH
,
77 "ATU_hash", DEVLINK_PARAM_TYPE_U8
,
78 BIT(DEVLINK_PARAM_CMODE_RUNTIME
)),
81 int mv88e6xxx_setup_devlink_params(struct dsa_switch
*ds
)
83 return dsa_devlink_params_register(ds
, mv88e6xxx_devlink_params
,
84 ARRAY_SIZE(mv88e6xxx_devlink_params
));
87 void mv88e6xxx_teardown_devlink_params(struct dsa_switch
*ds
)
89 dsa_devlink_params_unregister(ds
, mv88e6xxx_devlink_params
,
90 ARRAY_SIZE(mv88e6xxx_devlink_params
));
93 enum mv88e6xxx_devlink_resource_id
{
94 MV88E6XXX_RESOURCE_ID_ATU
,
95 MV88E6XXX_RESOURCE_ID_ATU_BIN_0
,
96 MV88E6XXX_RESOURCE_ID_ATU_BIN_1
,
97 MV88E6XXX_RESOURCE_ID_ATU_BIN_2
,
98 MV88E6XXX_RESOURCE_ID_ATU_BIN_3
,
101 static u64
mv88e6xxx_devlink_atu_bin_get(struct mv88e6xxx_chip
*chip
,
107 mv88e6xxx_reg_lock(chip
);
109 err
= mv88e6xxx_g2_atu_stats_set(chip
, MV88E6XXX_G2_ATU_STATS_MODE_ALL
,
112 dev_err(chip
->dev
, "failed to set ATU stats kind/bin\n");
116 err
= mv88e6xxx_g1_atu_get_next(chip
, 0);
118 dev_err(chip
->dev
, "failed to perform ATU get next\n");
122 err
= mv88e6xxx_g2_atu_stats_get(chip
, &occupancy
);
124 dev_err(chip
->dev
, "failed to get ATU stats\n");
128 occupancy
&= MV88E6XXX_G2_ATU_STATS_MASK
;
131 mv88e6xxx_reg_unlock(chip
);
136 static u64
mv88e6xxx_devlink_atu_bin_0_get(void *priv
)
138 struct mv88e6xxx_chip
*chip
= priv
;
140 return mv88e6xxx_devlink_atu_bin_get(chip
,
141 MV88E6XXX_G2_ATU_STATS_BIN_0
);
144 static u64
mv88e6xxx_devlink_atu_bin_1_get(void *priv
)
146 struct mv88e6xxx_chip
*chip
= priv
;
148 return mv88e6xxx_devlink_atu_bin_get(chip
,
149 MV88E6XXX_G2_ATU_STATS_BIN_1
);
152 static u64
mv88e6xxx_devlink_atu_bin_2_get(void *priv
)
154 struct mv88e6xxx_chip
*chip
= priv
;
156 return mv88e6xxx_devlink_atu_bin_get(chip
,
157 MV88E6XXX_G2_ATU_STATS_BIN_2
);
160 static u64
mv88e6xxx_devlink_atu_bin_3_get(void *priv
)
162 struct mv88e6xxx_chip
*chip
= priv
;
164 return mv88e6xxx_devlink_atu_bin_get(chip
,
165 MV88E6XXX_G2_ATU_STATS_BIN_3
);
168 static u64
mv88e6xxx_devlink_atu_get(void *priv
)
170 return mv88e6xxx_devlink_atu_bin_0_get(priv
) +
171 mv88e6xxx_devlink_atu_bin_1_get(priv
) +
172 mv88e6xxx_devlink_atu_bin_2_get(priv
) +
173 mv88e6xxx_devlink_atu_bin_3_get(priv
);
176 int mv88e6xxx_setup_devlink_resources(struct dsa_switch
*ds
)
178 struct devlink_resource_size_params size_params
;
179 struct mv88e6xxx_chip
*chip
= ds
->priv
;
182 devlink_resource_size_params_init(&size_params
,
183 mv88e6xxx_num_macs(chip
),
184 mv88e6xxx_num_macs(chip
),
185 1, DEVLINK_RESOURCE_UNIT_ENTRY
);
187 err
= dsa_devlink_resource_register(ds
, "ATU",
188 mv88e6xxx_num_macs(chip
),
189 MV88E6XXX_RESOURCE_ID_ATU
,
190 DEVLINK_RESOURCE_ID_PARENT_TOP
,
195 devlink_resource_size_params_init(&size_params
,
196 mv88e6xxx_num_macs(chip
) / 4,
197 mv88e6xxx_num_macs(chip
) / 4,
198 1, DEVLINK_RESOURCE_UNIT_ENTRY
);
200 err
= dsa_devlink_resource_register(ds
, "ATU_bin_0",
201 mv88e6xxx_num_macs(chip
) / 4,
202 MV88E6XXX_RESOURCE_ID_ATU_BIN_0
,
203 MV88E6XXX_RESOURCE_ID_ATU
,
208 err
= dsa_devlink_resource_register(ds
, "ATU_bin_1",
209 mv88e6xxx_num_macs(chip
) / 4,
210 MV88E6XXX_RESOURCE_ID_ATU_BIN_1
,
211 MV88E6XXX_RESOURCE_ID_ATU
,
216 err
= dsa_devlink_resource_register(ds
, "ATU_bin_2",
217 mv88e6xxx_num_macs(chip
) / 4,
218 MV88E6XXX_RESOURCE_ID_ATU_BIN_2
,
219 MV88E6XXX_RESOURCE_ID_ATU
,
224 err
= dsa_devlink_resource_register(ds
, "ATU_bin_3",
225 mv88e6xxx_num_macs(chip
) / 4,
226 MV88E6XXX_RESOURCE_ID_ATU_BIN_3
,
227 MV88E6XXX_RESOURCE_ID_ATU
,
232 dsa_devlink_resource_occ_get_register(ds
,
233 MV88E6XXX_RESOURCE_ID_ATU
,
234 mv88e6xxx_devlink_atu_get
,
237 dsa_devlink_resource_occ_get_register(ds
,
238 MV88E6XXX_RESOURCE_ID_ATU_BIN_0
,
239 mv88e6xxx_devlink_atu_bin_0_get
,
242 dsa_devlink_resource_occ_get_register(ds
,
243 MV88E6XXX_RESOURCE_ID_ATU_BIN_1
,
244 mv88e6xxx_devlink_atu_bin_1_get
,
247 dsa_devlink_resource_occ_get_register(ds
,
248 MV88E6XXX_RESOURCE_ID_ATU_BIN_2
,
249 mv88e6xxx_devlink_atu_bin_2_get
,
252 dsa_devlink_resource_occ_get_register(ds
,
253 MV88E6XXX_RESOURCE_ID_ATU_BIN_3
,
254 mv88e6xxx_devlink_atu_bin_3_get
,
260 dsa_devlink_resources_unregister(ds
);
264 static int mv88e6xxx_region_global_snapshot(struct devlink
*dl
,
265 const struct devlink_region_ops
*ops
,
266 struct netlink_ext_ack
*extack
,
269 struct mv88e6xxx_region_priv
*region_priv
= ops
->priv
;
270 struct dsa_switch
*ds
= dsa_devlink_to_ds(dl
);
271 struct mv88e6xxx_chip
*chip
= ds
->priv
;
275 registers
= kmalloc_array(32, sizeof(u16
), GFP_KERNEL
);
279 mv88e6xxx_reg_lock(chip
);
280 for (i
= 0; i
< 32; i
++) {
281 switch (region_priv
->id
) {
282 case MV88E6XXX_REGION_GLOBAL1
:
283 err
= mv88e6xxx_g1_read(chip
, i
, ®isters
[i
]);
285 case MV88E6XXX_REGION_GLOBAL2
:
286 err
= mv88e6xxx_g2_read(chip
, i
, ®isters
[i
]);
297 *data
= (u8
*)registers
;
299 mv88e6xxx_reg_unlock(chip
);
304 /* The ATU entry varies between mv88e6xxx chipset generations. Define
305 * a generic format which covers all the current and hopefully future
306 * mv88e6xxx generations
309 struct mv88e6xxx_devlink_atu_entry
{
310 /* The FID is scattered over multiple registers. */
319 static int mv88e6xxx_region_atu_snapshot_fid(struct mv88e6xxx_chip
*chip
,
321 struct mv88e6xxx_devlink_atu_entry
*table
,
324 u16 atu_op
, atu_data
, atu_01
, atu_23
, atu_45
;
325 struct mv88e6xxx_atu_entry addr
;
329 eth_broadcast_addr(addr
.mac
);
332 err
= mv88e6xxx_g1_atu_getnext(chip
, fid
, &addr
);
339 err
= mv88e6xxx_g1_read(chip
, MV88E6XXX_G1_ATU_OP
, &atu_op
);
343 err
= mv88e6xxx_g1_read(chip
, MV88E6XXX_G1_ATU_DATA
, &atu_data
);
347 err
= mv88e6xxx_g1_read(chip
, MV88E6XXX_G1_ATU_MAC01
, &atu_01
);
351 err
= mv88e6xxx_g1_read(chip
, MV88E6XXX_G1_ATU_MAC23
, &atu_23
);
355 err
= mv88e6xxx_g1_read(chip
, MV88E6XXX_G1_ATU_MAC45
, &atu_45
);
359 table
[*count
].fid
= fid
;
360 table
[*count
].atu_op
= atu_op
;
361 table
[*count
].atu_data
= atu_data
;
362 table
[*count
].atu_01
= atu_01
;
363 table
[*count
].atu_23
= atu_23
;
364 table
[*count
].atu_45
= atu_45
;
366 } while (!is_broadcast_ether_addr(addr
.mac
));
371 static int mv88e6xxx_region_atu_snapshot(struct devlink
*dl
,
372 const struct devlink_region_ops
*ops
,
373 struct netlink_ext_ack
*extack
,
376 struct dsa_switch
*ds
= dsa_devlink_to_ds(dl
);
377 struct mv88e6xxx_devlink_atu_entry
*table
;
378 struct mv88e6xxx_chip
*chip
= ds
->priv
;
379 int fid
= -1, err
= 0, count
;
381 table
= kmalloc_array(mv88e6xxx_num_databases(chip
),
382 sizeof(struct mv88e6xxx_devlink_atu_entry
),
387 memset(table
, 0, mv88e6xxx_num_databases(chip
) *
388 sizeof(struct mv88e6xxx_devlink_atu_entry
));
392 mv88e6xxx_reg_lock(chip
);
395 fid
= find_next_bit(chip
->fid_bitmap
, MV88E6XXX_N_FID
, fid
+ 1);
396 if (fid
== MV88E6XXX_N_FID
)
399 err
= mv88e6xxx_region_atu_snapshot_fid(chip
, fid
, table
,
408 mv88e6xxx_reg_unlock(chip
);
414 * struct mv88e6xxx_devlink_vtu_entry - Devlink VTU entry
415 * @fid: Global1/2: FID and VLAN policy.
416 * @sid: Global1/3: SID, unknown filters and learning.
417 * @op: Global1/5: FID (old chipsets).
418 * @vid: Global1/6: VID, valid, and page.
419 * @data: Global1/7-9: Membership data and priority override.
420 * @resvd: Reserved. Also happens to align the size to 16B.
422 * The VTU entry format varies between chipset generations, the
423 * descriptions above represent the superset of all possible
424 * information, not all fields are valid on all devices. Since this is
425 * a low-level debug interface, copy all data verbatim and defer
426 * parsing to the consumer.
428 struct mv88e6xxx_devlink_vtu_entry
{
437 static int mv88e6xxx_region_vtu_snapshot(struct devlink
*dl
,
438 const struct devlink_region_ops
*ops
,
439 struct netlink_ext_ack
*extack
,
442 struct mv88e6xxx_devlink_vtu_entry
*table
, *entry
;
443 struct dsa_switch
*ds
= dsa_devlink_to_ds(dl
);
444 struct mv88e6xxx_chip
*chip
= ds
->priv
;
445 struct mv88e6xxx_vtu_entry vlan
;
448 table
= kcalloc(mv88e6xxx_max_vid(chip
) + 1,
449 sizeof(struct mv88e6xxx_devlink_vtu_entry
),
455 vlan
.vid
= mv88e6xxx_max_vid(chip
);
458 mv88e6xxx_reg_lock(chip
);
461 err
= mv88e6xxx_g1_vtu_getnext(chip
, &vlan
);
468 err
= err
? : mv88e6xxx_g1_read(chip
, MV88E6352_G1_VTU_FID
,
470 err
= err
? : mv88e6xxx_g1_read(chip
, MV88E6352_G1_VTU_SID
,
472 err
= err
? : mv88e6xxx_g1_read(chip
, MV88E6XXX_G1_VTU_OP
,
474 err
= err
? : mv88e6xxx_g1_read(chip
, MV88E6XXX_G1_VTU_VID
,
476 err
= err
? : mv88e6xxx_g1_read(chip
, MV88E6XXX_G1_VTU_DATA1
,
478 err
= err
? : mv88e6xxx_g1_read(chip
, MV88E6XXX_G1_VTU_DATA2
,
480 err
= err
? : mv88e6xxx_g1_read(chip
, MV88E6XXX_G1_VTU_DATA3
,
486 } while (vlan
.vid
< mv88e6xxx_max_vid(chip
));
488 mv88e6xxx_reg_unlock(chip
);
500 * struct mv88e6xxx_devlink_stu_entry - Devlink STU entry
501 * @sid: Global1/3: SID, unknown filters and learning.
502 * @vid: Global1/6: Valid bit.
503 * @data: Global1/7-9: Membership data and priority override.
504 * @resvd: Reserved. In case we forgot something.
506 * The STU entry format varies between chipset generations. Peridot
507 * and Amethyst packs the STU data into Global1/7-8. Older silicon
508 * spreads the information across all three VTU data registers -
509 * inheriting the layout of even older hardware that had no STU at
510 * all. Since this is a low-level debug interface, copy all data
511 * verbatim and defer parsing to the consumer.
513 struct mv88e6xxx_devlink_stu_entry
{
520 static int mv88e6xxx_region_stu_snapshot(struct devlink
*dl
,
521 const struct devlink_region_ops
*ops
,
522 struct netlink_ext_ack
*extack
,
525 struct mv88e6xxx_devlink_stu_entry
*table
, *entry
;
526 struct dsa_switch
*ds
= dsa_devlink_to_ds(dl
);
527 struct mv88e6xxx_chip
*chip
= ds
->priv
;
528 struct mv88e6xxx_stu_entry stu
;
531 table
= kcalloc(mv88e6xxx_max_sid(chip
) + 1,
532 sizeof(struct mv88e6xxx_devlink_stu_entry
),
538 stu
.sid
= mv88e6xxx_max_sid(chip
);
541 mv88e6xxx_reg_lock(chip
);
544 err
= mv88e6xxx_g1_stu_getnext(chip
, &stu
);
551 err
= err
? : mv88e6xxx_g1_read(chip
, MV88E6352_G1_VTU_SID
,
553 err
= err
? : mv88e6xxx_g1_read(chip
, MV88E6XXX_G1_VTU_VID
,
555 err
= err
? : mv88e6xxx_g1_read(chip
, MV88E6XXX_G1_VTU_DATA1
,
557 err
= err
? : mv88e6xxx_g1_read(chip
, MV88E6XXX_G1_VTU_DATA2
,
559 err
= err
? : mv88e6xxx_g1_read(chip
, MV88E6XXX_G1_VTU_DATA3
,
565 } while (stu
.sid
< mv88e6xxx_max_sid(chip
));
567 mv88e6xxx_reg_unlock(chip
);
578 static int mv88e6xxx_region_pvt_snapshot(struct devlink
*dl
,
579 const struct devlink_region_ops
*ops
,
580 struct netlink_ext_ack
*extack
,
583 struct dsa_switch
*ds
= dsa_devlink_to_ds(dl
);
584 struct mv88e6xxx_chip
*chip
= ds
->priv
;
588 pvt
= kcalloc(MV88E6XXX_MAX_PVT_ENTRIES
, sizeof(*pvt
), GFP_KERNEL
);
592 mv88e6xxx_reg_lock(chip
);
595 for (dev
= 0; dev
< MV88E6XXX_MAX_PVT_SWITCHES
; dev
++) {
596 for (port
= 0; port
< MV88E6XXX_MAX_PVT_PORTS
; port
++) {
597 err
= mv88e6xxx_g2_pvt_read(chip
, dev
, port
, cur
);
605 mv88e6xxx_reg_unlock(chip
);
616 static int mv88e6xxx_region_port_snapshot(struct devlink_port
*devlink_port
,
617 const struct devlink_port_region_ops
*ops
,
618 struct netlink_ext_ack
*extack
,
621 struct dsa_switch
*ds
= dsa_devlink_port_to_ds(devlink_port
);
622 int port
= dsa_devlink_port_to_port(devlink_port
);
623 struct mv88e6xxx_chip
*chip
= ds
->priv
;
627 registers
= kmalloc_array(32, sizeof(u16
), GFP_KERNEL
);
631 mv88e6xxx_reg_lock(chip
);
632 for (i
= 0; i
< 32; i
++) {
633 err
= mv88e6xxx_port_read(chip
, port
, i
, ®isters
[i
]);
639 *data
= (u8
*)registers
;
641 mv88e6xxx_reg_unlock(chip
);
646 static struct mv88e6xxx_region_priv mv88e6xxx_region_global1_priv
= {
647 .id
= MV88E6XXX_REGION_GLOBAL1
,
650 static struct devlink_region_ops mv88e6xxx_region_global1_ops
= {
652 .snapshot
= mv88e6xxx_region_global_snapshot
,
654 .priv
= &mv88e6xxx_region_global1_priv
,
657 static struct mv88e6xxx_region_priv mv88e6xxx_region_global2_priv
= {
658 .id
= MV88E6XXX_REGION_GLOBAL2
,
661 static struct devlink_region_ops mv88e6xxx_region_global2_ops
= {
663 .snapshot
= mv88e6xxx_region_global_snapshot
,
665 .priv
= &mv88e6xxx_region_global2_priv
,
668 static struct devlink_region_ops mv88e6xxx_region_atu_ops
= {
670 .snapshot
= mv88e6xxx_region_atu_snapshot
,
674 static struct devlink_region_ops mv88e6xxx_region_vtu_ops
= {
676 .snapshot
= mv88e6xxx_region_vtu_snapshot
,
680 static struct devlink_region_ops mv88e6xxx_region_stu_ops
= {
682 .snapshot
= mv88e6xxx_region_stu_snapshot
,
686 static struct devlink_region_ops mv88e6xxx_region_pvt_ops
= {
688 .snapshot
= mv88e6xxx_region_pvt_snapshot
,
692 static const struct devlink_port_region_ops mv88e6xxx_region_port_ops
= {
694 .snapshot
= mv88e6xxx_region_port_snapshot
,
698 struct mv88e6xxx_region
{
699 struct devlink_region_ops
*ops
;
702 bool (*cond
)(struct mv88e6xxx_chip
*chip
);
705 static struct mv88e6xxx_region mv88e6xxx_regions
[] = {
706 [MV88E6XXX_REGION_GLOBAL1
] = {
707 .ops
= &mv88e6xxx_region_global1_ops
,
708 .size
= 32 * sizeof(u16
)
710 [MV88E6XXX_REGION_GLOBAL2
] = {
711 .ops
= &mv88e6xxx_region_global2_ops
,
712 .size
= 32 * sizeof(u16
) },
713 [MV88E6XXX_REGION_ATU
] = {
714 .ops
= &mv88e6xxx_region_atu_ops
715 /* calculated at runtime */
717 [MV88E6XXX_REGION_VTU
] = {
718 .ops
= &mv88e6xxx_region_vtu_ops
719 /* calculated at runtime */
721 [MV88E6XXX_REGION_STU
] = {
722 .ops
= &mv88e6xxx_region_stu_ops
,
723 .cond
= mv88e6xxx_has_stu
,
724 /* calculated at runtime */
726 [MV88E6XXX_REGION_PVT
] = {
727 .ops
= &mv88e6xxx_region_pvt_ops
,
728 .size
= MV88E6XXX_MAX_PVT_ENTRIES
* sizeof(u16
),
729 .cond
= mv88e6xxx_has_pvt
,
733 void mv88e6xxx_teardown_devlink_regions_global(struct dsa_switch
*ds
)
735 struct mv88e6xxx_chip
*chip
= ds
->priv
;
738 for (i
= 0; i
< ARRAY_SIZE(mv88e6xxx_regions
); i
++)
739 dsa_devlink_region_destroy(chip
->regions
[i
]);
742 void mv88e6xxx_teardown_devlink_regions_port(struct dsa_switch
*ds
, int port
)
744 struct mv88e6xxx_chip
*chip
= ds
->priv
;
746 dsa_devlink_region_destroy(chip
->ports
[port
].region
);
749 int mv88e6xxx_setup_devlink_regions_port(struct dsa_switch
*ds
, int port
)
751 struct mv88e6xxx_chip
*chip
= ds
->priv
;
752 struct devlink_region
*region
;
754 region
= dsa_devlink_port_region_create(ds
,
756 &mv88e6xxx_region_port_ops
, 1,
759 return PTR_ERR(region
);
761 chip
->ports
[port
].region
= region
;
766 int mv88e6xxx_setup_devlink_regions_global(struct dsa_switch
*ds
)
768 bool (*cond
)(struct mv88e6xxx_chip
*chip
);
769 struct mv88e6xxx_chip
*chip
= ds
->priv
;
770 struct devlink_region_ops
*ops
;
771 struct devlink_region
*region
;
775 for (i
= 0; i
< ARRAY_SIZE(mv88e6xxx_regions
); i
++) {
776 ops
= mv88e6xxx_regions
[i
].ops
;
777 size
= mv88e6xxx_regions
[i
].size
;
778 cond
= mv88e6xxx_regions
[i
].cond
;
780 if (cond
&& !cond(chip
))
784 case MV88E6XXX_REGION_ATU
:
785 size
= mv88e6xxx_num_databases(chip
) *
786 sizeof(struct mv88e6xxx_devlink_atu_entry
);
788 case MV88E6XXX_REGION_VTU
:
789 size
= (mv88e6xxx_max_vid(chip
) + 1) *
790 sizeof(struct mv88e6xxx_devlink_vtu_entry
);
792 case MV88E6XXX_REGION_STU
:
793 size
= (mv88e6xxx_max_sid(chip
) + 1) *
794 sizeof(struct mv88e6xxx_devlink_stu_entry
);
798 region
= dsa_devlink_region_create(ds
, ops
, 1, size
);
801 chip
->regions
[i
] = region
;
806 for (j
= 0; j
< i
; j
++)
807 dsa_devlink_region_destroy(chip
->regions
[j
]);
809 return PTR_ERR(region
);
812 int mv88e6xxx_devlink_info_get(struct dsa_switch
*ds
,
813 struct devlink_info_req
*req
,
814 struct netlink_ext_ack
*extack
)
816 struct mv88e6xxx_chip
*chip
= ds
->priv
;
818 return devlink_info_version_fixed_put(req
,
819 DEVLINK_INFO_VERSION_GENERIC_ASIC_ID
,