drm/rockchip: Don't change hdmi reference clock rate
[drm/drm-misc.git] / drivers / net / ethernet / apm / xgene-v2 / ethtool.h
blob8263b4aca6fed8235cfce7242a0f457cf430e8d5
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Applied Micro X-Gene SoC Ethernet v2 Driver
5 * Copyright (c) 2017, Applied Micro Circuits Corporation
6 * Author(s): Iyappan Subramanian <isubramanian@apm.com>
7 */
9 #ifndef __XGENE_ENET_V2_ETHTOOL_H__
10 #define __XGENE_ENET_V2_ETHTOOL_H__
12 struct xge_gstrings_stats {
13 char name[ETH_GSTRING_LEN];
14 int offset;
17 struct xge_gstrings_extd_stats {
18 char name[ETH_GSTRING_LEN];
19 u32 addr;
20 u32 value;
23 #define TR64 0xa080
24 #define TR127 0xa084
25 #define TR255 0xa088
26 #define TR511 0xa08c
27 #define TR1K 0xa090
28 #define TRMAX 0xa094
29 #define TRMGV 0xa098
30 #define RFCS 0xa0a4
31 #define RMCA 0xa0a8
32 #define RBCA 0xa0ac
33 #define RXCF 0xa0b0
34 #define RXPF 0xa0b4
35 #define RXUO 0xa0b8
36 #define RALN 0xa0bc
37 #define RFLR 0xa0c0
38 #define RCDE 0xa0c4
39 #define RCSE 0xa0c8
40 #define RUND 0xa0cc
41 #define ROVR 0xa0d0
42 #define RFRG 0xa0d4
43 #define RJBR 0xa0d8
44 #define RDRP 0xa0dc
45 #define TMCA 0xa0e8
46 #define TBCA 0xa0ec
47 #define TXPF 0xa0f0
48 #define TDFR 0xa0f4
49 #define TEDF 0xa0f8
50 #define TSCL 0xa0fc
51 #define TMCL 0xa100
52 #define TLCL 0xa104
53 #define TXCL 0xa108
54 #define TNCL 0xa10c
55 #define TPFH 0xa110
56 #define TDRP 0xa114
57 #define TJBR 0xa118
58 #define TFCS 0xa11c
59 #define TXCF 0xa120
60 #define TOVR 0xa124
61 #define TUND 0xa128
62 #define TFRG 0xa12c
64 void xge_set_ethtool_ops(struct net_device *ndev);
66 #endif /* __XGENE_ENET_V2_ETHTOOL_H__ */