drivers/net/ethernet/intel/i40e/i40e_xsk.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /* Copyright(c) 2018 Intel Corporation. */
   3
   4 #ifndef _I40E_XSK_H_
   5 #define _I40E_XSK_H_
   6
   7 #include <linux/types.h>
   8
   9 /* This value should match the pragma in the loop_unrolled_for
  10  * macro. Why 4? It is strictly empirical. It seems to be a good
  11  * compromise between the advantage of having simultaneous outstanding
  12  * reads to the DMA array that can hide each others latency and the
  13  * disadvantage of having a larger code path.
  14  */
  15 #define PKTS_PER_BATCH 4
  16
  17 #ifdef __clang__
  18 #define loop_unrolled_for _Pragma("clang loop unroll_count(4)") for
  19 #elif __GNUC__ >= 8
  20 #define loop_unrolled_for _Pragma("GCC unroll 4") for
  21 #else
  22 #define loop_unrolled_for for
  23 #endif
  24
  25 struct i40e_ring;
  26 struct i40e_vsi;
  27 struct net_device;
  28 struct xsk_buff_pool;
  29
  30 int i40e_queue_pair_disable(struct i40e_vsi *vsi, int queue_pair);
  31 int i40e_queue_pair_enable(struct i40e_vsi *vsi, int queue_pair);
  32 int i40e_xsk_pool_setup(struct i40e_vsi *vsi, struct xsk_buff_pool *pool,
  33                         u16 qid);
  34 bool i40e_alloc_rx_buffers_zc(struct i40e_ring *rx_ring, u16 cleaned_count);
  35 int i40e_clean_rx_irq_zc(struct i40e_ring *rx_ring, int budget);
  36
  37 bool i40e_clean_xdp_tx_irq(struct i40e_vsi *vsi, struct i40e_ring *tx_ring);
  38 int i40e_xsk_wakeup(struct net_device *dev, u32 queue_id, u32 flags);
  39 int i40e_realloc_rx_bi_zc(struct i40e_vsi *vsi, bool zc);
  40 void i40e_clear_rx_bi_zc(struct i40e_ring *rx_ring);
  41
  42 #endif /* _I40E_XSK_H_ */