drm/rockchip: Don't change hdmi reference clock rate
[drm/drm-misc.git] / drivers / net / ethernet / qlogic / qed / qed_hw.h
blobe535983ce21bba380024b76d3f1ecd280475c5c9
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2 /* QLogic qed NIC Driver
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
5 */
7 #ifndef _QED_HW_H
8 #define _QED_HW_H
10 #include <linux/types.h>
11 #include <linux/bitops.h>
12 #include <linux/slab.h>
13 #include <linux/string.h>
14 #include "qed.h"
15 #include "qed_dev_api.h"
17 /* Forward decleration */
18 struct qed_ptt;
20 enum reserved_ptts {
21 RESERVED_PTT_EDIAG,
22 RESERVED_PTT_USER_SPACE,
23 RESERVED_PTT_MAIN,
24 RESERVED_PTT_DPC,
25 RESERVED_PTT_MAX
28 enum _dmae_cmd_dst_mask {
29 DMAE_CMD_DST_MASK_NONE = 0,
30 DMAE_CMD_DST_MASK_PCIE = 1,
31 DMAE_CMD_DST_MASK_GRC = 2
34 enum _dmae_cmd_src_mask {
35 DMAE_CMD_SRC_MASK_PCIE = 0,
36 DMAE_CMD_SRC_MASK_GRC = 1
39 enum _dmae_cmd_crc_mask {
40 DMAE_CMD_COMP_CRC_EN_MASK_NONE = 0,
41 DMAE_CMD_COMP_CRC_EN_MASK_SET = 1
44 /* definitions for DMA constants */
45 #define DMAE_GO_VALUE 0x1
47 #define DMAE_COMPLETION_VAL 0xD1AE
48 #define DMAE_CMD_ENDIANITY 0x2
50 #define DMAE_CMD_SIZE 14
51 #define DMAE_CMD_SIZE_TO_FILL (DMAE_CMD_SIZE - 5)
52 #define DMAE_MIN_WAIT_TIME 0x2
53 #define DMAE_MAX_CLIENTS 32
55 /**
56 * qed_gtt_init(): Initialize GTT windows.
58 * @p_hwfn: HW device data.
60 * Return: Void.
62 void qed_gtt_init(struct qed_hwfn *p_hwfn);
64 /**
65 * qed_ptt_invalidate(): Forces all ptt entries to be re-configured
67 * @p_hwfn: HW device data.
69 * Return: Void.
71 void qed_ptt_invalidate(struct qed_hwfn *p_hwfn);
73 /**
74 * qed_ptt_pool_alloc(): Allocate and initialize PTT pool.
76 * @p_hwfn: HW device data.
78 * Return: struct _qed_status - success (0), negative - error.
80 int qed_ptt_pool_alloc(struct qed_hwfn *p_hwfn);
82 /**
83 * qed_ptt_pool_free(): Free PTT pool.
85 * @p_hwfn: HW device data.
87 * Return: Void.
89 void qed_ptt_pool_free(struct qed_hwfn *p_hwfn);
91 /**
92 * qed_ptt_get_hw_addr(): Get PTT's GRC/HW address.
94 * @p_hwfn: HW device data.
95 * @p_ptt: P_ptt
97 * Return: u32.
99 u32 qed_ptt_get_hw_addr(struct qed_hwfn *p_hwfn,
100 struct qed_ptt *p_ptt);
103 * qed_ptt_get_bar_addr(): Get PPT's external BAR address.
105 * @p_ptt: P_ptt
107 * Return: u32.
109 u32 qed_ptt_get_bar_addr(struct qed_ptt *p_ptt);
112 * qed_ptt_set_win(): Set PTT Window's GRC BAR address
114 * @p_hwfn: HW device data.
115 * @new_hw_addr: New HW address.
116 * @p_ptt: P_Ptt
118 * Return: Void.
120 void qed_ptt_set_win(struct qed_hwfn *p_hwfn,
121 struct qed_ptt *p_ptt,
122 u32 new_hw_addr);
125 * qed_get_reserved_ptt(): Get a specific reserved PTT.
127 * @p_hwfn: HW device data.
128 * @ptt_idx: Ptt Index.
130 * Return: struct qed_ptt *.
132 struct qed_ptt *qed_get_reserved_ptt(struct qed_hwfn *p_hwfn,
133 enum reserved_ptts ptt_idx);
136 * qed_wr(): Write value to BAR using the given ptt.
138 * @p_hwfn: HW device data.
139 * @p_ptt: P_ptt.
140 * @val: Val.
141 * @hw_addr: HW address
143 * Return: Void.
145 void qed_wr(struct qed_hwfn *p_hwfn,
146 struct qed_ptt *p_ptt,
147 u32 hw_addr,
148 u32 val);
151 * qed_rd(): Read value from BAR using the given ptt.
153 * @p_hwfn: HW device data.
154 * @p_ptt: P_ptt.
155 * @hw_addr: HW address
157 * Return: Void.
159 u32 qed_rd(struct qed_hwfn *p_hwfn,
160 struct qed_ptt *p_ptt,
161 u32 hw_addr);
164 * qed_memcpy_from(): Copy n bytes from BAR using the given ptt.
166 * @p_hwfn: HW device data.
167 * @p_ptt: P_ptt.
168 * @dest: Destination.
169 * @hw_addr: HW address.
170 * @n: N
172 * Return: Void.
174 void qed_memcpy_from(struct qed_hwfn *p_hwfn,
175 struct qed_ptt *p_ptt,
176 void *dest,
177 u32 hw_addr,
178 size_t n);
181 * qed_memcpy_to(): Copy n bytes to BAR using the given ptt
183 * @p_hwfn: HW device data.
184 * @p_ptt: P_ptt.
185 * @hw_addr: HW address.
186 * @src: Source.
187 * @n: N
189 * Return: Void.
191 void qed_memcpy_to(struct qed_hwfn *p_hwfn,
192 struct qed_ptt *p_ptt,
193 u32 hw_addr,
194 void *src,
195 size_t n);
197 * qed_fid_pretend(): pretend to another function when
198 * accessing the ptt window. There is no way to unpretend
199 * a function. The only way to cancel a pretend is to
200 * pretend back to the original function.
202 * @p_hwfn: HW device data.
203 * @p_ptt: P_ptt.
204 * @fid: fid field of pxp_pretend structure. Can contain
205 * either pf / vf, port/path fields are don't care.
207 * Return: Void.
209 void qed_fid_pretend(struct qed_hwfn *p_hwfn,
210 struct qed_ptt *p_ptt,
211 u16 fid);
214 * qed_port_pretend(): Pretend to another port when accessing the ptt window
216 * @p_hwfn: HW device data.
217 * @p_ptt: P_ptt.
218 * @port_id: The port to pretend to
220 * Return: Void.
222 void qed_port_pretend(struct qed_hwfn *p_hwfn,
223 struct qed_ptt *p_ptt,
224 u8 port_id);
227 * qed_port_unpretend(): Cancel any previously set port pretend
229 * @p_hwfn: HW device data.
230 * @p_ptt: P_ptt.
232 * Return: Void.
234 void qed_port_unpretend(struct qed_hwfn *p_hwfn,
235 struct qed_ptt *p_ptt);
238 * qed_port_fid_pretend(): Pretend to another port and another function
239 * when accessing the ptt window
241 * @p_hwfn: HW device data.
242 * @p_ptt: P_ptt.
243 * @port_id: The port to pretend to
244 * @fid: fid field of pxp_pretend structure. Can contain either pf / vf.
246 * Return: Void.
248 void qed_port_fid_pretend(struct qed_hwfn *p_hwfn,
249 struct qed_ptt *p_ptt, u8 port_id, u16 fid);
252 * qed_vfid_to_concrete(): Build a concrete FID for a given VF ID
254 * @p_hwfn: HW device data.
255 * @vfid: VFID.
257 * Return: Void.
259 u32 qed_vfid_to_concrete(struct qed_hwfn *p_hwfn, u8 vfid);
262 * qed_dmae_idx_to_go_cmd(): Map the idx to dmae cmd
263 * this is declared here since other files will require it.
265 * @idx: Index
267 * Return: Void.
269 u32 qed_dmae_idx_to_go_cmd(u8 idx);
272 * qed_dmae_info_alloc(): Init the dmae_info structure
273 * which is part of p_hwfn.
275 * @p_hwfn: HW device data.
277 * Return: Int.
279 int qed_dmae_info_alloc(struct qed_hwfn *p_hwfn);
282 * qed_dmae_info_free(): Free the dmae_info structure
283 * which is part of p_hwfn.
285 * @p_hwfn: HW device data.
287 * Return: Void.
289 void qed_dmae_info_free(struct qed_hwfn *p_hwfn);
291 union qed_qm_pq_params {
292 struct {
293 u8 q_idx;
294 } iscsi;
296 struct {
297 u8 tc;
298 } core;
300 struct {
301 u8 is_vf;
302 u8 vf_id;
303 u8 tc;
304 } eth;
306 struct {
307 u8 dcqcn;
308 u8 qpid; /* roce relative */
309 } roce;
312 int qed_init_fw_data(struct qed_dev *cdev,
313 const u8 *fw_data);
315 int qed_dmae_sanity(struct qed_hwfn *p_hwfn,
316 struct qed_ptt *p_ptt, const char *phase);
318 #define QED_HW_ERR_MAX_STR_SIZE 256
321 * qed_hw_err_notify(): Notify upper layer driver and management FW
322 * about a HW error.
324 * @p_hwfn: HW device data.
325 * @p_ptt: P_ptt.
326 * @err_type: Err Type.
327 * @fmt: Debug data buffer to send to the MFW
328 * @...: buffer format args
330 * Return void.
332 void __printf(4, 5) __cold qed_hw_err_notify(struct qed_hwfn *p_hwfn,
333 struct qed_ptt *p_ptt,
334 enum qed_hw_err_type err_type,
335 const char *fmt, ...);
336 #endif