drivers/net/ethernet/sfc/falcon/tx.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /****************************************************************************
   3  * Driver for Solarflare network controllers and boards
   4  * Copyright 2005-2006 Fen Systems Ltd.
   5  * Copyright 2005-2013 Solarflare Communications Inc.
   6  */
   7
   8 #include <linux/pci.h>
   9 #include <linux/tcp.h>
  10 #include <linux/ip.h>
  11 #include <linux/in.h>
  12 #include <linux/ipv6.h>
  13 #include <linux/slab.h>
  14 #include <net/ipv6.h>
  15 #include <linux/if_ether.h>
  16 #include <linux/highmem.h>
  17 #include <linux/cache.h>
  18 #include "net_driver.h"
  19 #include "efx.h"
  20 #include "io.h"
  21 #include "nic.h"
  22 #include "tx.h"
  23 #include "workarounds.h"
  24
  25 static inline u8 *ef4_tx_get_copy_buffer(struct ef4_tx_queue *tx_queue,
  26                                          struct ef4_tx_buffer *buffer)
  27 {
  28         unsigned int index = ef4_tx_queue_get_insert_index(tx_queue);
  29         struct ef4_buffer *page_buf =
  30                 &tx_queue->cb_page[index >> (PAGE_SHIFT - EF4_TX_CB_ORDER)];
  31         unsigned int offset =
  32                 ((index << EF4_TX_CB_ORDER) + NET_IP_ALIGN) & (PAGE_SIZE - 1);
  33
  34         if (unlikely(!page_buf->addr) &&
  35             ef4_nic_alloc_buffer(tx_queue->efx, page_buf, PAGE_SIZE,
  36                                  GFP_ATOMIC))
  37                 return NULL;
  38         buffer->dma_addr = page_buf->dma_addr + offset;
  39         buffer->unmap_len = 0;
  40         return (u8 *)page_buf->addr + offset;
  41 }
  42
  43 static void ef4_dequeue_buffer(struct ef4_tx_queue *tx_queue,
  44                                struct ef4_tx_buffer *buffer,
  45                                unsigned int *pkts_compl,
  46                                unsigned int *bytes_compl)
  47 {
  48         if (buffer->unmap_len) {
  49                 struct device *dma_dev = &tx_queue->efx->pci_dev->dev;
  50                 dma_addr_t unmap_addr = buffer->dma_addr - buffer->dma_offset;
  51                 if (buffer->flags & EF4_TX_BUF_MAP_SINGLE)
  52                         dma_unmap_single(dma_dev, unmap_addr, buffer->unmap_len,
  53                                          DMA_TO_DEVICE);
  54                 else
  55                         dma_unmap_page(dma_dev, unmap_addr, buffer->unmap_len,
  56                                        DMA_TO_DEVICE);
  57                 buffer->unmap_len = 0;
  58         }
  59
  60         if (buffer->flags & EF4_TX_BUF_SKB) {
  61                 (*pkts_compl)++;
  62                 (*bytes_compl) += buffer->skb->len;
  63                 dev_consume_skb_any((struct sk_buff *)buffer->skb);
  64                 netif_vdbg(tx_queue->efx, tx_done, tx_queue->efx->net_dev,
  65                            "TX queue %d transmission id %x complete\n",
  66                            tx_queue->queue, tx_queue->read_count);
  67         }
  68
  69         buffer->len = 0;
  70         buffer->flags = 0;
  71 }
  72
  73 unsigned int ef4_tx_max_skb_descs(struct ef4_nic *efx)
  74 {
  75         /* This is probably too much since we don't have any TSO support;
  76          * it's a left-over from when we had Software TSO.  But it's safer
  77          * to leave it as-is than try to determine a new bound.
  78          */
  79         /* Header and payload descriptor for each output segment, plus
  80          * one for every input fragment boundary within a segment
  81          */
  82         unsigned int max_descs = EF4_TSO_MAX_SEGS * 2 + MAX_SKB_FRAGS;
  83
  84         /* Possibly one more per segment for the alignment workaround,
  85          * or for option descriptors
  86          */
  87         if (EF4_WORKAROUND_5391(efx))
  88                 max_descs += EF4_TSO_MAX_SEGS;
  89
  90         /* Possibly more for PCIe page boundaries within input fragments */
  91         if (PAGE_SIZE > EF4_PAGE_SIZE)
  92                 max_descs += max_t(unsigned int, MAX_SKB_FRAGS,
  93                                    DIV_ROUND_UP(GSO_LEGACY_MAX_SIZE,
  94                                                 EF4_PAGE_SIZE));
  95
  96         return max_descs;
  97 }
  98
  99 static void ef4_tx_maybe_stop_queue(struct ef4_tx_queue *txq1)
 100 {
 101         /* We need to consider both queues that the net core sees as one */
 102         struct ef4_tx_queue *txq2 = ef4_tx_queue_partner(txq1);
 103         struct ef4_nic *efx = txq1->efx;
 104         unsigned int fill_level;
 105
 106         fill_level = max(txq1->insert_count - txq1->old_read_count,
 107                          txq2->insert_count - txq2->old_read_count);
 108         if (likely(fill_level < efx->txq_stop_thresh))
 109                 return;
 110
 111         /* We used the stale old_read_count above, which gives us a
 112          * pessimistic estimate of the fill level (which may even
 113          * validly be >= efx->txq_entries).  Now try again using
 114          * read_count (more likely to be a cache miss).
 115          *
 116          * If we read read_count and then conditionally stop the
 117          * queue, it is possible for the completion path to race with
 118          * us and complete all outstanding descriptors in the middle,
 119          * after which there will be no more completions to wake it.
 120          * Therefore we stop the queue first, then read read_count
 121          * (with a memory barrier to ensure the ordering), then
 122          * restart the queue if the fill level turns out to be low
 123          * enough.
 124          */
 125         netif_tx_stop_queue(txq1->core_txq);
 126         smp_mb();
 127         txq1->old_read_count = READ_ONCE(txq1->read_count);
 128         txq2->old_read_count = READ_ONCE(txq2->read_count);
 129
 130         fill_level = max(txq1->insert_count - txq1->old_read_count,
 131                          txq2->insert_count - txq2->old_read_count);
 132         EF4_BUG_ON_PARANOID(fill_level >= efx->txq_entries);
 133         if (likely(fill_level < efx->txq_stop_thresh)) {
 134                 smp_mb();
 135                 if (likely(!efx->loopback_selftest))
 136                         netif_tx_start_queue(txq1->core_txq);
 137         }
 138 }
 139
 140 static int ef4_enqueue_skb_copy(struct ef4_tx_queue *tx_queue,
 141                                 struct sk_buff *skb)
 142 {
 143         unsigned int min_len = tx_queue->tx_min_size;
 144         unsigned int copy_len = skb->len;
 145         struct ef4_tx_buffer *buffer;
 146         u8 *copy_buffer;
 147         int rc;
 148
 149         EF4_BUG_ON_PARANOID(copy_len > EF4_TX_CB_SIZE);
 150
 151         buffer = ef4_tx_queue_get_insert_buffer(tx_queue);
 152
 153         copy_buffer = ef4_tx_get_copy_buffer(tx_queue, buffer);
 154         if (unlikely(!copy_buffer))
 155                 return -ENOMEM;
 156
 157         rc = skb_copy_bits(skb, 0, copy_buffer, copy_len);
 158         EF4_WARN_ON_PARANOID(rc);
 159         if (unlikely(copy_len < min_len)) {
 160                 memset(copy_buffer + copy_len, 0, min_len - copy_len);
 161                 buffer->len = min_len;
 162         } else {
 163                 buffer->len = copy_len;
 164         }
 165
 166         buffer->skb = skb;
 167         buffer->flags = EF4_TX_BUF_SKB;
 168
 169         ++tx_queue->insert_count;
 170         return rc;
 171 }
 172
 173 static struct ef4_tx_buffer *ef4_tx_map_chunk(struct ef4_tx_queue *tx_queue,
 174                                               dma_addr_t dma_addr,
 175                                               size_t len)
 176 {
 177         const struct ef4_nic_type *nic_type = tx_queue->efx->type;
 178         struct ef4_tx_buffer *buffer;
 179         unsigned int dma_len;
 180
 181         /* Map the fragment taking account of NIC-dependent DMA limits. */
 182         do {
 183                 buffer = ef4_tx_queue_get_insert_buffer(tx_queue);
 184                 dma_len = nic_type->tx_limit_len(tx_queue, dma_addr, len);
 185
 186                 buffer->len = dma_len;
 187                 buffer->dma_addr = dma_addr;
 188                 buffer->flags = EF4_TX_BUF_CONT;
 189                 len -= dma_len;
 190                 dma_addr += dma_len;
 191                 ++tx_queue->insert_count;
 192         } while (len);
 193
 194         return buffer;
 195 }
 196
 197 /* Map all data from an SKB for DMA and create descriptors on the queue.
 198  */
 199 static int ef4_tx_map_data(struct ef4_tx_queue *tx_queue, struct sk_buff *skb)
 200 {
 201         struct ef4_nic *efx = tx_queue->efx;
 202         struct device *dma_dev = &efx->pci_dev->dev;
 203         unsigned int frag_index, nr_frags;
 204         dma_addr_t dma_addr, unmap_addr;
 205         unsigned short dma_flags;
 206         size_t len, unmap_len;
 207
 208         nr_frags = skb_shinfo(skb)->nr_frags;
 209         frag_index = 0;
 210
 211         /* Map header data. */
 212         len = skb_headlen(skb);
 213         dma_addr = dma_map_single(dma_dev, skb->data, len, DMA_TO_DEVICE);
 214         dma_flags = EF4_TX_BUF_MAP_SINGLE;
 215         unmap_len = len;
 216         unmap_addr = dma_addr;
 217
 218         if (unlikely(dma_mapping_error(dma_dev, dma_addr)))
 219                 return -EIO;
 220
 221         /* Add descriptors for each fragment. */
 222         do {
 223                 struct ef4_tx_buffer *buffer;
 224                 skb_frag_t *fragment;
 225
 226                 buffer = ef4_tx_map_chunk(tx_queue, dma_addr, len);
 227
 228                 /* The final descriptor for a fragment is responsible for
 229                  * unmapping the whole fragment.
 230                  */
 231                 buffer->flags = EF4_TX_BUF_CONT | dma_flags;
 232                 buffer->unmap_len = unmap_len;
 233                 buffer->dma_offset = buffer->dma_addr - unmap_addr;
 234
 235                 if (frag_index >= nr_frags) {
 236                         /* Store SKB details with the final buffer for
 237                          * the completion.
 238                          */
 239                         buffer->skb = skb;
 240                         buffer->flags = EF4_TX_BUF_SKB | dma_flags;
 241                         return 0;
 242                 }
 243
 244                 /* Move on to the next fragment. */
 245                 fragment = &skb_shinfo(skb)->frags[frag_index++];
 246                 len = skb_frag_size(fragment);
 247                 dma_addr = skb_frag_dma_map(dma_dev, fragment,
 248                                 0, len, DMA_TO_DEVICE);
 249                 dma_flags = 0;
 250                 unmap_len = len;
 251                 unmap_addr = dma_addr;
 252
 253                 if (unlikely(dma_mapping_error(dma_dev, dma_addr)))
 254                         return -EIO;
 255         } while (1);
 256 }
 257
 258 /* Remove buffers put into a tx_queue.  None of the buffers must have
 259  * an skb attached.
 260  */
 261 static void ef4_enqueue_unwind(struct ef4_tx_queue *tx_queue)
 262 {
 263         struct ef4_tx_buffer *buffer;
 264
 265         /* Work backwards until we hit the original insert pointer value */
 266         while (tx_queue->insert_count != tx_queue->write_count) {
 267                 --tx_queue->insert_count;
 268                 buffer = __ef4_tx_queue_get_insert_buffer(tx_queue);
 269                 ef4_dequeue_buffer(tx_queue, buffer, NULL, NULL);
 270         }
 271 }
 272
 273 /*
 274  * Add a socket buffer to a TX queue
 275  *
 276  * This maps all fragments of a socket buffer for DMA and adds them to
 277  * the TX queue.  The queue's insert pointer will be incremented by
 278  * the number of fragments in the socket buffer.
 279  *
 280  * If any DMA mapping fails, any mapped fragments will be unmapped,
 281  * the queue's insert pointer will be restored to its original value.
 282  *
 283  * This function is split out from ef4_hard_start_xmit to allow the
 284  * loopback test to direct packets via specific TX queues.
 285  *
 286  * Returns NETDEV_TX_OK.
 287  * You must hold netif_tx_lock() to call this function.
 288  */
 289 netdev_tx_t ef4_enqueue_skb(struct ef4_tx_queue *tx_queue, struct sk_buff *skb)
 290 {
 291         bool data_mapped = false;
 292         unsigned int skb_len;
 293
 294         skb_len = skb->len;
 295         EF4_WARN_ON_PARANOID(skb_is_gso(skb));
 296
 297         if (skb_len < tx_queue->tx_min_size ||
 298                         (skb->data_len && skb_len <= EF4_TX_CB_SIZE)) {
 299                 /* Pad short packets or coalesce short fragmented packets. */
 300                 if (ef4_enqueue_skb_copy(tx_queue, skb))
 301                         goto err;
 302                 tx_queue->cb_packets++;
 303                 data_mapped = true;
 304         }
 305
 306         /* Map for DMA and create descriptors if we haven't done so already. */
 307         if (!data_mapped && (ef4_tx_map_data(tx_queue, skb)))
 308                 goto err;
 309
 310         /* Update BQL */
 311         netdev_tx_sent_queue(tx_queue->core_txq, skb_len);
 312
 313         /* Pass off to hardware */
 314         if (!netdev_xmit_more() || netif_xmit_stopped(tx_queue->core_txq)) {
 315                 struct ef4_tx_queue *txq2 = ef4_tx_queue_partner(tx_queue);
 316
 317                 /* There could be packets left on the partner queue if those
 318                  * SKBs had skb->xmit_more set. If we do not push those they
 319                  * could be left for a long time and cause a netdev watchdog.
 320                  */
 321                 if (txq2->xmit_more_available)
 322                         ef4_nic_push_buffers(txq2);
 323
 324                 ef4_nic_push_buffers(tx_queue);
 325         } else {
 326                 tx_queue->xmit_more_available = netdev_xmit_more();
 327         }
 328
 329         tx_queue->tx_packets++;
 330
 331         ef4_tx_maybe_stop_queue(tx_queue);
 332
 333         return NETDEV_TX_OK;
 334
 335
 336 err:
 337         ef4_enqueue_unwind(tx_queue);
 338         dev_kfree_skb_any(skb);
 339         return NETDEV_TX_OK;
 340 }
 341
 342 /* Remove packets from the TX queue
 343  *
 344  * This removes packets from the TX queue, up to and including the
 345  * specified index.
 346  */
 347 static void ef4_dequeue_buffers(struct ef4_tx_queue *tx_queue,
 348                                 unsigned int index,
 349                                 unsigned int *pkts_compl,
 350                                 unsigned int *bytes_compl)
 351 {
 352         struct ef4_nic *efx = tx_queue->efx;
 353         unsigned int stop_index, read_ptr;
 354
 355         stop_index = (index + 1) & tx_queue->ptr_mask;
 356         read_ptr = tx_queue->read_count & tx_queue->ptr_mask;
 357
 358         while (read_ptr != stop_index) {
 359                 struct ef4_tx_buffer *buffer = &tx_queue->buffer[read_ptr];
 360
 361                 if (!(buffer->flags & EF4_TX_BUF_OPTION) &&
 362                     unlikely(buffer->len == 0)) {
 363                         netif_err(efx, tx_err, efx->net_dev,
 364                                   "TX queue %d spurious TX completion id %x\n",
 365                                   tx_queue->queue, read_ptr);
 366                         ef4_schedule_reset(efx, RESET_TYPE_TX_SKIP);
 367                         return;
 368                 }
 369
 370                 ef4_dequeue_buffer(tx_queue, buffer, pkts_compl, bytes_compl);
 371
 372                 ++tx_queue->read_count;
 373                 read_ptr = tx_queue->read_count & tx_queue->ptr_mask;
 374         }
 375 }
 376
 377 /* Initiate a packet transmission.  We use one channel per CPU
 378  * (sharing when we have more CPUs than channels).  On Falcon, the TX
 379  * completion events will be directed back to the CPU that transmitted
 380  * the packet, which should be cache-efficient.
 381  *
 382  * Context: non-blocking.
 383  * Note that returning anything other than NETDEV_TX_OK will cause the
 384  * OS to free the skb.
 385  */
 386 netdev_tx_t ef4_hard_start_xmit(struct sk_buff *skb,
 387                                 struct net_device *net_dev)
 388 {
 389         struct ef4_nic *efx = netdev_priv(net_dev);
 390         struct ef4_tx_queue *tx_queue;
 391         unsigned index, type;
 392
 393         EF4_WARN_ON_PARANOID(!netif_device_present(net_dev));
 394
 395         index = skb_get_queue_mapping(skb);
 396         type = skb->ip_summed == CHECKSUM_PARTIAL ? EF4_TXQ_TYPE_OFFLOAD : 0;
 397         if (index >= efx->n_tx_channels) {
 398                 index -= efx->n_tx_channels;
 399                 type |= EF4_TXQ_TYPE_HIGHPRI;
 400         }
 401         tx_queue = ef4_get_tx_queue(efx, index, type);
 402
 403         return ef4_enqueue_skb(tx_queue, skb);
 404 }
 405
 406 void ef4_init_tx_queue_core_txq(struct ef4_tx_queue *tx_queue)
 407 {
 408         struct ef4_nic *efx = tx_queue->efx;
 409
 410         /* Must be inverse of queue lookup in ef4_hard_start_xmit() */
 411         tx_queue->core_txq =
 412                 netdev_get_tx_queue(efx->net_dev,
 413                                     tx_queue->queue / EF4_TXQ_TYPES +
 414                                     ((tx_queue->queue & EF4_TXQ_TYPE_HIGHPRI) ?
 415                                      efx->n_tx_channels : 0));
 416 }
 417
 418 int ef4_setup_tc(struct net_device *net_dev, enum tc_setup_type type,
 419                  void *type_data)
 420 {
 421         struct ef4_nic *efx = netdev_priv(net_dev);
 422         struct tc_mqprio_qopt *mqprio = type_data;
 423         struct ef4_channel *channel;
 424         struct ef4_tx_queue *tx_queue;
 425         unsigned tc, num_tc;
 426         int rc;
 427
 428         if (type != TC_SETUP_QDISC_MQPRIO)
 429                 return -EOPNOTSUPP;
 430
 431         num_tc = mqprio->num_tc;
 432
 433         if (ef4_nic_rev(efx) < EF4_REV_FALCON_B0 || num_tc > EF4_MAX_TX_TC)
 434                 return -EINVAL;
 435
 436         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
 437
 438         if (num_tc == net_dev->num_tc)
 439                 return 0;
 440
 441         for (tc = 0; tc < num_tc; tc++) {
 442                 net_dev->tc_to_txq[tc].offset = tc * efx->n_tx_channels;
 443                 net_dev->tc_to_txq[tc].count = efx->n_tx_channels;
 444         }
 445
 446         if (num_tc > net_dev->num_tc) {
 447                 /* Initialise high-priority queues as necessary */
 448                 ef4_for_each_channel(channel, efx) {
 449                         ef4_for_each_possible_channel_tx_queue(tx_queue,
 450                                                                channel) {
 451                                 if (!(tx_queue->queue & EF4_TXQ_TYPE_HIGHPRI))
 452                                         continue;
 453                                 if (!tx_queue->buffer) {
 454                                         rc = ef4_probe_tx_queue(tx_queue);
 455                                         if (rc)
 456                                                 return rc;
 457                                 }
 458                                 if (!tx_queue->initialised)
 459                                         ef4_init_tx_queue(tx_queue);
 460                                 ef4_init_tx_queue_core_txq(tx_queue);
 461                         }
 462                 }
 463         } else {
 464                 /* Reduce number of classes before number of queues */
 465                 net_dev->num_tc = num_tc;
 466         }
 467
 468         rc = netif_set_real_num_tx_queues(net_dev,
 469                                           max_t(int, num_tc, 1) *
 470                                           efx->n_tx_channels);
 471         if (rc)
 472                 return rc;
 473
 474         /* Do not destroy high-priority queues when they become
 475          * unused.  We would have to flush them first, and it is
 476          * fairly difficult to flush a subset of TX queues.  Leave
 477          * it to ef4_fini_channels().
 478          */
 479
 480         net_dev->num_tc = num_tc;
 481         return 0;
 482 }
 483
 484 void ef4_xmit_done(struct ef4_tx_queue *tx_queue, unsigned int index)
 485 {
 486         unsigned fill_level;
 487         struct ef4_nic *efx = tx_queue->efx;
 488         struct ef4_tx_queue *txq2;
 489         unsigned int pkts_compl = 0, bytes_compl = 0;
 490
 491         EF4_BUG_ON_PARANOID(index > tx_queue->ptr_mask);
 492
 493         ef4_dequeue_buffers(tx_queue, index, &pkts_compl, &bytes_compl);
 494         tx_queue->pkts_compl += pkts_compl;
 495         tx_queue->bytes_compl += bytes_compl;
 496
 497         if (pkts_compl > 1)
 498                 ++tx_queue->merge_events;
 499
 500         /* See if we need to restart the netif queue.  This memory
 501          * barrier ensures that we write read_count (inside
 502          * ef4_dequeue_buffers()) before reading the queue status.
 503          */
 504         smp_mb();
 505         if (unlikely(netif_tx_queue_stopped(tx_queue->core_txq)) &&
 506             likely(efx->port_enabled) &&
 507             likely(netif_device_present(efx->net_dev))) {
 508                 txq2 = ef4_tx_queue_partner(tx_queue);
 509                 fill_level = max(tx_queue->insert_count - tx_queue->read_count,
 510                                  txq2->insert_count - txq2->read_count);
 511                 if (fill_level <= efx->txq_wake_thresh)
 512                         netif_tx_wake_queue(tx_queue->core_txq);
 513         }
 514
 515         /* Check whether the hardware queue is now empty */
 516         if ((int)(tx_queue->read_count - tx_queue->old_write_count) >= 0) {
 517                 tx_queue->old_write_count = READ_ONCE(tx_queue->write_count);
 518                 if (tx_queue->read_count == tx_queue->old_write_count) {
 519                         smp_mb();
 520                         tx_queue->empty_read_count =
 521                                 tx_queue->read_count | EF4_EMPTY_COUNT_VALID;
 522                 }
 523         }
 524 }
 525
 526 static unsigned int ef4_tx_cb_page_count(struct ef4_tx_queue *tx_queue)
 527 {
 528         return DIV_ROUND_UP(tx_queue->ptr_mask + 1, PAGE_SIZE >> EF4_TX_CB_ORDER);
 529 }
 530
 531 int ef4_probe_tx_queue(struct ef4_tx_queue *tx_queue)
 532 {
 533         struct ef4_nic *efx = tx_queue->efx;
 534         unsigned int entries;
 535         int rc;
 536
 537         /* Create the smallest power-of-two aligned ring */
 538         entries = max(roundup_pow_of_two(efx->txq_entries), EF4_MIN_DMAQ_SIZE);
 539         EF4_BUG_ON_PARANOID(entries > EF4_MAX_DMAQ_SIZE);
 540         tx_queue->ptr_mask = entries - 1;
 541
 542         netif_dbg(efx, probe, efx->net_dev,
 543                   "creating TX queue %d size %#x mask %#x\n",
 544                   tx_queue->queue, efx->txq_entries, tx_queue->ptr_mask);
 545
 546         /* Allocate software ring */
 547         tx_queue->buffer = kcalloc(entries, sizeof(*tx_queue->buffer),
 548                                    GFP_KERNEL);
 549         if (!tx_queue->buffer)
 550                 return -ENOMEM;
 551
 552         tx_queue->cb_page = kcalloc(ef4_tx_cb_page_count(tx_queue),
 553                                     sizeof(tx_queue->cb_page[0]), GFP_KERNEL);
 554         if (!tx_queue->cb_page) {
 555                 rc = -ENOMEM;
 556                 goto fail1;
 557         }
 558
 559         /* Allocate hardware ring */
 560         rc = ef4_nic_probe_tx(tx_queue);
 561         if (rc)
 562                 goto fail2;
 563
 564         return 0;
 565
 566 fail2:
 567         kfree(tx_queue->cb_page);
 568         tx_queue->cb_page = NULL;
 569 fail1:
 570         kfree(tx_queue->buffer);
 571         tx_queue->buffer = NULL;
 572         return rc;
 573 }
 574
 575 void ef4_init_tx_queue(struct ef4_tx_queue *tx_queue)
 576 {
 577         struct ef4_nic *efx = tx_queue->efx;
 578
 579         netif_dbg(efx, drv, efx->net_dev,
 580                   "initialising TX queue %d\n", tx_queue->queue);
 581
 582         tx_queue->insert_count = 0;
 583         tx_queue->write_count = 0;
 584         tx_queue->old_write_count = 0;
 585         tx_queue->read_count = 0;
 586         tx_queue->old_read_count = 0;
 587         tx_queue->empty_read_count = 0 | EF4_EMPTY_COUNT_VALID;
 588         tx_queue->xmit_more_available = false;
 589
 590         /* Some older hardware requires Tx writes larger than 32. */
 591         tx_queue->tx_min_size = EF4_WORKAROUND_15592(efx) ? 33 : 0;
 592
 593         /* Set up TX descriptor ring */
 594         ef4_nic_init_tx(tx_queue);
 595
 596         tx_queue->initialised = true;
 597 }
 598
 599 void ef4_fini_tx_queue(struct ef4_tx_queue *tx_queue)
 600 {
 601         struct ef4_tx_buffer *buffer;
 602
 603         netif_dbg(tx_queue->efx, drv, tx_queue->efx->net_dev,
 604                   "shutting down TX queue %d\n", tx_queue->queue);
 605
 606         if (!tx_queue->buffer)
 607                 return;
 608
 609         /* Free any buffers left in the ring */
 610         while (tx_queue->read_count != tx_queue->write_count) {
 611                 unsigned int pkts_compl = 0, bytes_compl = 0;
 612                 buffer = &tx_queue->buffer[tx_queue->read_count & tx_queue->ptr_mask];
 613                 ef4_dequeue_buffer(tx_queue, buffer, &pkts_compl, &bytes_compl);
 614
 615                 ++tx_queue->read_count;
 616         }
 617         tx_queue->xmit_more_available = false;
 618         netdev_tx_reset_queue(tx_queue->core_txq);
 619 }
 620
 621 void ef4_remove_tx_queue(struct ef4_tx_queue *tx_queue)
 622 {
 623         int i;
 624
 625         if (!tx_queue->buffer)
 626                 return;
 627
 628         netif_dbg(tx_queue->efx, drv, tx_queue->efx->net_dev,
 629                   "destroying TX queue %d\n", tx_queue->queue);
 630         ef4_nic_remove_tx(tx_queue);
 631
 632         if (tx_queue->cb_page) {
 633                 for (i = 0; i < ef4_tx_cb_page_count(tx_queue); i++)
 634                         ef4_nic_free_buffer(tx_queue->efx,
 635                                             &tx_queue->cb_page[i]);
 636                 kfree(tx_queue->cb_page);
 637                 tx_queue->cb_page = NULL;
 638         }
 639
 640         kfree(tx_queue->buffer);
 641         tx_queue->buffer = NULL;
 642 }