drivers/net/ipa/data/ipa_data-v3.5.1.c

   1 // SPDX-License-Identifier: GPL-2.0
   2
   3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
   4  * Copyright (C) 2019-2024 Linaro Ltd.
   5  */
   6
   7 #include <linux/array_size.h>
   8 #include <linux/log2.h>
   9
  10 #include "../ipa_data.h"
  11 #include "../ipa_endpoint.h"
  12 #include "../ipa_mem.h"
  13 #include "../ipa_version.h"
  14
  15 /** enum ipa_resource_type - IPA resource types for an SoC having IPA v3.5.1 */
  16 enum ipa_resource_type {
  17         /* Source resource types; first must have value 0 */
  18         IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS              = 0,
  19         IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
  20         IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
  21         IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
  22         IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
  23
  24         /* Destination resource types; first must have value 0 */
  25         IPA_RESOURCE_TYPE_DST_DATA_SECTORS              = 0,
  26         IPA_RESOURCE_TYPE_DST_DPS_DMARS,
  27 };
  28
  29 /* Resource groups used for an SoC having IPA v3.5.1 */
  30 enum ipa_rsrc_group_id {
  31         /* Source resource group identifiers */
  32         IPA_RSRC_GROUP_SRC_LWA_DL       = 0,
  33         IPA_RSRC_GROUP_SRC_UL_DL,
  34         IPA_RSRC_GROUP_SRC_MHI_DMA,
  35         IPA_RSRC_GROUP_SRC_UC_RX_Q,
  36         IPA_RSRC_GROUP_SRC_COUNT,       /* Last in set; not a source group */
  37
  38         /* Destination resource group identifiers */
  39         IPA_RSRC_GROUP_DST_LWA_DL       = 0,
  40         IPA_RSRC_GROUP_DST_UL_DL_DPL,
  41         IPA_RSRC_GROUP_DST_UNUSED_2,
  42         IPA_RSRC_GROUP_DST_COUNT,       /* Last; not a destination group */
  43 };
  44
  45 /* QSB configuration data for an SoC having IPA v3.5.1 */
  46 static const struct ipa_qsb_data ipa_qsb_data[] = {
  47         [IPA_QSB_MASTER_DDR] = {
  48                 .max_writes     = 8,
  49                 .max_reads      = 8,
  50         },
  51         [IPA_QSB_MASTER_PCIE] = {
  52                 .max_writes     = 4,
  53                 .max_reads      = 12,
  54         },
  55 };
  56
  57 /* Endpoint datdata for an SoC having IPA v3.5.1 */
  58 static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
  59         [IPA_ENDPOINT_AP_COMMAND_TX] = {
  60                 .ee_id          = GSI_EE_AP,
  61                 .channel_id     = 4,
  62                 .endpoint_id    = 5,
  63                 .toward_ipa     = true,
  64                 .channel = {
  65                         .tre_count      = 512,
  66                         .event_count    = 256,
  67                         .tlv_count      = 20,
  68                 },
  69                 .endpoint = {
  70                         .config = {
  71                                 .resource_group = IPA_RSRC_GROUP_SRC_UL_DL,
  72                                 .dma_mode       = true,
  73                                 .dma_endpoint   = IPA_ENDPOINT_AP_LAN_RX,
  74                                 .tx = {
  75                                         .seq_type = IPA_SEQ_DMA,
  76                                 },
  77                         },
  78                 },
  79         },
  80         [IPA_ENDPOINT_AP_LAN_RX] = {
  81                 .ee_id          = GSI_EE_AP,
  82                 .channel_id     = 5,
  83                 .endpoint_id    = 9,
  84                 .toward_ipa     = false,
  85                 .channel = {
  86                         .tre_count      = 256,
  87                         .event_count    = 256,
  88                         .tlv_count      = 8,
  89                 },
  90                 .endpoint = {
  91                         .config = {
  92                                 .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL,
  93                                 .aggregation    = true,
  94                                 .status_enable  = true,
  95                                 .rx = {
  96                                         .buffer_size    = 8192,
  97                                         .pad_align      = ilog2(sizeof(u32)),
  98                                         .aggr_time_limit = 500,
  99                                 },
 100                         },
 101                 },
 102         },
 103         [IPA_ENDPOINT_AP_MODEM_TX] = {
 104                 .ee_id          = GSI_EE_AP,
 105                 .channel_id     = 3,
 106                 .endpoint_id    = 2,
 107                 .toward_ipa     = true,
 108                 .channel = {
 109                         .tre_count      = 512,
 110                         .event_count    = 512,
 111                         .tlv_count      = 16,
 112                 },
 113                 .endpoint = {
 114                         .filter_support = true,
 115                         .config = {
 116                                 .resource_group = IPA_RSRC_GROUP_SRC_UL_DL,
 117                                 .checksum       = true,
 118                                 .qmap           = true,
 119                                 .status_enable  = true,
 120                                 .tx = {
 121                                         .seq_type = IPA_SEQ_2_PASS_SKIP_LAST_UC,
 122                                         .seq_rep_type = IPA_SEQ_REP_DMA_PARSER,
 123                                         .status_endpoint =
 124                                                 IPA_ENDPOINT_MODEM_AP_RX,
 125                                 },
 126                         },
 127                 },
 128         },
 129         [IPA_ENDPOINT_AP_MODEM_RX] = {
 130                 .ee_id          = GSI_EE_AP,
 131                 .channel_id     = 6,
 132                 .endpoint_id    = 10,
 133                 .toward_ipa     = false,
 134                 .channel = {
 135                         .tre_count      = 256,
 136                         .event_count    = 256,
 137                         .tlv_count      = 8,
 138                 },
 139                 .endpoint = {
 140                         .config = {
 141                                 .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL,
 142                                 .checksum       = true,
 143                                 .qmap           = true,
 144                                 .aggregation    = true,
 145                                 .rx = {
 146                                         .buffer_size    = 8192,
 147                                         .aggr_time_limit = 500,
 148                                         .aggr_close_eof = true,
 149                                 },
 150                         },
 151                 },
 152         },
 153         [IPA_ENDPOINT_MODEM_LAN_TX] = {
 154                 .ee_id          = GSI_EE_MODEM,
 155                 .channel_id     = 0,
 156                 .endpoint_id    = 3,
 157                 .toward_ipa     = true,
 158                 .endpoint = {
 159                         .filter_support = true,
 160                 },
 161         },
 162         [IPA_ENDPOINT_MODEM_AP_TX] = {
 163                 .ee_id          = GSI_EE_MODEM,
 164                 .channel_id     = 4,
 165                 .endpoint_id    = 6,
 166                 .toward_ipa     = true,
 167                 .endpoint = {
 168                         .filter_support = true,
 169                 },
 170         },
 171         [IPA_ENDPOINT_MODEM_AP_RX] = {
 172                 .ee_id          = GSI_EE_MODEM,
 173                 .channel_id     = 2,
 174                 .endpoint_id    = 12,
 175                 .toward_ipa     = false,
 176         },
 177 };
 178
 179 /* Source resource configuration data for an SoC having IPA v3.5.1 */
 180 static const struct ipa_resource ipa_resource_src[] = {
 181         [IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS] = {
 182                 .limits[IPA_RSRC_GROUP_SRC_LWA_DL] = {
 183                         .min = 1,       .max = 63,
 184                 },
 185                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
 186                         .min = 1,       .max = 63,
 187                 },
 188                 .limits[IPA_RSRC_GROUP_SRC_UC_RX_Q] = {
 189                         .min = 1,       .max = 63,
 190                 },
 191         },
 192         [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS] = {
 193                 .limits[IPA_RSRC_GROUP_SRC_LWA_DL] = {
 194                         .min = 10,      .max = 10,
 195                 },
 196                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
 197                         .min = 10,      .max = 10,
 198                 },
 199                 .limits[IPA_RSRC_GROUP_SRC_UC_RX_Q] = {
 200                         .min = 8,       .max = 8,
 201                 },
 202         },
 203         [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF] = {
 204                 .limits[IPA_RSRC_GROUP_SRC_LWA_DL] = {
 205                         .min = 12,      .max = 12,
 206                 },
 207                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
 208                         .min = 14,      .max = 14,
 209                 },
 210                 .limits[IPA_RSRC_GROUP_SRC_UC_RX_Q] = {
 211                         .min = 8,       .max = 8,
 212                 },
 213         },
 214         [IPA_RESOURCE_TYPE_SRC_HPS_DMARS] = {
 215                 .limits[IPA_RSRC_GROUP_SRC_LWA_DL] = {
 216                         .min = 0,       .max = 63,
 217                 },
 218                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
 219                         .min = 0,       .max = 63,
 220                 },
 221                 .limits[IPA_RSRC_GROUP_SRC_MHI_DMA] = {
 222                         .min = 0,       .max = 63,
 223                 },
 224                 .limits[IPA_RSRC_GROUP_SRC_UC_RX_Q] = {
 225                         .min = 0,       .max = 63,
 226                 },
 227         },
 228         [IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES] = {
 229                 .limits[IPA_RSRC_GROUP_SRC_LWA_DL] = {
 230                         .min = 14,      .max = 14,
 231                 },
 232                 .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
 233                         .min = 20,      .max = 20,
 234                 },
 235                 .limits[IPA_RSRC_GROUP_SRC_UC_RX_Q] = {
 236                         .min = 14,      .max = 14,
 237                 },
 238         },
 239 };
 240
 241 /* Destination resource configuration data for an SoC having IPA v3.5.1 */
 242 static const struct ipa_resource ipa_resource_dst[] = {
 243         [IPA_RESOURCE_TYPE_DST_DATA_SECTORS] = {
 244                 .limits[IPA_RSRC_GROUP_DST_LWA_DL] = {
 245                         .min = 4,       .max = 4,
 246                 },
 247                 .limits[1] = {
 248                         .min = 4,       .max = 4,
 249                 },
 250                 .limits[IPA_RSRC_GROUP_DST_UNUSED_2] = {
 251                         .min = 3,       .max = 3,
 252                 }
 253         },
 254         [IPA_RESOURCE_TYPE_DST_DPS_DMARS] = {
 255                 .limits[IPA_RSRC_GROUP_DST_LWA_DL] = {
 256                         .min = 2,       .max = 63,
 257                 },
 258                 .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = {
 259                         .min = 1,       .max = 63,
 260                 },
 261                 .limits[IPA_RSRC_GROUP_DST_UNUSED_2] = {
 262                         .min = 1,       .max = 2,
 263                 }
 264         },
 265 };
 266
 267 /* Resource configuration data for an SoC having IPA v3.5.1 */
 268 static const struct ipa_resource_data ipa_resource_data = {
 269         .rsrc_group_src_count   = IPA_RSRC_GROUP_SRC_COUNT,
 270         .rsrc_group_dst_count   = IPA_RSRC_GROUP_DST_COUNT,
 271         .resource_src_count     = ARRAY_SIZE(ipa_resource_src),
 272         .resource_src           = ipa_resource_src,
 273         .resource_dst_count     = ARRAY_SIZE(ipa_resource_dst),
 274         .resource_dst           = ipa_resource_dst,
 275 };
 276
 277 /* IPA-resident memory region data for an SoC having IPA v3.5.1 */
 278 static const struct ipa_mem ipa_mem_local_data[] = {
 279         {
 280                 .id             = IPA_MEM_UC_SHARED,
 281                 .offset         = 0x0000,
 282                 .size           = 0x0080,
 283                 .canary_count   = 0,
 284         },
 285         {
 286                 .id             = IPA_MEM_UC_INFO,
 287                 .offset         = 0x0080,
 288                 .size           = 0x0200,
 289                 .canary_count   = 0,
 290         },
 291         {
 292                 .id             = IPA_MEM_V4_FILTER_HASHED,
 293                 .offset         = 0x0288,
 294                 .size           = 0x0078,
 295                 .canary_count   = 2,
 296         },
 297         {
 298                 .id             = IPA_MEM_V4_FILTER,
 299                 .offset         = 0x0308,
 300                 .size           = 0x0078,
 301                 .canary_count   = 2,
 302         },
 303         {
 304                 .id             = IPA_MEM_V6_FILTER_HASHED,
 305                 .offset         = 0x0388,
 306                 .size           = 0x0078,
 307                 .canary_count   = 2,
 308         },
 309         {
 310                 .id             = IPA_MEM_V6_FILTER,
 311                 .offset         = 0x0408,
 312                 .size           = 0x0078,
 313                 .canary_count   = 2,
 314         },
 315         {
 316                 .id             = IPA_MEM_V4_ROUTE_HASHED,
 317                 .offset         = 0x0488,
 318                 .size           = 0x0078,
 319                 .canary_count   = 2,
 320         },
 321         {
 322                 .id             = IPA_MEM_V4_ROUTE,
 323                 .offset         = 0x0508,
 324                 .size           = 0x0078,
 325                 .canary_count   = 2,
 326         },
 327         {
 328                 .id             = IPA_MEM_V6_ROUTE_HASHED,
 329                 .offset         = 0x0588,
 330                 .size           = 0x0078,
 331                 .canary_count   = 2,
 332         },
 333         {
 334                 .id             = IPA_MEM_V6_ROUTE,
 335                 .offset         = 0x0608,
 336                 .size           = 0x0078,
 337                 .canary_count   = 2,
 338         },
 339         {
 340                 .id             = IPA_MEM_MODEM_HEADER,
 341                 .offset         = 0x0688,
 342                 .size           = 0x0140,
 343                 .canary_count   = 2,
 344         },
 345         {
 346                 .id             = IPA_MEM_MODEM_PROC_CTX,
 347                 .offset         = 0x07d0,
 348                 .size           = 0x0200,
 349                 .canary_count   = 2,
 350         },
 351         {
 352                 .id             = IPA_MEM_AP_PROC_CTX,
 353                 .offset         = 0x09d0,
 354                 .size           = 0x0200,
 355                 .canary_count   = 0,
 356         },
 357         {
 358                 .id             = IPA_MEM_MODEM,
 359                 .offset         = 0x0bd8,
 360                 .size           = 0x1024,
 361                 .canary_count   = 0,
 362         },
 363         {
 364                 .id             = IPA_MEM_UC_EVENT_RING,
 365                 .offset         = 0x1c00,
 366                 .size           = 0x0400,
 367                 .canary_count   = 1,
 368         },
 369 };
 370
 371 /* Memory configuration data for an SoC having IPA v3.5.1 */
 372 static const struct ipa_mem_data ipa_mem_data = {
 373         .local_count    = ARRAY_SIZE(ipa_mem_local_data),
 374         .local          = ipa_mem_local_data,
 375         .imem_addr      = 0x146bd000,
 376         .imem_size      = 0x00002000,
 377         .smem_id        = 497,
 378         .smem_size      = 0x00002000,
 379 };
 380
 381 /* Interconnect bandwidths are in 1000 byte/second units */
 382 static const struct ipa_interconnect_data ipa_interconnect_data[] = {
 383         {
 384                 .name                   = "memory",
 385                 .peak_bandwidth         = 600000,       /* 600 MBps */
 386                 .average_bandwidth      = 80000,        /* 80 MBps */
 387         },
 388         /* Average bandwidth is unused for the next two interconnects */
 389         {
 390                 .name                   = "imem",
 391                 .peak_bandwidth         = 350000,       /* 350 MBps */
 392                 .average_bandwidth      = 0,            /* unused */
 393         },
 394         {
 395                 .name                   = "config",
 396                 .peak_bandwidth         = 40000,        /* 40 MBps */
 397                 .average_bandwidth      = 0,            /* unused */
 398         },
 399 };
 400
 401 /* Clock and interconnect configuration data for an SoC having IPA v3.5.1 */
 402 static const struct ipa_power_data ipa_power_data = {
 403         .core_clock_rate        = 75 * 1000 * 1000,     /* Hz */
 404         .interconnect_count     = ARRAY_SIZE(ipa_interconnect_data),
 405         .interconnect_data      = ipa_interconnect_data,
 406 };
 407
 408 /* Configuration data for an SoC having IPA v3.5.1 */
 409 const struct ipa_data ipa_data_v3_5_1 = {
 410         .version                = IPA_VERSION_3_5_1,
 411         .backward_compat        = BIT(BCR_CMDQ_L_LACK_ONE_ENTRY) |
 412                                   BIT(BCR_TX_NOT_USING_BRESP) |
 413                                   BIT(BCR_SUSPEND_L2_IRQ) |
 414                                   BIT(BCR_HOLB_DROP_L2_IRQ) |
 415                                   BIT(BCR_DUAL_TX),
 416         .qsb_count              = ARRAY_SIZE(ipa_qsb_data),
 417         .qsb_data               = ipa_qsb_data,
 418         .modem_route_count      = 8,
 419         .endpoint_count         = ARRAY_SIZE(ipa_gsi_endpoint_data),
 420         .endpoint_data          = ipa_gsi_endpoint_data,
 421         .resource_data          = &ipa_resource_data,
 422         .mem_data               = &ipa_mem_data,
 423         .power_data             = &ipa_power_data,
 424 };