1 /* SPDX-License-Identifier: GPL-2.0
3 * Common definition for Mediatek Ethernet PHYs
4 * Author: SkyLake Huang <SkyLake.Huang@mediatek.com>
5 * Copyright (c) 2024 MediaTek Inc.
11 #define MTK_EXT_PAGE_ACCESS 0x1f
13 /* Registers on MDIO_MMD_VEND2 */
14 #define MTK_PHY_LED0_ON_CTRL 0x24
15 #define MTK_PHY_LED1_ON_CTRL 0x26
16 #define MTK_GPHY_LED_ON_MASK GENMASK(6, 0)
17 #define MTK_2P5GPHY_LED_ON_MASK GENMASK(7, 0)
18 #define MTK_PHY_LED_ON_LINK1000 BIT(0)
19 #define MTK_PHY_LED_ON_LINK100 BIT(1)
20 #define MTK_PHY_LED_ON_LINK10 BIT(2)
21 #define MTK_PHY_LED_ON_LINKDOWN BIT(3)
22 #define MTK_PHY_LED_ON_FDX BIT(4) /* Full duplex */
23 #define MTK_PHY_LED_ON_HDX BIT(5) /* Half duplex */
24 #define MTK_PHY_LED_ON_FORCE_ON BIT(6)
25 #define MTK_PHY_LED_ON_LINK2500 BIT(7)
26 #define MTK_PHY_LED_ON_POLARITY BIT(14)
27 #define MTK_PHY_LED_ON_ENABLE BIT(15)
29 #define MTK_PHY_LED0_BLINK_CTRL 0x25
30 #define MTK_PHY_LED1_BLINK_CTRL 0x27
31 #define MTK_PHY_LED_BLINK_1000TX BIT(0)
32 #define MTK_PHY_LED_BLINK_1000RX BIT(1)
33 #define MTK_PHY_LED_BLINK_100TX BIT(2)
34 #define MTK_PHY_LED_BLINK_100RX BIT(3)
35 #define MTK_PHY_LED_BLINK_10TX BIT(4)
36 #define MTK_PHY_LED_BLINK_10RX BIT(5)
37 #define MTK_PHY_LED_BLINK_COLLISION BIT(6)
38 #define MTK_PHY_LED_BLINK_RX_CRC_ERR BIT(7)
39 #define MTK_PHY_LED_BLINK_RX_IDLE_ERR BIT(8)
40 #define MTK_PHY_LED_BLINK_FORCE_BLINK BIT(9)
41 #define MTK_PHY_LED_BLINK_2500TX BIT(10)
42 #define MTK_PHY_LED_BLINK_2500RX BIT(11)
44 #define MTK_GPHY_LED_ON_SET (MTK_PHY_LED_ON_LINK1000 | \
45 MTK_PHY_LED_ON_LINK100 | \
46 MTK_PHY_LED_ON_LINK10)
47 #define MTK_GPHY_LED_RX_BLINK_SET (MTK_PHY_LED_BLINK_1000RX | \
48 MTK_PHY_LED_BLINK_100RX | \
49 MTK_PHY_LED_BLINK_10RX)
50 #define MTK_GPHY_LED_TX_BLINK_SET (MTK_PHY_LED_BLINK_1000RX | \
51 MTK_PHY_LED_BLINK_100RX | \
52 MTK_PHY_LED_BLINK_10RX)
54 #define MTK_2P5GPHY_LED_ON_SET (MTK_PHY_LED_ON_LINK2500 | \
56 #define MTK_2P5GPHY_LED_RX_BLINK_SET (MTK_PHY_LED_BLINK_2500RX | \
57 MTK_GPHY_LED_RX_BLINK_SET)
58 #define MTK_2P5GPHY_LED_TX_BLINK_SET (MTK_PHY_LED_BLINK_2500RX | \
59 MTK_GPHY_LED_TX_BLINK_SET)
61 #define MTK_PHY_LED_STATE_FORCE_ON 0
62 #define MTK_PHY_LED_STATE_FORCE_BLINK 1
63 #define MTK_PHY_LED_STATE_NETDEV 2
65 struct mtk_socphy_priv
{
66 unsigned long led_state
;
69 int mtk_phy_read_page(struct phy_device
*phydev
);
70 int mtk_phy_write_page(struct phy_device
*phydev
, int page
);
72 int mtk_phy_led_hw_is_supported(struct phy_device
*phydev
, u8 index
,
74 unsigned long supported_triggers
);
75 int mtk_phy_led_hw_ctrl_set(struct phy_device
*phydev
, u8 index
,
76 unsigned long rules
, u16 on_set
,
77 u16 rx_blink_set
, u16 tx_blink_set
);
78 int mtk_phy_led_hw_ctrl_get(struct phy_device
*phydev
, u8 index
,
79 unsigned long *rules
, u16 on_set
,
80 u16 rx_blink_set
, u16 tx_blink_set
);
81 int mtk_phy_led_num_dly_cfg(u8 index
, unsigned long *delay_on
,
82 unsigned long *delay_off
, bool *blinking
);
83 int mtk_phy_hw_led_on_set(struct phy_device
*phydev
, u8 index
,
84 u16 led_on_mask
, bool on
);
85 int mtk_phy_hw_led_blink_set(struct phy_device
*phydev
, u8 index
,
87 void mtk_phy_leds_state_init(struct phy_device
*phydev
);
89 #endif /* _MTK_EPHY_H_ */