1 // SPDX-License-Identifier: GPL-2.0-only
3 // Framework for Ethernet Power Sourcing Equipment
5 // Copyright (c) 2022 Pengutronix, Oleksij Rempel <kernel@pengutronix.de>
8 #include <linux/device.h>
10 #include <linux/pse-pd/pse.h>
11 #include <linux/regulator/driver.h>
12 #include <linux/regulator/machine.h>
14 static DEFINE_MUTEX(pse_list_mutex
);
15 static LIST_HEAD(pse_controller_list
);
18 * struct pse_control - a PSE control
19 * @pcdev: a pointer to the PSE controller device
20 * this PSE control belongs to
21 * @ps: PSE PI supply of the PSE control
22 * @list: list entry for the pcdev's PSE controller list
23 * @id: ID of the PSE line in the PSE controller device
24 * @refcnt: Number of gets of this pse_control
27 struct pse_controller_dev
*pcdev
;
29 struct list_head list
;
34 static int of_load_single_pse_pi_pairset(struct device_node
*node
,
38 struct device_node
*pairset_np
;
42 ret
= of_property_read_string_index(node
, "pairset-names",
47 if (!strcmp(name
, "alternative-a")) {
48 pi
->pairset
[pairset_num
].pinout
= ALTERNATIVE_A
;
49 } else if (!strcmp(name
, "alternative-b")) {
50 pi
->pairset
[pairset_num
].pinout
= ALTERNATIVE_B
;
52 pr_err("pse: wrong pairset-names value %s (%pOF)\n",
57 pairset_np
= of_parse_phandle(node
, "pairsets", pairset_num
);
61 pi
->pairset
[pairset_num
].np
= pairset_np
;
67 * of_load_pse_pi_pairsets - load PSE PI pairsets pinout and polarity
68 * @node: a pointer of the device node
69 * @pi: a pointer of the PSE PI to fill
70 * @npairsets: the number of pairsets (1 or 2) used by the PI
72 * Return: 0 on success and failure value on error
74 static int of_load_pse_pi_pairsets(struct device_node
*node
,
80 ret
= of_property_count_strings(node
, "pairset-names");
81 if (ret
!= npairsets
) {
82 pr_err("pse: amount of pairsets and pairset-names is not equal %d != %d (%pOF)\n",
83 npairsets
, ret
, node
);
87 for (i
= 0; i
< npairsets
; i
++) {
88 ret
= of_load_single_pse_pi_pairset(node
, pi
, i
);
94 pi
->pairset
[0].pinout
== pi
->pairset
[1].pinout
) {
95 pr_err("pse: two PI pairsets can not have identical pinout (%pOF)",
101 /* If an error appears, release all the pairset device node kref */
103 of_node_put(pi
->pairset
[0].np
);
104 pi
->pairset
[0].np
= NULL
;
105 of_node_put(pi
->pairset
[1].np
);
106 pi
->pairset
[1].np
= NULL
;
112 static void pse_release_pis(struct pse_controller_dev
*pcdev
)
116 for (i
= 0; i
< pcdev
->nr_lines
; i
++) {
117 of_node_put(pcdev
->pi
[i
].pairset
[0].np
);
118 of_node_put(pcdev
->pi
[i
].pairset
[1].np
);
119 of_node_put(pcdev
->pi
[i
].np
);
125 * of_load_pse_pis - load all the PSE PIs
126 * @pcdev: a pointer to the PSE controller device
128 * Return: 0 on success and failure value on error
130 static int of_load_pse_pis(struct pse_controller_dev
*pcdev
)
132 struct device_node
*np
= pcdev
->dev
->of_node
;
133 struct device_node
*node
, *pis
;
139 pcdev
->pi
= kcalloc(pcdev
->nr_lines
, sizeof(*pcdev
->pi
), GFP_KERNEL
);
143 pis
= of_get_child_by_name(np
, "pse-pis");
145 /* no description of PSE PIs */
146 pcdev
->no_of_pse_pi
= true;
150 for_each_child_of_node(pis
, node
) {
151 struct pse_pi pi
= {0};
154 if (!of_node_name_eq(node
, "pse-pi"))
157 ret
= of_property_read_u32(node
, "reg", &id
);
160 "can't get reg property for node '%pOF'",
165 if (id
>= pcdev
->nr_lines
) {
167 "reg value (%u) is out of range (%u) (%pOF)\n",
168 id
, pcdev
->nr_lines
, node
);
173 if (pcdev
->pi
[id
].np
) {
175 "other node with same reg value was already registered. %pOF : %pOF\n",
176 pcdev
->pi
[id
].np
, node
);
181 ret
= of_count_phandle_with_args(node
, "pairsets", NULL
);
182 /* npairsets is limited to value one or two */
183 if (ret
== 1 || ret
== 2) {
184 ret
= of_load_pse_pi_pairsets(node
, &pi
, ret
);
187 } else if (ret
!= ENOENT
) {
189 "error: wrong number of pairsets. Should be 1 or 2, got %d (%pOF)\n",
197 memcpy(&pcdev
->pi
[id
], &pi
, sizeof(pi
));
204 pse_release_pis(pcdev
);
210 static int pse_pi_is_enabled(struct regulator_dev
*rdev
)
212 struct pse_controller_dev
*pcdev
= rdev_get_drvdata(rdev
);
213 const struct pse_controller_ops
*ops
;
217 if (!ops
->pi_is_enabled
)
220 id
= rdev_get_id(rdev
);
221 mutex_lock(&pcdev
->lock
);
222 ret
= ops
->pi_is_enabled(pcdev
, id
);
223 mutex_unlock(&pcdev
->lock
);
228 static int pse_pi_enable(struct regulator_dev
*rdev
)
230 struct pse_controller_dev
*pcdev
= rdev_get_drvdata(rdev
);
231 const struct pse_controller_ops
*ops
;
238 id
= rdev_get_id(rdev
);
239 mutex_lock(&pcdev
->lock
);
240 ret
= ops
->pi_enable(pcdev
, id
);
242 pcdev
->pi
[id
].admin_state_enabled
= 1;
243 mutex_unlock(&pcdev
->lock
);
248 static int pse_pi_disable(struct regulator_dev
*rdev
)
250 struct pse_controller_dev
*pcdev
= rdev_get_drvdata(rdev
);
251 const struct pse_controller_ops
*ops
;
255 if (!ops
->pi_disable
)
258 id
= rdev_get_id(rdev
);
259 mutex_lock(&pcdev
->lock
);
260 ret
= ops
->pi_disable(pcdev
, id
);
262 pcdev
->pi
[id
].admin_state_enabled
= 0;
263 mutex_unlock(&pcdev
->lock
);
268 static int _pse_pi_get_voltage(struct regulator_dev
*rdev
)
270 struct pse_controller_dev
*pcdev
= rdev_get_drvdata(rdev
);
271 const struct pse_controller_ops
*ops
;
275 if (!ops
->pi_get_voltage
)
278 id
= rdev_get_id(rdev
);
279 return ops
->pi_get_voltage(pcdev
, id
);
282 static int pse_pi_get_voltage(struct regulator_dev
*rdev
)
284 struct pse_controller_dev
*pcdev
= rdev_get_drvdata(rdev
);
287 mutex_lock(&pcdev
->lock
);
288 ret
= _pse_pi_get_voltage(rdev
);
289 mutex_unlock(&pcdev
->lock
);
294 static int _pse_ethtool_get_status(struct pse_controller_dev
*pcdev
,
296 struct netlink_ext_ack
*extack
,
297 struct pse_control_status
*status
);
299 static int pse_pi_get_current_limit(struct regulator_dev
*rdev
)
301 struct pse_controller_dev
*pcdev
= rdev_get_drvdata(rdev
);
302 const struct pse_controller_ops
*ops
;
303 struct netlink_ext_ack extack
= {};
304 struct pse_control_status st
= {};
309 id
= rdev_get_id(rdev
);
310 mutex_lock(&pcdev
->lock
);
311 if (ops
->pi_get_current_limit
) {
312 ret
= ops
->pi_get_current_limit(pcdev
, id
);
316 /* If pi_get_current_limit() callback not populated get voltage
317 * from pi_get_voltage() and power limit from ethtool_get_status()
318 * to calculate current limit.
320 ret
= _pse_pi_get_voltage(rdev
);
322 dev_err(pcdev
->dev
, "Voltage null\n");
330 ret
= _pse_ethtool_get_status(pcdev
, id
, &extack
, &st
);
334 if (!st
.c33_avail_pw_limit
) {
339 tmp_64
= st
.c33_avail_pw_limit
;
340 tmp_64
*= 1000000000ull;
341 /* uA = mW * 1000000000 / uV */
342 ret
= DIV_ROUND_CLOSEST_ULL(tmp_64
, uV
);
345 mutex_unlock(&pcdev
->lock
);
349 static int pse_pi_set_current_limit(struct regulator_dev
*rdev
, int min_uA
,
352 struct pse_controller_dev
*pcdev
= rdev_get_drvdata(rdev
);
353 const struct pse_controller_ops
*ops
;
357 if (!ops
->pi_set_current_limit
)
360 id
= rdev_get_id(rdev
);
361 mutex_lock(&pcdev
->lock
);
362 ret
= ops
->pi_set_current_limit(pcdev
, id
, max_uA
);
363 mutex_unlock(&pcdev
->lock
);
368 static const struct regulator_ops pse_pi_ops
= {
369 .is_enabled
= pse_pi_is_enabled
,
370 .enable
= pse_pi_enable
,
371 .disable
= pse_pi_disable
,
372 .get_voltage
= pse_pi_get_voltage
,
373 .get_current_limit
= pse_pi_get_current_limit
,
374 .set_current_limit
= pse_pi_set_current_limit
,
378 devm_pse_pi_regulator_register(struct pse_controller_dev
*pcdev
,
381 struct regulator_init_data
*rinit_data
;
382 struct regulator_config rconfig
= {0};
383 struct regulator_desc
*rdesc
;
384 struct regulator_dev
*rdev
;
386 rinit_data
= devm_kzalloc(pcdev
->dev
, sizeof(*rinit_data
),
391 rdesc
= devm_kzalloc(pcdev
->dev
, sizeof(*rdesc
), GFP_KERNEL
);
395 /* Regulator descriptor id have to be the same as its associated
396 * PSE PI id for the well functioning of the PSE controls.
400 rdesc
->type
= REGULATOR_VOLTAGE
;
401 rdesc
->ops
= &pse_pi_ops
;
402 rdesc
->owner
= pcdev
->owner
;
404 rinit_data
->constraints
.valid_ops_mask
= REGULATOR_CHANGE_STATUS
;
406 if (pcdev
->ops
->pi_set_current_limit
) {
407 rinit_data
->constraints
.valid_ops_mask
|=
408 REGULATOR_CHANGE_CURRENT
;
409 rinit_data
->constraints
.max_uA
= MAX_PI_CURRENT
;
412 rinit_data
->supply_regulator
= "vpwr";
414 rconfig
.dev
= pcdev
->dev
;
415 rconfig
.driver_data
= pcdev
;
416 rconfig
.init_data
= rinit_data
;
418 rdev
= devm_regulator_register(pcdev
->dev
, rdesc
, &rconfig
);
420 dev_err_probe(pcdev
->dev
, PTR_ERR(rdev
),
421 "Failed to register regulator\n");
422 return PTR_ERR(rdev
);
425 pcdev
->pi
[id
].rdev
= rdev
;
431 * pse_controller_register - register a PSE controller device
432 * @pcdev: a pointer to the initialized PSE controller device
434 * Return: 0 on success and failure value on error
436 int pse_controller_register(struct pse_controller_dev
*pcdev
)
441 mutex_init(&pcdev
->lock
);
442 INIT_LIST_HEAD(&pcdev
->pse_control_head
);
444 if (!pcdev
->nr_lines
)
447 ret
= of_load_pse_pis(pcdev
);
451 if (pcdev
->ops
->setup_pi_matrix
) {
452 ret
= pcdev
->ops
->setup_pi_matrix(pcdev
);
457 /* Each regulator name len is pcdev dev name + 7 char +
458 * int max digit number (10) + 1
460 reg_name_len
= strlen(dev_name(pcdev
->dev
)) + 18;
462 /* Register PI regulators */
463 for (i
= 0; i
< pcdev
->nr_lines
; i
++) {
466 /* Do not register regulator for PIs not described */
467 if (!pcdev
->no_of_pse_pi
&& !pcdev
->pi
[i
].np
)
470 reg_name
= devm_kzalloc(pcdev
->dev
, reg_name_len
, GFP_KERNEL
);
474 snprintf(reg_name
, reg_name_len
, "pse-%s_pi%d",
475 dev_name(pcdev
->dev
), i
);
477 ret
= devm_pse_pi_regulator_register(pcdev
, reg_name
, i
);
482 mutex_lock(&pse_list_mutex
);
483 list_add(&pcdev
->list
, &pse_controller_list
);
484 mutex_unlock(&pse_list_mutex
);
488 EXPORT_SYMBOL_GPL(pse_controller_register
);
491 * pse_controller_unregister - unregister a PSE controller device
492 * @pcdev: a pointer to the PSE controller device
494 void pse_controller_unregister(struct pse_controller_dev
*pcdev
)
496 pse_release_pis(pcdev
);
497 mutex_lock(&pse_list_mutex
);
498 list_del(&pcdev
->list
);
499 mutex_unlock(&pse_list_mutex
);
501 EXPORT_SYMBOL_GPL(pse_controller_unregister
);
503 static void devm_pse_controller_release(struct device
*dev
, void *res
)
505 pse_controller_unregister(*(struct pse_controller_dev
**)res
);
509 * devm_pse_controller_register - resource managed pse_controller_register()
510 * @dev: device that is registering this PSE controller
511 * @pcdev: a pointer to the initialized PSE controller device
513 * Managed pse_controller_register(). For PSE controllers registered by
514 * this function, pse_controller_unregister() is automatically called on
515 * driver detach. See pse_controller_register() for more information.
517 * Return: 0 on success and failure value on error
519 int devm_pse_controller_register(struct device
*dev
,
520 struct pse_controller_dev
*pcdev
)
522 struct pse_controller_dev
**pcdevp
;
525 pcdevp
= devres_alloc(devm_pse_controller_release
, sizeof(*pcdevp
),
530 ret
= pse_controller_register(pcdev
);
537 devres_add(dev
, pcdevp
);
541 EXPORT_SYMBOL_GPL(devm_pse_controller_register
);
543 /* PSE control section */
545 static void __pse_control_release(struct kref
*kref
)
547 struct pse_control
*psec
= container_of(kref
, struct pse_control
,
550 lockdep_assert_held(&pse_list_mutex
);
552 if (psec
->pcdev
->pi
[psec
->id
].admin_state_enabled
)
553 regulator_disable(psec
->ps
);
554 devm_regulator_put(psec
->ps
);
556 module_put(psec
->pcdev
->owner
);
558 list_del(&psec
->list
);
562 static void __pse_control_put_internal(struct pse_control
*psec
)
564 lockdep_assert_held(&pse_list_mutex
);
566 kref_put(&psec
->refcnt
, __pse_control_release
);
570 * pse_control_put - free the PSE control
571 * @psec: PSE control pointer
573 void pse_control_put(struct pse_control
*psec
)
575 if (IS_ERR_OR_NULL(psec
))
578 mutex_lock(&pse_list_mutex
);
579 __pse_control_put_internal(psec
);
580 mutex_unlock(&pse_list_mutex
);
582 EXPORT_SYMBOL_GPL(pse_control_put
);
584 static struct pse_control
*
585 pse_control_get_internal(struct pse_controller_dev
*pcdev
, unsigned int index
)
587 struct pse_control
*psec
;
590 lockdep_assert_held(&pse_list_mutex
);
592 list_for_each_entry(psec
, &pcdev
->pse_control_head
, list
) {
593 if (psec
->id
== index
) {
594 kref_get(&psec
->refcnt
);
599 psec
= kzalloc(sizeof(*psec
), GFP_KERNEL
);
601 return ERR_PTR(-ENOMEM
);
603 if (!try_module_get(pcdev
->owner
)) {
608 psec
->ps
= devm_regulator_get_exclusive(pcdev
->dev
,
609 rdev_get_name(pcdev
->pi
[index
].rdev
));
610 if (IS_ERR(psec
->ps
)) {
611 ret
= PTR_ERR(psec
->ps
);
615 ret
= regulator_is_enabled(psec
->ps
);
619 pcdev
->pi
[index
].admin_state_enabled
= ret
;
622 list_add(&psec
->list
, &pcdev
->pse_control_head
);
624 kref_init(&psec
->refcnt
);
629 devm_regulator_put(psec
->ps
);
631 module_put(pcdev
->owner
);
639 * of_pse_match_pi - Find the PSE PI id matching the device node phandle
640 * @pcdev: a pointer to the PSE controller device
641 * @np: a pointer to the device node
643 * Return: id of the PSE PI, -EINVAL if not found
645 static int of_pse_match_pi(struct pse_controller_dev
*pcdev
,
646 struct device_node
*np
)
650 for (i
= 0; i
< pcdev
->nr_lines
; i
++) {
651 if (pcdev
->pi
[i
].np
== np
)
659 * psec_id_xlate - translate pse_spec to the PSE line number according
660 * to the number of pse-cells in case of no pse_pi node
661 * @pcdev: a pointer to the PSE controller device
662 * @pse_spec: PSE line specifier as found in the device tree
664 * Return: 0 if #pse-cells = <0>. Return PSE line number otherwise.
666 static int psec_id_xlate(struct pse_controller_dev
*pcdev
,
667 const struct of_phandle_args
*pse_spec
)
669 if (!pcdev
->of_pse_n_cells
)
672 if (pcdev
->of_pse_n_cells
> 1 ||
673 pse_spec
->args
[0] >= pcdev
->nr_lines
)
676 return pse_spec
->args
[0];
679 struct pse_control
*of_pse_control_get(struct device_node
*node
)
681 struct pse_controller_dev
*r
, *pcdev
;
682 struct of_phandle_args args
;
683 struct pse_control
*psec
;
688 return ERR_PTR(-EINVAL
);
690 ret
= of_parse_phandle_with_args(node
, "pses", "#pse-cells", 0, &args
);
694 mutex_lock(&pse_list_mutex
);
696 list_for_each_entry(r
, &pse_controller_list
, list
) {
697 if (!r
->no_of_pse_pi
) {
698 ret
= of_pse_match_pi(r
, args
.np
);
704 } else if (args
.np
== r
->dev
->of_node
) {
711 psec
= ERR_PTR(-EPROBE_DEFER
);
715 if (WARN_ON(args
.args_count
!= pcdev
->of_pse_n_cells
)) {
716 psec
= ERR_PTR(-EINVAL
);
720 if (pcdev
->no_of_pse_pi
) {
721 psec_id
= psec_id_xlate(pcdev
, &args
);
723 psec
= ERR_PTR(psec_id
);
728 /* pse_list_mutex also protects the pcdev's pse_control list */
729 psec
= pse_control_get_internal(pcdev
, psec_id
);
732 mutex_unlock(&pse_list_mutex
);
733 of_node_put(args
.np
);
737 EXPORT_SYMBOL_GPL(of_pse_control_get
);
739 static int _pse_ethtool_get_status(struct pse_controller_dev
*pcdev
,
741 struct netlink_ext_ack
*extack
,
742 struct pse_control_status
*status
)
744 const struct pse_controller_ops
*ops
;
747 if (!ops
->ethtool_get_status
) {
748 NL_SET_ERR_MSG(extack
,
749 "PSE driver does not support status report");
753 return ops
->ethtool_get_status(pcdev
, id
, extack
, status
);
757 * pse_ethtool_get_status - get status of PSE control
758 * @psec: PSE control pointer
759 * @extack: extack for reporting useful error messages
760 * @status: struct to store PSE status
762 * Return: 0 on success and failure value on error
764 int pse_ethtool_get_status(struct pse_control
*psec
,
765 struct netlink_ext_ack
*extack
,
766 struct pse_control_status
*status
)
770 mutex_lock(&psec
->pcdev
->lock
);
771 err
= _pse_ethtool_get_status(psec
->pcdev
, psec
->id
, extack
, status
);
772 mutex_unlock(&psec
->pcdev
->lock
);
776 EXPORT_SYMBOL_GPL(pse_ethtool_get_status
);
778 static int pse_ethtool_c33_set_config(struct pse_control
*psec
,
779 const struct pse_control_config
*config
)
783 /* Look at admin_state_enabled status to not call regulator_enable
784 * or regulator_disable twice creating a regulator counter mismatch
786 switch (config
->c33_admin_control
) {
787 case ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED
:
788 /* We could have mismatch between admin_state_enabled and
789 * state reported by regulator_is_enabled. This can occur when
790 * the PI is forcibly turn off by the controller. Call
791 * regulator_disable on that case to fix the counters state.
793 if (psec
->pcdev
->pi
[psec
->id
].admin_state_enabled
&&
794 !regulator_is_enabled(psec
->ps
)) {
795 err
= regulator_disable(psec
->ps
);
799 if (!psec
->pcdev
->pi
[psec
->id
].admin_state_enabled
)
800 err
= regulator_enable(psec
->ps
);
802 case ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED
:
803 if (psec
->pcdev
->pi
[psec
->id
].admin_state_enabled
)
804 err
= regulator_disable(psec
->ps
);
813 static int pse_ethtool_podl_set_config(struct pse_control
*psec
,
814 const struct pse_control_config
*config
)
818 /* Look at admin_state_enabled status to not call regulator_enable
819 * or regulator_disable twice creating a regulator counter mismatch
821 switch (config
->podl_admin_control
) {
822 case ETHTOOL_PODL_PSE_ADMIN_STATE_ENABLED
:
823 if (!psec
->pcdev
->pi
[psec
->id
].admin_state_enabled
)
824 err
= regulator_enable(psec
->ps
);
826 case ETHTOOL_PODL_PSE_ADMIN_STATE_DISABLED
:
827 if (psec
->pcdev
->pi
[psec
->id
].admin_state_enabled
)
828 err
= regulator_disable(psec
->ps
);
838 * pse_ethtool_set_config - set PSE control configuration
839 * @psec: PSE control pointer
840 * @extack: extack for reporting useful error messages
841 * @config: Configuration of the test to run
843 * Return: 0 on success and failure value on error
845 int pse_ethtool_set_config(struct pse_control
*psec
,
846 struct netlink_ext_ack
*extack
,
847 const struct pse_control_config
*config
)
851 if (pse_has_c33(psec
) && config
->c33_admin_control
) {
852 err
= pse_ethtool_c33_set_config(psec
, config
);
857 if (pse_has_podl(psec
) && config
->podl_admin_control
)
858 err
= pse_ethtool_podl_set_config(psec
, config
);
862 EXPORT_SYMBOL_GPL(pse_ethtool_set_config
);
865 * pse_ethtool_set_pw_limit - set PSE control power limit
866 * @psec: PSE control pointer
867 * @extack: extack for reporting useful error messages
868 * @pw_limit: power limit value in mW
870 * Return: 0 on success and failure value on error
872 int pse_ethtool_set_pw_limit(struct pse_control
*psec
,
873 struct netlink_ext_ack
*extack
,
874 const unsigned int pw_limit
)
879 ret
= regulator_get_voltage(psec
->ps
);
881 NL_SET_ERR_MSG(extack
,
882 "Can't calculate the current, PSE voltage read is 0");
886 NL_SET_ERR_MSG(extack
,
887 "Error reading PSE voltage");
893 tmp_64
*= 1000000000ull;
894 /* uA = mW * 1000000000 / uV */
895 uA
= DIV_ROUND_CLOSEST_ULL(tmp_64
, uV
);
897 return regulator_set_current_limit(psec
->ps
, 0, uA
);
899 EXPORT_SYMBOL_GPL(pse_ethtool_set_pw_limit
);
901 bool pse_has_podl(struct pse_control
*psec
)
903 return psec
->pcdev
->types
& ETHTOOL_PSE_PODL
;
905 EXPORT_SYMBOL_GPL(pse_has_podl
);
907 bool pse_has_c33(struct pse_control
*psec
)
909 return psec
->pcdev
->types
& ETHTOOL_PSE_C33
;
911 EXPORT_SYMBOL_GPL(pse_has_c33
);