drivers/net/wireless/ath/ath12k/core.h

   1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
   2 /*
   3  * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
   4  * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
   5  */
   6
   7 #ifndef ATH12K_CORE_H
   8 #define ATH12K_CORE_H
   9
  10 #include <linux/types.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/irq.h>
  13 #include <linux/bitfield.h>
  14 #include <linux/dmi.h>
  15 #include <linux/ctype.h>
  16 #include <linux/firmware.h>
  17 #include <linux/panic_notifier.h>
  18 #include "qmi.h"
  19 #include "htc.h"
  20 #include "wmi.h"
  21 #include "hal.h"
  22 #include "dp.h"
  23 #include "ce.h"
  24 #include "mac.h"
  25 #include "hw.h"
  26 #include "hal_rx.h"
  27 #include "reg.h"
  28 #include "dbring.h"
  29 #include "fw.h"
  30 #include "acpi.h"
  31 #include "wow.h"
  32 #include "debugfs_htt_stats.h"
  33 #include "coredump.h"
  34
  35 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
  36
  37 #define ATH12K_TX_MGMT_NUM_PENDING_MAX  512
  38
  39 #define ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
  40
  41 /* Pending management packets threshold for dropping probe responses */
  42 #define ATH12K_PRB_RSP_DROP_THRESHOLD ((ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
  43
  44 /* SMBIOS type containing Board Data File Name Extension */
  45 #define ATH12K_SMBIOS_BDF_EXT_TYPE 0xF8
  46
  47 /* SMBIOS type structure length (excluding strings-set) */
  48 #define ATH12K_SMBIOS_BDF_EXT_LENGTH 0x9
  49
  50 /* The magic used by QCA spec */
  51 #define ATH12K_SMBIOS_BDF_EXT_MAGIC "BDF_"
  52
  53 #define ATH12K_INVALID_HW_MAC_ID        0xFF
  54 #define ATH12K_CONNECTION_LOSS_HZ       (3 * HZ)
  55 #define ATH12K_RX_RATE_TABLE_NUM        320
  56 #define ATH12K_RX_RATE_TABLE_11AX_NUM   576
  57
  58 #define ATH12K_MON_TIMER_INTERVAL  10
  59 #define ATH12K_RESET_TIMEOUT_HZ                 (20 * HZ)
  60 #define ATH12K_RESET_MAX_FAIL_COUNT_FIRST       3
  61 #define ATH12K_RESET_MAX_FAIL_COUNT_FINAL       5
  62 #define ATH12K_RESET_FAIL_TIMEOUT_HZ            (20 * HZ)
  63 #define ATH12K_RECONFIGURE_TIMEOUT_HZ           (10 * HZ)
  64 #define ATH12K_RECOVER_START_TIMEOUT_HZ         (20 * HZ)
  65
  66 enum ath12k_bdf_search {
  67         ATH12K_BDF_SEARCH_DEFAULT,
  68         ATH12K_BDF_SEARCH_BUS_AND_BOARD,
  69 };
  70
  71 enum wme_ac {
  72         WME_AC_BE,
  73         WME_AC_BK,
  74         WME_AC_VI,
  75         WME_AC_VO,
  76         WME_NUM_AC
  77 };
  78
  79 #define ATH12K_HT_MCS_MAX       7
  80 #define ATH12K_VHT_MCS_MAX      9
  81 #define ATH12K_HE_MCS_MAX       11
  82
  83 enum ath12k_crypt_mode {
  84         /* Only use hardware crypto engine */
  85         ATH12K_CRYPT_MODE_HW,
  86         /* Only use software crypto */
  87         ATH12K_CRYPT_MODE_SW,
  88 };
  89
  90 static inline enum wme_ac ath12k_tid_to_ac(u32 tid)
  91 {
  92         return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
  93                 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
  94                 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
  95                 WME_AC_VO);
  96 }
  97
  98 static inline u64 ath12k_le32hilo_to_u64(__le32 hi, __le32 lo)
  99 {
 100         u64 hi64 = le32_to_cpu(hi);
 101         u64 lo64 = le32_to_cpu(lo);
 102
 103         return (hi64 << 32) | lo64;
 104 }
 105
 106 enum ath12k_skb_flags {
 107         ATH12K_SKB_HW_80211_ENCAP = BIT(0),
 108         ATH12K_SKB_CIPHER_SET = BIT(1),
 109 };
 110
 111 struct ath12k_skb_cb {
 112         dma_addr_t paddr;
 113         struct ath12k *ar;
 114         struct ieee80211_vif *vif;
 115         dma_addr_t paddr_ext_desc;
 116         u32 cipher;
 117         u8 flags;
 118 };
 119
 120 struct ath12k_skb_rxcb {
 121         dma_addr_t paddr;
 122         bool is_first_msdu;
 123         bool is_last_msdu;
 124         bool is_continuation;
 125         bool is_mcbc;
 126         bool is_eapol;
 127         struct hal_rx_desc *rx_desc;
 128         u8 err_rel_src;
 129         u8 err_code;
 130         u8 mac_id;
 131         u8 unmapped;
 132         u8 is_frag;
 133         u8 tid;
 134         u16 peer_id;
 135 };
 136
 137 enum ath12k_hw_rev {
 138         ATH12K_HW_QCN9274_HW10,
 139         ATH12K_HW_QCN9274_HW20,
 140         ATH12K_HW_WCN7850_HW20
 141 };
 142
 143 enum ath12k_firmware_mode {
 144         /* the default mode, standard 802.11 functionality */
 145         ATH12K_FIRMWARE_MODE_NORMAL,
 146
 147         /* factory tests etc */
 148         ATH12K_FIRMWARE_MODE_FTM,
 149 };
 150
 151 #define ATH12K_IRQ_NUM_MAX 57
 152 #define ATH12K_EXT_IRQ_NUM_MAX  16
 153
 154 struct ath12k_ext_irq_grp {
 155         struct ath12k_base *ab;
 156         u32 irqs[ATH12K_EXT_IRQ_NUM_MAX];
 157         u32 num_irq;
 158         u32 grp_id;
 159         u64 timestamp;
 160         struct napi_struct napi;
 161         struct net_device *napi_ndev;
 162 };
 163
 164 struct ath12k_smbios_bdf {
 165         struct dmi_header hdr;
 166         u32 padding;
 167         u8 bdf_enabled;
 168         u8 bdf_ext[];
 169 } __packed;
 170
 171 #define HEHANDLE_CAP_PHYINFO_SIZE       3
 172 #define HECAP_PHYINFO_SIZE              9
 173 #define HECAP_MACINFO_SIZE              5
 174 #define HECAP_TXRX_MCS_NSS_SIZE         2
 175 #define HECAP_PPET16_PPET8_MAX_SIZE     25
 176
 177 #define HE_PPET16_PPET8_SIZE            8
 178
 179 /* 802.11ax PPE (PPDU packet Extension) threshold */
 180 struct he_ppe_threshold {
 181         u32 numss_m1;
 182         u32 ru_mask;
 183         u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
 184 };
 185
 186 struct ath12k_he {
 187         u8 hecap_macinfo[HECAP_MACINFO_SIZE];
 188         u32 hecap_rxmcsnssmap;
 189         u32 hecap_txmcsnssmap;
 190         u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
 191         struct he_ppe_threshold   hecap_ppet;
 192         u32 heop_param;
 193 };
 194
 195 enum {
 196         WMI_HOST_TP_SCALE_MAX   = 0,
 197         WMI_HOST_TP_SCALE_50    = 1,
 198         WMI_HOST_TP_SCALE_25    = 2,
 199         WMI_HOST_TP_SCALE_12    = 3,
 200         WMI_HOST_TP_SCALE_MIN   = 4,
 201         WMI_HOST_TP_SCALE_SIZE   = 5,
 202 };
 203
 204 enum ath12k_scan_state {
 205         ATH12K_SCAN_IDLE,
 206         ATH12K_SCAN_STARTING,
 207         ATH12K_SCAN_RUNNING,
 208         ATH12K_SCAN_ABORTING,
 209 };
 210
 211 enum ath12k_dev_flags {
 212         ATH12K_CAC_RUNNING,
 213         ATH12K_FLAG_CRASH_FLUSH,
 214         ATH12K_FLAG_RAW_MODE,
 215         ATH12K_FLAG_HW_CRYPTO_DISABLED,
 216         ATH12K_FLAG_RECOVERY,
 217         ATH12K_FLAG_UNREGISTERING,
 218         ATH12K_FLAG_REGISTERED,
 219         ATH12K_FLAG_QMI_FAIL,
 220         ATH12K_FLAG_HTC_SUSPEND_COMPLETE,
 221         ATH12K_FLAG_CE_IRQ_ENABLED,
 222         ATH12K_FLAG_EXT_IRQ_ENABLED,
 223 };
 224
 225 struct ath12k_tx_conf {
 226         bool changed;
 227         u16 ac;
 228         struct ieee80211_tx_queue_params tx_queue_params;
 229 };
 230
 231 struct ath12k_key_conf {
 232         enum set_key_cmd cmd;
 233         struct list_head list;
 234         struct ieee80211_sta *sta;
 235         struct ieee80211_key_conf *key;
 236 };
 237
 238 struct ath12k_vif_cache {
 239         struct ath12k_tx_conf tx_conf;
 240         struct ath12k_key_conf key_conf;
 241         u32 bss_conf_changed;
 242 };
 243
 244 struct ath12k_rekey_data {
 245         u8 kck[NL80211_KCK_LEN];
 246         u8 kek[NL80211_KCK_LEN];
 247         u64 replay_ctr;
 248         bool enable_offload;
 249 };
 250
 251 struct ath12k_link_vif {
 252         u32 vdev_id;
 253         u32 beacon_interval;
 254         u32 dtim_period;
 255         u16 ast_hash;
 256         u16 ast_idx;
 257         u16 tcl_metadata;
 258         u8 hal_addr_search_flags;
 259         u8 search_type;
 260
 261         struct ath12k *ar;
 262
 263         int bank_id;
 264         u8 vdev_id_check_en;
 265
 266         struct wmi_wmm_params_all_arg wmm_params;
 267         struct list_head list;
 268
 269         bool is_created;
 270         bool is_started;
 271         bool is_up;
 272         u8 bssid[ETH_ALEN];
 273         struct cfg80211_bitrate_mask bitrate_mask;
 274         struct delayed_work connection_loss_work;
 275         int num_legacy_stations;
 276         int rtscts_prot_mode;
 277         int txpower;
 278         bool rsnie_present;
 279         bool wpaie_present;
 280         struct ieee80211_chanctx_conf chanctx;
 281         u8 vdev_stats_id;
 282         u32 punct_bitmap;
 283         u8 link_id;
 284         struct ath12k_vif *ahvif;
 285         struct ath12k_rekey_data rekey_data;
 286 };
 287
 288 struct ath12k_vif {
 289         enum wmi_vdev_type vdev_type;
 290         enum wmi_vdev_subtype vdev_subtype;
 291         struct ieee80211_vif *vif;
 292         struct ath12k_hw *ah;
 293
 294         union {
 295                 struct {
 296                         u32 uapsd;
 297                 } sta;
 298                 struct {
 299                         /* 127 stations; wmi limit */
 300                         u8 tim_bitmap[16];
 301                         u8 tim_len;
 302                         u32 ssid_len;
 303                         u8 ssid[IEEE80211_MAX_SSID_LEN];
 304                         bool hidden_ssid;
 305                         /* P2P_IE with NoA attribute for P2P_GO case */
 306                         u32 noa_len;
 307                         u8 *noa_data;
 308                 } ap;
 309         } u;
 310
 311         u32 aid;
 312         u32 key_cipher;
 313         u8 tx_encap_type;
 314         bool ps;
 315
 316         struct ath12k_link_vif deflink;
 317         struct ath12k_link_vif __rcu *link[IEEE80211_MLD_MAX_NUM_LINKS];
 318         struct ath12k_vif_cache *cache[IEEE80211_MLD_MAX_NUM_LINKS];
 319         /* indicates bitmap of link vif created in FW */
 320         u16 links_map;
 321
 322         /* Must be last - ends in a flexible-array member.
 323          *
 324          * FIXME: Driver should not copy struct ieee80211_chanctx_conf,
 325          * especially because it has a flexible array. Find a better way.
 326          */
 327         struct ieee80211_chanctx_conf chanctx;
 328 };
 329
 330 struct ath12k_vif_iter {
 331         u32 vdev_id;
 332         struct ath12k *ar;
 333         struct ath12k_link_vif *arvif;
 334 };
 335
 336 #define HAL_AST_IDX_INVALID     0xFFFF
 337 #define HAL_RX_MAX_MCS          12
 338 #define HAL_RX_MAX_MCS_HT       31
 339 #define HAL_RX_MAX_MCS_VHT      9
 340 #define HAL_RX_MAX_MCS_HE       11
 341 #define HAL_RX_MAX_NSS          8
 342 #define HAL_RX_MAX_NUM_LEGACY_RATES 12
 343 #define ATH12K_RX_RATE_TABLE_11AX_NUM   576
 344 #define ATH12K_RX_RATE_TABLE_NUM 320
 345
 346 struct ath12k_rx_peer_rate_stats {
 347         u64 ht_mcs_count[HAL_RX_MAX_MCS_HT + 1];
 348         u64 vht_mcs_count[HAL_RX_MAX_MCS_VHT + 1];
 349         u64 he_mcs_count[HAL_RX_MAX_MCS_HE + 1];
 350         u64 nss_count[HAL_RX_MAX_NSS];
 351         u64 bw_count[HAL_RX_BW_MAX];
 352         u64 gi_count[HAL_RX_GI_MAX];
 353         u64 legacy_count[HAL_RX_MAX_NUM_LEGACY_RATES];
 354         u64 rx_rate[ATH12K_RX_RATE_TABLE_11AX_NUM];
 355 };
 356
 357 struct ath12k_rx_peer_stats {
 358         u64 num_msdu;
 359         u64 num_mpdu_fcs_ok;
 360         u64 num_mpdu_fcs_err;
 361         u64 tcp_msdu_count;
 362         u64 udp_msdu_count;
 363         u64 other_msdu_count;
 364         u64 ampdu_msdu_count;
 365         u64 non_ampdu_msdu_count;
 366         u64 stbc_count;
 367         u64 beamformed_count;
 368         u64 mcs_count[HAL_RX_MAX_MCS + 1];
 369         u64 nss_count[HAL_RX_MAX_NSS];
 370         u64 bw_count[HAL_RX_BW_MAX];
 371         u64 gi_count[HAL_RX_GI_MAX];
 372         u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
 373         u64 tid_count[IEEE80211_NUM_TIDS + 1];
 374         u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
 375         u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
 376         u64 rx_duration;
 377         u64 dcm_count;
 378         u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
 379         struct ath12k_rx_peer_rate_stats pkt_stats;
 380         struct ath12k_rx_peer_rate_stats byte_stats;
 381 };
 382
 383 #define ATH12K_HE_MCS_NUM       12
 384 #define ATH12K_VHT_MCS_NUM      10
 385 #define ATH12K_BW_NUM           5
 386 #define ATH12K_NSS_NUM          4
 387 #define ATH12K_LEGACY_NUM       12
 388 #define ATH12K_GI_NUM           4
 389 #define ATH12K_HT_MCS_NUM       32
 390
 391 enum ath12k_pkt_rx_err {
 392         ATH12K_PKT_RX_ERR_FCS,
 393         ATH12K_PKT_RX_ERR_TKIP,
 394         ATH12K_PKT_RX_ERR_CRYPT,
 395         ATH12K_PKT_RX_ERR_PEER_IDX_INVAL,
 396         ATH12K_PKT_RX_ERR_MAX,
 397 };
 398
 399 enum ath12k_ampdu_subfrm_num {
 400         ATH12K_AMPDU_SUBFRM_NUM_10,
 401         ATH12K_AMPDU_SUBFRM_NUM_20,
 402         ATH12K_AMPDU_SUBFRM_NUM_30,
 403         ATH12K_AMPDU_SUBFRM_NUM_40,
 404         ATH12K_AMPDU_SUBFRM_NUM_50,
 405         ATH12K_AMPDU_SUBFRM_NUM_60,
 406         ATH12K_AMPDU_SUBFRM_NUM_MORE,
 407         ATH12K_AMPDU_SUBFRM_NUM_MAX,
 408 };
 409
 410 enum ath12k_amsdu_subfrm_num {
 411         ATH12K_AMSDU_SUBFRM_NUM_1,
 412         ATH12K_AMSDU_SUBFRM_NUM_2,
 413         ATH12K_AMSDU_SUBFRM_NUM_3,
 414         ATH12K_AMSDU_SUBFRM_NUM_4,
 415         ATH12K_AMSDU_SUBFRM_NUM_MORE,
 416         ATH12K_AMSDU_SUBFRM_NUM_MAX,
 417 };
 418
 419 enum ath12k_counter_type {
 420         ATH12K_COUNTER_TYPE_BYTES,
 421         ATH12K_COUNTER_TYPE_PKTS,
 422         ATH12K_COUNTER_TYPE_MAX,
 423 };
 424
 425 enum ath12k_stats_type {
 426         ATH12K_STATS_TYPE_SUCC,
 427         ATH12K_STATS_TYPE_FAIL,
 428         ATH12K_STATS_TYPE_RETRY,
 429         ATH12K_STATS_TYPE_AMPDU,
 430         ATH12K_STATS_TYPE_MAX,
 431 };
 432
 433 struct ath12k_htt_data_stats {
 434         u64 legacy[ATH12K_COUNTER_TYPE_MAX][ATH12K_LEGACY_NUM];
 435         u64 ht[ATH12K_COUNTER_TYPE_MAX][ATH12K_HT_MCS_NUM];
 436         u64 vht[ATH12K_COUNTER_TYPE_MAX][ATH12K_VHT_MCS_NUM];
 437         u64 he[ATH12K_COUNTER_TYPE_MAX][ATH12K_HE_MCS_NUM];
 438         u64 bw[ATH12K_COUNTER_TYPE_MAX][ATH12K_BW_NUM];
 439         u64 nss[ATH12K_COUNTER_TYPE_MAX][ATH12K_NSS_NUM];
 440         u64 gi[ATH12K_COUNTER_TYPE_MAX][ATH12K_GI_NUM];
 441         u64 transmit_type[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RECEPTION_TYPE_MAX];
 442         u64 ru_loc[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RU_ALLOC_TYPE_MAX];
 443 };
 444
 445 struct ath12k_htt_tx_stats {
 446         struct ath12k_htt_data_stats stats[ATH12K_STATS_TYPE_MAX];
 447         u64 tx_duration;
 448         u64 ba_fails;
 449         u64 ack_fails;
 450         u16 ru_start;
 451         u16 ru_tones;
 452         u32 mu_group[MAX_MU_GROUP_ID];
 453 };
 454
 455 struct ath12k_per_ppdu_tx_stats {
 456         u16 succ_pkts;
 457         u16 failed_pkts;
 458         u16 retry_pkts;
 459         u32 succ_bytes;
 460         u32 failed_bytes;
 461         u32 retry_bytes;
 462 };
 463
 464 struct ath12k_wbm_tx_stats {
 465         u64 wbm_tx_comp_stats[HAL_WBM_REL_HTT_TX_COMP_STATUS_MAX];
 466 };
 467
 468 struct ath12k_link_sta {
 469         struct ath12k_link_vif *arvif;
 470         struct ath12k_sta *ahsta;
 471
 472         /* the following are protected by ar->data_lock */
 473         u32 changed; /* IEEE80211_RC_* */
 474         u32 bw;
 475         u32 nss;
 476         u32 smps;
 477
 478         struct wiphy_work update_wk;
 479         struct rate_info txrate;
 480         struct rate_info last_txrate;
 481         u64 rx_duration;
 482         u64 tx_duration;
 483         u8 rssi_comb;
 484         u8 link_id;
 485         struct ath12k_rx_peer_stats *rx_stats;
 486         struct ath12k_wbm_tx_stats *wbm_tx_stats;
 487         u32 bw_prev;
 488 };
 489
 490 struct ath12k_sta {
 491         enum hal_pn_type pn_type;
 492         struct ath12k_link_sta deflink;
 493         struct ath12k_link_sta __rcu *link[IEEE80211_MLD_MAX_NUM_LINKS];
 494         /* indicates bitmap of link sta created in FW */
 495         u16 links_map;
 496 };
 497
 498 #define ATH12K_MIN_5G_FREQ 4150
 499 #define ATH12K_MIN_6G_FREQ 5925
 500 #define ATH12K_MAX_6G_FREQ 7115
 501 #define ATH12K_NUM_CHANS 101
 502 #define ATH12K_MAX_5G_CHAN 173
 503
 504 enum ath12k_hw_state {
 505         ATH12K_HW_STATE_OFF,
 506         ATH12K_HW_STATE_ON,
 507         ATH12K_HW_STATE_RESTARTING,
 508         ATH12K_HW_STATE_RESTARTED,
 509         ATH12K_HW_STATE_WEDGED,
 510         /* Add other states as required */
 511 };
 512
 513 /* Antenna noise floor */
 514 #define ATH12K_DEFAULT_NOISE_FLOOR -95
 515
 516 struct ath12k_fw_stats {
 517         u32 pdev_id;
 518         u32 stats_id;
 519         struct list_head pdevs;
 520         struct list_head vdevs;
 521         struct list_head bcn;
 522 };
 523
 524 struct ath12k_dbg_htt_stats {
 525         enum ath12k_dbg_htt_ext_stats_type type;
 526         u32 cfg_param[4];
 527         u8 reset;
 528         struct debug_htt_stats_req *stats_req;
 529 };
 530
 531 struct ath12k_debug {
 532         struct dentry *debugfs_pdev;
 533         struct dentry *debugfs_pdev_symlink;
 534         struct ath12k_dbg_htt_stats htt_stats;
 535 };
 536
 537 struct ath12k_per_peer_tx_stats {
 538         u32 succ_bytes;
 539         u32 retry_bytes;
 540         u32 failed_bytes;
 541         u32 duration;
 542         u16 succ_pkts;
 543         u16 retry_pkts;
 544         u16 failed_pkts;
 545         u16 ru_start;
 546         u16 ru_tones;
 547         u8 ba_fails;
 548         u8 ppdu_type;
 549         u32 mu_grpid;
 550         u32 mu_pos;
 551         bool is_ampdu;
 552 };
 553
 554 #define ATH12K_FLUSH_TIMEOUT (5 * HZ)
 555 #define ATH12K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
 556
 557 struct ath12k {
 558         struct ath12k_base *ab;
 559         struct ath12k_pdev *pdev;
 560         struct ath12k_hw *ah;
 561         struct ath12k_wmi_pdev *wmi;
 562         struct ath12k_pdev_dp dp;
 563         u8 mac_addr[ETH_ALEN];
 564         u32 ht_cap_info;
 565         u32 vht_cap_info;
 566         struct ath12k_he ar_he;
 567         bool supports_6ghz;
 568         struct {
 569                 struct completion started;
 570                 struct completion completed;
 571                 struct completion on_channel;
 572                 struct delayed_work timeout;
 573                 enum ath12k_scan_state state;
 574                 bool is_roc;
 575                 int vdev_id;
 576                 int roc_freq;
 577                 bool roc_notify;
 578         } scan;
 579
 580         struct {
 581                 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
 582                 struct ieee80211_sband_iftype_data
 583                         iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
 584         } mac;
 585
 586         unsigned long dev_flags;
 587         unsigned int filter_flags;
 588         u32 min_tx_power;
 589         u32 max_tx_power;
 590         u32 txpower_limit_2g;
 591         u32 txpower_limit_5g;
 592         u32 txpower_scale;
 593         u32 power_scale;
 594         u32 chan_tx_pwr;
 595         u32 num_stations;
 596         u32 max_num_stations;
 597
 598         /* protects the radio specific data like debug stats, ppdu_stats_info stats,
 599          * vdev_stop_status info, scan data, ath12k_sta info, ath12k_link_vif info,
 600          * channel context data, survey info, test mode data.
 601          */
 602         spinlock_t data_lock;
 603
 604         struct list_head arvifs;
 605         /* should never be NULL; needed for regular htt rx */
 606         struct ieee80211_channel *rx_channel;
 607
 608         /* valid during scan; needed for mgmt rx during scan */
 609         struct ieee80211_channel *scan_channel;
 610
 611         u8 cfg_tx_chainmask;
 612         u8 cfg_rx_chainmask;
 613         u8 num_rx_chains;
 614         u8 num_tx_chains;
 615         /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
 616         u8 pdev_idx;
 617         u8 lmac_id;
 618         u8 hw_link_id;
 619
 620         struct completion peer_assoc_done;
 621         struct completion peer_delete_done;
 622
 623         int install_key_status;
 624         struct completion install_key_done;
 625
 626         int last_wmi_vdev_start_status;
 627         struct completion vdev_setup_done;
 628         struct completion vdev_delete_done;
 629
 630         int num_peers;
 631         int max_num_peers;
 632         u32 num_started_vdevs;
 633         u32 num_created_vdevs;
 634         unsigned long long allocated_vdev_map;
 635
 636         struct idr txmgmt_idr;
 637         /* protects txmgmt_idr data */
 638         spinlock_t txmgmt_idr_lock;
 639         atomic_t num_pending_mgmt_tx;
 640         wait_queue_head_t txmgmt_empty_waitq;
 641
 642         /* cycle count is reported twice for each visited channel during scan.
 643          * access protected by data_lock
 644          */
 645         u32 survey_last_rx_clear_count;
 646         u32 survey_last_cycle_count;
 647
 648         /* Channel info events are expected to come in pairs without and with
 649          * COMPLETE flag set respectively for each channel visit during scan.
 650          *
 651          * However there are deviations from this rule. This flag is used to
 652          * avoid reporting garbage data.
 653          */
 654         bool ch_info_can_report_survey;
 655         struct survey_info survey[ATH12K_NUM_CHANS];
 656         struct completion bss_survey_done;
 657
 658         struct work_struct regd_update_work;
 659
 660         struct work_struct wmi_mgmt_tx_work;
 661         struct sk_buff_head wmi_mgmt_tx_queue;
 662
 663         struct ath12k_wow wow;
 664         struct completion target_suspend;
 665         bool target_suspend_ack;
 666         struct ath12k_per_peer_tx_stats peer_tx_stats;
 667         struct list_head ppdu_stats_info;
 668         u32 ppdu_stat_list_depth;
 669
 670         struct ath12k_per_peer_tx_stats cached_stats;
 671         u32 last_ppdu_id;
 672         u32 cached_ppdu_id;
 673 #ifdef CONFIG_ATH12K_DEBUGFS
 674         struct ath12k_debug debug;
 675 #endif
 676
 677         bool dfs_block_radar_events;
 678         bool monitor_conf_enabled;
 679         bool monitor_vdev_created;
 680         bool monitor_started;
 681         int monitor_vdev_id;
 682
 683         u32 freq_low;
 684         u32 freq_high;
 685
 686         bool nlo_enabled;
 687 };
 688
 689 struct ath12k_hw {
 690         struct ieee80211_hw *hw;
 691         /* Protect the write operation of the hardware state ath12k_hw::state
 692          * between hardware start<=>reconfigure<=>stop transitions.
 693          */
 694         struct mutex hw_mutex;
 695         enum ath12k_hw_state state;
 696         bool regd_updated;
 697         bool use_6ghz_regd;
 698
 699         u8 num_radio;
 700
 701         /* Keep last */
 702         struct ath12k radio[] __aligned(sizeof(void *));
 703 };
 704
 705 struct ath12k_band_cap {
 706         u32 phy_id;
 707         u32 max_bw_supported;
 708         u32 ht_cap_info;
 709         u32 he_cap_info[2];
 710         u32 he_mcs;
 711         u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
 712         struct ath12k_wmi_ppe_threshold_arg he_ppet;
 713         u16 he_6ghz_capa;
 714         u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE];
 715         u32 eht_cap_phy_info[WMI_MAX_EHTCAP_PHY_SIZE];
 716         u32 eht_mcs_20_only;
 717         u32 eht_mcs_80;
 718         u32 eht_mcs_160;
 719         u32 eht_mcs_320;
 720         struct ath12k_wmi_ppe_threshold_arg eht_ppet;
 721         u32 eht_cap_info_internal;
 722 };
 723
 724 struct ath12k_pdev_cap {
 725         u32 supported_bands;
 726         u32 ampdu_density;
 727         u32 vht_cap;
 728         u32 vht_mcs;
 729         u32 he_mcs;
 730         u32 tx_chain_mask;
 731         u32 rx_chain_mask;
 732         u32 tx_chain_mask_shift;
 733         u32 rx_chain_mask_shift;
 734         struct ath12k_band_cap band[NUM_NL80211_BANDS];
 735 };
 736
 737 struct mlo_timestamp {
 738         u32 info;
 739         u32 sync_timestamp_lo_us;
 740         u32 sync_timestamp_hi_us;
 741         u32 mlo_offset_lo;
 742         u32 mlo_offset_hi;
 743         u32 mlo_offset_clks;
 744         u32 mlo_comp_clks;
 745         u32 mlo_comp_timer;
 746 };
 747
 748 struct ath12k_pdev {
 749         struct ath12k *ar;
 750         u32 pdev_id;
 751         u32 hw_link_id;
 752         struct ath12k_pdev_cap cap;
 753         u8 mac_addr[ETH_ALEN];
 754         struct mlo_timestamp timestamp;
 755 };
 756
 757 struct ath12k_fw_pdev {
 758         u32 pdev_id;
 759         u32 phy_id;
 760         u32 supported_bands;
 761 };
 762
 763 struct ath12k_board_data {
 764         const struct firmware *fw;
 765         const void *data;
 766         size_t len;
 767 };
 768
 769 struct ath12k_soc_dp_tx_err_stats {
 770         /* TCL Ring Descriptor unavailable */
 771         u32 desc_na[DP_TCL_NUM_RING_MAX];
 772         /* Other failures during dp_tx due to mem allocation failure
 773          * idr unavailable etc.
 774          */
 775         atomic_t misc_fail;
 776 };
 777
 778 struct ath12k_soc_dp_stats {
 779         u32 err_ring_pkts;
 780         u32 invalid_rbm;
 781         u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
 782         u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
 783         u32 hal_reo_error[DP_REO_DST_RING_MAX];
 784         struct ath12k_soc_dp_tx_err_stats tx_err;
 785 };
 786
 787 /**
 788  * enum ath12k_link_capable_flags - link capable flags
 789  *
 790  * Single/Multi link capability information
 791  *
 792  * @ATH12K_INTRA_DEVICE_MLO_SUPPORT: SLO/MLO form between the radio, where all
 793  *      the links (radios) present within a device.
 794  * @ATH12K_INTER_DEVICE_MLO_SUPPORT: SLO/MLO form between the radio, where all
 795  *      the links (radios) present across the devices.
 796  */
 797 enum ath12k_link_capable_flags {
 798         ATH12K_INTRA_DEVICE_MLO_SUPPORT = BIT(0),
 799         ATH12K_INTER_DEVICE_MLO_SUPPORT = BIT(1),
 800 };
 801
 802 /* Master structure to hold the hw data which may be used in core module */
 803 struct ath12k_base {
 804         enum ath12k_hw_rev hw_rev;
 805         struct platform_device *pdev;
 806         struct device *dev;
 807         struct ath12k_qmi qmi;
 808         struct ath12k_wmi_base wmi_ab;
 809         struct completion fw_ready;
 810         u8 device_id;
 811         int num_radios;
 812         /* HW channel counters frequency value in hertz common to all MACs */
 813         u32 cc_freq_hz;
 814
 815         struct ath12k_dump_file_data *dump_data;
 816         size_t ath12k_coredump_len;
 817         struct work_struct dump_work;
 818
 819         struct ath12k_htc htc;
 820
 821         struct ath12k_dp dp;
 822
 823         void __iomem *mem;
 824         unsigned long mem_len;
 825
 826         struct {
 827                 enum ath12k_bus bus;
 828                 const struct ath12k_hif_ops *ops;
 829         } hif;
 830
 831         struct {
 832                 struct completion wakeup_completed;
 833                 u32 wmi_conf_rx_decap_mode;
 834         } wow;
 835
 836         struct ath12k_ce ce;
 837         struct timer_list rx_replenish_retry;
 838         struct ath12k_hal hal;
 839         /* To synchronize core_start/core_stop */
 840         struct mutex core_lock;
 841         /* Protects data like peers */
 842         spinlock_t base_lock;
 843
 844         /* Single pdev device (struct ath12k_hw_params::single_pdev_only):
 845          *
 846          * Firmware maintains data for all bands but advertises a single
 847          * phy to the host which is stored as a single element in this
 848          * array.
 849          *
 850          * Other devices:
 851          *
 852          * This array will contain as many elements as the number of
 853          * radios.
 854          */
 855         struct ath12k_pdev pdevs[MAX_RADIOS];
 856
 857         /* struct ath12k_hw_params::single_pdev_only devices use this to
 858          * store phy specific data
 859          */
 860         struct ath12k_fw_pdev fw_pdev[MAX_RADIOS];
 861         u8 fw_pdev_count;
 862
 863         struct ath12k_pdev __rcu *pdevs_active[MAX_RADIOS];
 864
 865         /* Holds information of wiphy (hw) registration.
 866          *
 867          * In Multi/Single Link Operation case, all pdevs are registered as
 868          * a single wiphy. In other (legacy/Non-MLO) cases, each pdev is
 869          * registered as separate wiphys.
 870          */
 871         struct ath12k_hw *ah[MAX_RADIOS];
 872         u8 num_hw;
 873
 874         struct ath12k_wmi_hal_reg_capabilities_ext_arg hal_reg_cap[MAX_RADIOS];
 875         unsigned long long free_vdev_map;
 876         unsigned long long free_vdev_stats_id_map;
 877         struct list_head peers;
 878         wait_queue_head_t peer_mapping_wq;
 879         u8 mac_addr[ETH_ALEN];
 880         bool wmi_ready;
 881         u32 wlan_init_status;
 882         int irq_num[ATH12K_IRQ_NUM_MAX];
 883         struct ath12k_ext_irq_grp ext_irq_grp[ATH12K_EXT_IRQ_GRP_NUM_MAX];
 884         struct napi_struct *napi;
 885         struct ath12k_wmi_target_cap_arg target_caps;
 886         u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
 887         bool pdevs_macaddr_valid;
 888
 889         const struct ath12k_hw_params *hw_params;
 890
 891         const struct firmware *cal_file;
 892
 893         /* Below regd's are protected by ab->data_lock */
 894         /* This is the regd set for every radio
 895          * by the firmware during initialization
 896          */
 897         struct ieee80211_regdomain *default_regd[MAX_RADIOS];
 898         /* This regd is set during dynamic country setting
 899          * This may or may not be used during the runtime
 900          */
 901         struct ieee80211_regdomain *new_regd[MAX_RADIOS];
 902
 903         /* Current DFS Regulatory */
 904         enum ath12k_dfs_region dfs_region;
 905         struct ath12k_soc_dp_stats soc_stats;
 906 #ifdef CONFIG_ATH12K_DEBUGFS
 907         struct dentry *debugfs_soc;
 908 #endif
 909
 910         unsigned long dev_flags;
 911         struct completion driver_recovery;
 912         struct workqueue_struct *workqueue;
 913         struct work_struct restart_work;
 914         struct workqueue_struct *workqueue_aux;
 915         struct work_struct reset_work;
 916         atomic_t reset_count;
 917         atomic_t recovery_count;
 918         bool is_reset;
 919         struct completion reset_complete;
 920         /* continuous recovery fail count */
 921         atomic_t fail_cont_count;
 922         unsigned long reset_fail_timeout;
 923         struct {
 924                 /* protected by data_lock */
 925                 u32 fw_crash_counter;
 926         } stats;
 927         u32 pktlog_defs_checksum;
 928
 929         struct ath12k_dbring_cap *db_caps;
 930         u32 num_db_cap;
 931
 932         struct timer_list mon_reap_timer;
 933
 934         struct completion htc_suspend;
 935
 936         u64 fw_soc_drop_count;
 937         bool static_window_map;
 938
 939         struct work_struct rfkill_work;
 940         /* true means radio is on */
 941         bool rfkill_radio_on;
 942
 943         struct {
 944                 enum ath12k_bdf_search bdf_search;
 945                 u32 vendor;
 946                 u32 device;
 947                 u32 subsystem_vendor;
 948                 u32 subsystem_device;
 949         } id;
 950
 951         struct {
 952                 u32 api_version;
 953
 954                 const struct firmware *fw;
 955                 const u8 *amss_data;
 956                 size_t amss_len;
 957                 const u8 *amss_dualmac_data;
 958                 size_t amss_dualmac_len;
 959                 const u8 *m3_data;
 960                 size_t m3_len;
 961
 962                 DECLARE_BITMAP(fw_features, ATH12K_FW_FEATURE_COUNT);
 963         } fw;
 964
 965         const struct hal_rx_ops *hal_rx_ops;
 966
 967         /* mlo_capable_flags denotes the single/multi link operation
 968          * capabilities of the Device.
 969          *
 970          * See enum ath12k_link_capable_flags
 971          */
 972         u8 mlo_capable_flags;
 973
 974         struct completion restart_completed;
 975
 976 #ifdef CONFIG_ACPI
 977
 978         struct {
 979                 bool started;
 980                 u32 func_bit;
 981                 bool acpi_tas_enable;
 982                 bool acpi_bios_sar_enable;
 983                 u8 tas_cfg[ATH12K_ACPI_DSM_TAS_CFG_SIZE];
 984                 u8 tas_sar_power_table[ATH12K_ACPI_DSM_TAS_DATA_SIZE];
 985                 u8 bios_sar_data[ATH12K_ACPI_DSM_BIOS_SAR_DATA_SIZE];
 986                 u8 geo_offset_data[ATH12K_ACPI_DSM_GEO_OFFSET_DATA_SIZE];
 987                 u8 cca_data[ATH12K_ACPI_DSM_CCA_DATA_SIZE];
 988                 u8 band_edge_power[ATH12K_ACPI_DSM_BAND_EDGE_DATA_SIZE];
 989         } acpi;
 990
 991 #endif /* CONFIG_ACPI */
 992
 993         struct notifier_block panic_nb;
 994
 995         /* must be last */
 996         u8 drv_priv[] __aligned(sizeof(void *));
 997 };
 998
 999 struct ath12k_pdev_map {
1000         struct ath12k_base *ab;
1001         u8 pdev_idx;
1002 };
1003
1004 int ath12k_core_qmi_firmware_ready(struct ath12k_base *ab);
1005 int ath12k_core_pre_init(struct ath12k_base *ab);
1006 int ath12k_core_init(struct ath12k_base *ath12k);
1007 void ath12k_core_deinit(struct ath12k_base *ath12k);
1008 struct ath12k_base *ath12k_core_alloc(struct device *dev, size_t priv_size,
1009                                       enum ath12k_bus bus);
1010 void ath12k_core_free(struct ath12k_base *ath12k);
1011 int ath12k_core_fetch_board_data_api_1(struct ath12k_base *ab,
1012                                        struct ath12k_board_data *bd,
1013                                        char *filename);
1014 int ath12k_core_fetch_bdf(struct ath12k_base *ath12k,
1015                           struct ath12k_board_data *bd);
1016 void ath12k_core_free_bdf(struct ath12k_base *ab, struct ath12k_board_data *bd);
1017 int ath12k_core_fetch_regdb(struct ath12k_base *ab, struct ath12k_board_data *bd);
1018 int ath12k_core_check_dt(struct ath12k_base *ath12k);
1019 int ath12k_core_check_smbios(struct ath12k_base *ab);
1020 void ath12k_core_halt(struct ath12k *ar);
1021 int ath12k_core_resume_early(struct ath12k_base *ab);
1022 int ath12k_core_resume(struct ath12k_base *ab);
1023 int ath12k_core_suspend(struct ath12k_base *ab);
1024 int ath12k_core_suspend_late(struct ath12k_base *ab);
1025
1026 const struct firmware *ath12k_core_firmware_request(struct ath12k_base *ab,
1027                                                     const char *filename);
1028 u32 ath12k_core_get_max_station_per_radio(struct ath12k_base *ab);
1029 u32 ath12k_core_get_max_peers_per_radio(struct ath12k_base *ab);
1030 u32 ath12k_core_get_max_num_tids(struct ath12k_base *ab);
1031
1032 static inline const char *ath12k_scan_state_str(enum ath12k_scan_state state)
1033 {
1034         switch (state) {
1035         case ATH12K_SCAN_IDLE:
1036                 return "idle";
1037         case ATH12K_SCAN_STARTING:
1038                 return "starting";
1039         case ATH12K_SCAN_RUNNING:
1040                 return "running";
1041         case ATH12K_SCAN_ABORTING:
1042                 return "aborting";
1043         }
1044
1045         return "unknown";
1046 }
1047
1048 static inline struct ath12k_skb_cb *ATH12K_SKB_CB(struct sk_buff *skb)
1049 {
1050         BUILD_BUG_ON(sizeof(struct ath12k_skb_cb) >
1051                      IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
1052         return (struct ath12k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
1053 }
1054
1055 static inline struct ath12k_skb_rxcb *ATH12K_SKB_RXCB(struct sk_buff *skb)
1056 {
1057         BUILD_BUG_ON(sizeof(struct ath12k_skb_rxcb) > sizeof(skb->cb));
1058         return (struct ath12k_skb_rxcb *)skb->cb;
1059 }
1060
1061 static inline struct ath12k_vif *ath12k_vif_to_ahvif(struct ieee80211_vif *vif)
1062 {
1063         return (struct ath12k_vif *)vif->drv_priv;
1064 }
1065
1066 static inline struct ath12k_sta *ath12k_sta_to_ahsta(struct ieee80211_sta *sta)
1067 {
1068         return (struct ath12k_sta *)sta->drv_priv;
1069 }
1070
1071 static inline struct ieee80211_sta *ath12k_ahsta_to_sta(struct ath12k_sta *ahsta)
1072 {
1073         return container_of((void *)ahsta, struct ieee80211_sta, drv_priv);
1074 }
1075
1076 static inline struct ieee80211_vif *ath12k_ahvif_to_vif(struct ath12k_vif *ahvif)
1077 {
1078         return container_of((void *)ahvif, struct ieee80211_vif, drv_priv);
1079 }
1080
1081 static inline struct ath12k *ath12k_ab_to_ar(struct ath12k_base *ab,
1082                                              int mac_id)
1083 {
1084         return ab->pdevs[ath12k_hw_mac_id_to_pdev_id(ab->hw_params, mac_id)].ar;
1085 }
1086
1087 static inline void ath12k_core_create_firmware_path(struct ath12k_base *ab,
1088                                                     const char *filename,
1089                                                     void *buf, size_t buf_len)
1090 {
1091         snprintf(buf, buf_len, "%s/%s/%s", ATH12K_FW_DIR,
1092                  ab->hw_params->fw.dir, filename);
1093 }
1094
1095 static inline const char *ath12k_bus_str(enum ath12k_bus bus)
1096 {
1097         switch (bus) {
1098         case ATH12K_BUS_PCI:
1099                 return "pci";
1100         }
1101
1102         return "unknown";
1103 }
1104
1105 static inline struct ath12k_hw *ath12k_hw_to_ah(struct ieee80211_hw  *hw)
1106 {
1107         return hw->priv;
1108 }
1109
1110 static inline struct ath12k *ath12k_ah_to_ar(struct ath12k_hw *ah, u8 hw_link_id)
1111 {
1112         if (WARN(hw_link_id >= ah->num_radio,
1113                  "bad hw link id %d, so switch to default link\n", hw_link_id))
1114                 hw_link_id = 0;
1115
1116         return &ah->radio[hw_link_id];
1117 }
1118
1119 static inline struct ath12k_hw *ath12k_ar_to_ah(struct ath12k *ar)
1120 {
1121         return ar->ah;
1122 }
1123
1124 static inline struct ieee80211_hw *ath12k_ar_to_hw(struct ath12k *ar)
1125 {
1126         return ar->ah->hw;
1127 }
1128
1129 #define for_each_ar(ah, ar, index) \
1130         for ((index) = 0; ((index) < (ah)->num_radio && \
1131              ((ar) = &(ah)->radio[(index)])); (index)++)
1132 #endif /* _CORE_H_ */