accel/ivpu: Move recovery work to system_unbound_wq
[drm/drm-misc.git] / drivers / net / wireless / ath / ath12k / reg.h
blob29c7ec3260dafe34ffe202b39d105294e93c817a
1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
7 #ifndef ATH12K_REG_H
8 #define ATH12K_REG_H
10 #include <linux/kernel.h>
11 #include <net/regulatory.h>
13 struct ath12k_base;
14 struct ath12k;
16 /* DFS regdomains supported by Firmware */
17 enum ath12k_dfs_region {
18 ATH12K_DFS_REG_UNSET,
19 ATH12K_DFS_REG_FCC,
20 ATH12K_DFS_REG_ETSI,
21 ATH12K_DFS_REG_MKK,
22 ATH12K_DFS_REG_CN,
23 ATH12K_DFS_REG_KR,
24 ATH12K_DFS_REG_MKK_N,
25 ATH12K_DFS_REG_UNDEF,
28 enum ath12k_reg_cc_code {
29 REG_SET_CC_STATUS_PASS = 0,
30 REG_CURRENT_ALPHA2_NOT_FOUND = 1,
31 REG_INIT_ALPHA2_NOT_FOUND = 2,
32 REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
33 REG_SET_CC_STATUS_NO_MEMORY = 4,
34 REG_SET_CC_STATUS_FAIL = 5,
37 struct ath12k_reg_rule {
38 u16 start_freq;
39 u16 end_freq;
40 u16 max_bw;
41 u8 reg_power;
42 u8 ant_gain;
43 u16 flags;
44 bool psd_flag;
45 u16 psd_eirp;
48 struct ath12k_reg_info {
49 enum ath12k_reg_cc_code status_code;
50 u8 num_phy;
51 u8 phy_id;
52 u16 reg_dmn_pair;
53 u16 ctry_code;
54 u8 alpha2[REG_ALPHA2_LEN + 1];
55 u32 dfs_region;
56 u32 phybitmap;
57 bool is_ext_reg_event;
58 u32 min_bw_2g;
59 u32 max_bw_2g;
60 u32 min_bw_5g;
61 u32 max_bw_5g;
62 u32 num_2g_reg_rules;
63 u32 num_5g_reg_rules;
64 struct ath12k_reg_rule *reg_rules_2g_ptr;
65 struct ath12k_reg_rule *reg_rules_5g_ptr;
66 enum wmi_reg_6g_client_type client_type;
67 bool rnr_tpe_usable;
68 bool unspecified_ap_usable;
69 /* TODO: All 6G related info can be stored only for required
70 * combination instead of all types, to optimize memory usage.
72 u8 domain_code_6g_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
73 u8 domain_code_6g_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
74 u32 domain_code_6g_super_id;
75 u32 min_bw_6g_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
76 u32 max_bw_6g_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
77 u32 min_bw_6g_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
78 u32 max_bw_6g_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
79 u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
80 u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
81 struct ath12k_reg_rule *reg_rules_6g_ap_ptr[WMI_REG_CURRENT_MAX_AP_TYPE];
82 struct ath12k_reg_rule *reg_rules_6g_client_ptr
83 [WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
86 /* Phy bitmaps */
87 enum ath12k_reg_phy_bitmap {
88 ATH12K_REG_PHY_BITMAP_NO11AX = BIT(5),
89 ATH12K_REG_PHY_BITMAP_NO11BE = BIT(6),
92 void ath12k_reg_init(struct ieee80211_hw *hw);
93 void ath12k_reg_free(struct ath12k_base *ab);
94 void ath12k_regd_update_work(struct work_struct *work);
95 struct ieee80211_regdomain *ath12k_reg_build_regd(struct ath12k_base *ab,
96 struct ath12k_reg_info *reg_info,
97 bool intersect);
98 int ath12k_regd_update(struct ath12k *ar, bool init);
99 int ath12k_reg_update_chan_list(struct ath12k *ar);
101 #endif