| blob | 10366bbe999999c6dae204738dea24a28b75f91d |
1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6 #ifndef ATH12K_RX_DESC_H
7 #define ATH12K_RX_DESC_H
10 RX_DESC_DECAP_TYPE_RAW,
11 RX_DESC_DECAP_TYPE_NATIVE_WIFI,
12 RX_DESC_DECAP_TYPE_ETHERNET2_DIX,
13 RX_DESC_DECAP_TYPE_8023,
14 };
17 RX_DESC_DECRYPT_STATUS_CODE_OK,
18 RX_DESC_DECRYPT_STATUS_CODE_UNPROTECTED_FRAME,
19 RX_DESC_DECRYPT_STATUS_CODE_DATA_ERR,
20 RX_DESC_DECRYPT_STATUS_CODE_KEY_INVALID,
21 RX_DESC_DECRYPT_STATUS_CODE_PEER_ENTRY_INVALID,
22 RX_DESC_DECRYPT_STATUS_CODE_OTHER,
23 };
25 #define RX_MPDU_START_INFO0_REO_DEST_IND GENMASK(4, 0)
26 #define RX_MPDU_START_INFO0_LMAC_PEER_ID_MSB GENMASK(6, 5)
27 #define RX_MPDU_START_INFO0_FLOW_ID_TOEPLITZ BIT(7)
28 #define RX_MPDU_START_INFO0_PKT_SEL_FP_UCAST_DATA BIT(8)
29 #define RX_MPDU_START_INFO0_PKT_SEL_FP_MCAST_DATA BIT(9)
30 #define RX_MPDU_START_INFO0_PKT_SEL_FP_CTRL_BAR BIT(10)
31 #define RX_MPDU_START_INFO0_RXDMA0_SRC_RING_SEL GENMASK(13, 11)
32 #define RX_MPDU_START_INFO0_RXDMA0_DST_RING_SEL GENMASK(16, 14)
33 #define RX_MPDU_START_INFO0_MCAST_ECHO_DROP_EN BIT(17)
34 #define RX_MPDU_START_INFO0_WDS_LEARN_DETECT_EN BIT(18)
35 #define RX_MPDU_START_INFO0_INTRA_BSS_CHECK_EN BIT(19)
36 #define RX_MPDU_START_INFO0_USE_PPE BIT(20)
37 #define RX_MPDU_START_INFO0_PPE_ROUTING_EN BIT(21)
39 #define RX_MPDU_START_INFO1_REO_QUEUE_DESC_HI GENMASK(7, 0)
40 #define RX_MPDU_START_INFO1_RECV_QUEUE_NUM GENMASK(23, 8)
41 #define RX_MPDU_START_INFO1_PRE_DELIM_ERR_WARN BIT(24)
42 #define RX_MPDU_START_INFO1_FIRST_DELIM_ERR BIT(25)
44 #define RX_MPDU_START_INFO2_EPD_EN BIT(0)
45 #define RX_MPDU_START_INFO2_ALL_FRAME_ENCPD BIT(1)
46 #define RX_MPDU_START_INFO2_ENC_TYPE GENMASK(5, 2)
47 #define RX_MPDU_START_INFO2_VAR_WEP_KEY_WIDTH GENMASK(7, 6)
48 #define RX_MPDU_START_INFO2_MESH_STA GENMASK(9, 8)
49 #define RX_MPDU_START_INFO2_BSSID_HIT BIT(10)
50 #define RX_MPDU_START_INFO2_BSSID_NUM GENMASK(14, 11)
51 #define RX_MPDU_START_INFO2_TID GENMASK(18, 15)
53 #define RX_MPDU_START_INFO3_RXPCU_MPDU_FLTR GENMASK(1, 0)
54 #define RX_MPDU_START_INFO3_SW_FRAME_GRP_ID GENMASK(8, 2)
55 #define RX_MPDU_START_INFO3_NDP_FRAME BIT(9)
56 #define RX_MPDU_START_INFO3_PHY_ERR BIT(10)
57 #define RX_MPDU_START_INFO3_PHY_ERR_MPDU_HDR BIT(11)
58 #define RX_MPDU_START_INFO3_PROTO_VER_ERR BIT(12)
59 #define RX_MPDU_START_INFO3_AST_LOOKUP_VALID BIT(13)
60 #define RX_MPDU_START_INFO3_RANGING BIT(14)
62 #define RX_MPDU_START_INFO4_MPDU_FCTRL_VALID BIT(0)
63 #define RX_MPDU_START_INFO4_MPDU_DUR_VALID BIT(1)
64 #define RX_MPDU_START_INFO4_MAC_ADDR1_VALID BIT(2)
65 #define RX_MPDU_START_INFO4_MAC_ADDR2_VALID BIT(3)
66 #define RX_MPDU_START_INFO4_MAC_ADDR3_VALID BIT(4)
67 #define RX_MPDU_START_INFO4_MAC_ADDR4_VALID BIT(5)
68 #define RX_MPDU_START_INFO4_MPDU_SEQ_CTRL_VALID BIT(6)
69 #define RX_MPDU_START_INFO4_MPDU_QOS_CTRL_VALID BIT(7)
70 #define RX_MPDU_START_INFO4_MPDU_HT_CTRL_VALID BIT(8)
71 #define RX_MPDU_START_INFO4_ENCRYPT_INFO_VALID BIT(9)
72 #define RX_MPDU_START_INFO4_MPDU_FRAG_NUMBER GENMASK(13, 10)
73 #define RX_MPDU_START_INFO4_MORE_FRAG_FLAG BIT(14)
74 #define RX_MPDU_START_INFO4_FROM_DS BIT(16)
75 #define RX_MPDU_START_INFO4_TO_DS BIT(17)
76 #define RX_MPDU_START_INFO4_ENCRYPTED BIT(18)
77 #define RX_MPDU_START_INFO4_MPDU_RETRY BIT(19)
78 #define RX_MPDU_START_INFO4_MPDU_SEQ_NUM GENMASK(31, 20)
80 #define RX_MPDU_START_INFO5_KEY_ID GENMASK(7, 0)
81 #define RX_MPDU_START_INFO5_NEW_PEER_ENTRY BIT(8)
82 #define RX_MPDU_START_INFO5_DECRYPT_NEEDED BIT(9)
83 #define RX_MPDU_START_INFO5_DECAP_TYPE GENMASK(11, 10)
84 #define RX_MPDU_START_INFO5_VLAN_TAG_C_PADDING BIT(12)
85 #define RX_MPDU_START_INFO5_VLAN_TAG_S_PADDING BIT(13)
86 #define RX_MPDU_START_INFO5_STRIP_VLAN_TAG_C BIT(14)
87 #define RX_MPDU_START_INFO5_STRIP_VLAN_TAG_S BIT(15)
88 #define RX_MPDU_START_INFO5_PRE_DELIM_COUNT GENMASK(27, 16)
89 #define RX_MPDU_START_INFO5_AMPDU_FLAG BIT(28)
90 #define RX_MPDU_START_INFO5_BAR_FRAME BIT(29)
91 #define RX_MPDU_START_INFO5_RAW_MPDU BIT(30)
93 #define RX_MPDU_START_INFO6_MPDU_LEN GENMASK(13, 0)
94 #define RX_MPDU_START_INFO6_FIRST_MPDU BIT(14)
95 #define RX_MPDU_START_INFO6_MCAST_BCAST BIT(15)
96 #define RX_MPDU_START_INFO6_AST_IDX_NOT_FOUND BIT(16)
97 #define RX_MPDU_START_INFO6_AST_IDX_TIMEOUT BIT(17)
98 #define RX_MPDU_START_INFO6_POWER_MGMT BIT(18)
99 #define RX_MPDU_START_INFO6_NON_QOS BIT(19)
100 #define RX_MPDU_START_INFO6_NULL_DATA BIT(20)
101 #define RX_MPDU_START_INFO6_MGMT_TYPE BIT(21)
102 #define RX_MPDU_START_INFO6_CTRL_TYPE BIT(22)
103 #define RX_MPDU_START_INFO6_MORE_DATA BIT(23)
104 #define RX_MPDU_START_INFO6_EOSP BIT(24)
105 #define RX_MPDU_START_INFO6_FRAGMENT BIT(25)
106 #define RX_MPDU_START_INFO6_ORDER BIT(26)
107 #define RX_MPDU_START_INFO6_UAPSD_TRIGGER BIT(27)
108 #define RX_MPDU_START_INFO6_ENCRYPT_REQUIRED BIT(28)
109 #define RX_MPDU_START_INFO6_DIRECTED BIT(29)
110 #define RX_MPDU_START_INFO6_AMSDU_PRESENT BIT(30)
112 #define RX_MPDU_START_INFO7_VDEV_ID GENMASK(7, 0)
113 #define RX_MPDU_START_INFO7_SERVICE_CODE GENMASK(16, 8)
114 #define RX_MPDU_START_INFO7_PRIORITY_VALID BIT(17)
115 #define RX_MPDU_START_INFO7_SRC_INFO GENMASK(29, 18)
117 #define RX_MPDU_START_INFO8_AUTH_TO_SEND_WDS BIT(0)
120 __le32 info0;
121 __le32 reo_queue_desc_lo;
122 __le32 info1;
124 __le32 info2;
125 __le32 peer_meta_data;
126 __le16 info3;
127 __le16 phy_ppdu_id;
128 __le16 ast_index;
129 __le16 sw_peer_id;
130 __le32 info4;
131 __le32 info5;
132 __le32 info6;
133 __le16 frame_ctrl;
134 __le16 duration;
138 __le16 seq_ctrl;
140 __le16 qos_ctrl;
141 __le32 ht_ctrl;
142 __le32 info7;
145 __le32 info8;
146 __le32 res0;
147 __le32 res1;
150 #define QCN9274_MPDU_START_SELECT_MPDU_START_TAG BIT(0)
151 #define QCN9274_MPDU_START_SELECT_INFO0_REO_QUEUE_DESC_LO BIT(1)
152 #define QCN9274_MPDU_START_SELECT_INFO1_PN_31_0 BIT(2)
153 #define QCN9274_MPDU_START_SELECT_PN_95_32 BIT(3)
154 #define QCN9274_MPDU_START_SELECT_PN_127_96_INFO2 BIT(4)
155 #define QCN9274_MPDU_START_SELECT_PEER_MDATA_INFO3_PHY_PPDU_ID BIT(5)
156 #define QCN9274_MPDU_START_SELECT_AST_IDX_SW_PEER_ID_INFO4 BIT(6)
157 #define QCN9274_MPDU_START_SELECT_INFO5_INFO6 BIT(7)
158 #define QCN9274_MPDU_START_SELECT_FRAME_CTRL_DURATION_ADDR1_31_0 BIT(8)
159 #define QCN9274_MPDU_START_SELECT_ADDR2_47_0_ADDR1_47_32 BIT(9)
160 #define QCN9274_MPDU_START_SELECT_ADDR3_47_0_SEQ_CTRL BIT(10)
161 #define QCN9274_MPDU_START_SELECT_ADDR4_47_0_QOS_CTRL BIT(11)
162 #define QCN9274_MPDU_START_SELECT_HT_CTRL_INFO7 BIT(12)
163 #define QCN9274_MPDU_START_SELECT_ML_ADDR1_47_0_ML_ADDR2_15_0 BIT(13)
164 #define QCN9274_MPDU_START_SELECT_ML_ADDR2_47_16_INFO8 BIT(14)
165 #define QCN9274_MPDU_START_SELECT_RES_0_RES_1 BIT(15)
167 #define QCN9274_MPDU_START_WMASK (QCN9274_MPDU_START_SELECT_INFO1_PN_31_0 | \
168 QCN9274_MPDU_START_SELECT_PN_95_32 | \
169 QCN9274_MPDU_START_SELECT_PN_127_96_INFO2 | \
170 QCN9274_MPDU_START_SELECT_PEER_MDATA_INFO3_PHY_PPDU_ID | \
171 QCN9274_MPDU_START_SELECT_AST_IDX_SW_PEER_ID_INFO4 | \
172 QCN9274_MPDU_START_SELECT_INFO5_INFO6 | \
173 QCN9274_MPDU_START_SELECT_FRAME_CTRL_DURATION_ADDR1_31_0 | \
174 QCN9274_MPDU_START_SELECT_ADDR2_47_0_ADDR1_47_32 | \
175 QCN9274_MPDU_START_SELECT_ADDR3_47_0_SEQ_CTRL | \
176 QCN9274_MPDU_START_SELECT_ADDR4_47_0_QOS_CTRL)
178 /* The below rx_mpdu_start_qcn9274_compact structure is tied with the mask
179 * value QCN9274_MPDU_START_WMASK. If the mask value changes the structure
180 * will also change.
181 */
184 __le32 info1;
186 __le32 info2;
187 __le32 peer_meta_data;
188 __le16 info3;
189 __le16 phy_ppdu_id;
190 __le16 ast_index;
191 __le16 sw_peer_id;
192 __le32 info4;
193 __le32 info5;
194 __le32 info6;
195 __le16 frame_ctrl;
196 __le16 duration;
200 __le16 seq_ctrl;
202 __le16 qos_ctrl;
205 /* rx_mpdu_start
206 *
207 * reo_destination_indication
208 * The id of the reo exit ring where the msdu frame shall push
209 * after (MPDU level) reordering has finished. Values are defined
210 * in enum %HAL_RX_MSDU_DESC_REO_DEST_IND_.
211 *
212 * lmac_peer_id_msb
213 *
214 * If use_flow_id_toeplitz_clfy is set and lmac_peer_id_'sb
215 * is 2'b00, Rx OLE uses a REO destination indicati'n of {1'b1,
216 * hash[3:0]} using the chosen Toeplitz hash from Common Parser
217 * if flow search fails.
218 * If use_flow_id_toeplitz_clfy is set and lmac_peer_id_msb
219 * 's not 2'b00, Rx OLE uses a REO destination indication of
220 * {lmac_peer_id_msb, hash[2:0]} using the chosen Toeplitz
221 * hash from Common Parser if flow search fails.
222 *
223 * use_flow_id_toeplitz_clfy
224 * Indication to Rx OLE to enable REO destination routing based
225 * on the chosen Toeplitz hash from Common Parser, in case
226 * flow search fails
227 *
228 * pkt_selection_fp_ucast_data
229 * Filter pass Unicast data frame (matching rxpcu_filter_pass
230 * and sw_frame_group_Unicast_data) routing selection
231 *
232 * pkt_selection_fp_mcast_data
233 * Filter pass Multicast data frame (matching rxpcu_filter_pass
234 * and sw_frame_group_Multicast_data) routing selection
235 *
236 * pkt_selection_fp_ctrl_bar
237 * Filter pass BAR frame (matching rxpcu_filter_pass
238 * and sw_frame_group_ctrl_1000) routing selection
239 *
240 * rxdma0_src_ring_selection
241 * Field only valid when for the received frame type the corresponding
242 * pkt_selection_fp_... bit is set
243 *
244 * rxdma0_dst_ring_selection
245 * Field only valid when for the received frame type the corresponding
246 * pkt_selection_fp_... bit is set
247 *
248 * mcast_echo_drop_enable
249 * If set, for multicast packets, multicast echo check (i.e.
250 * SA search with mcast_echo_check = 1) shall be performed
251 * by RXOLE, and any multicast echo packets should be indicated
252 * to RXDMA for release to WBM
253 *
254 * wds_learning_detect_en
255 * If set, WDS learning detection based on SA search and notification
256 * to FW (using RXDMA0 status ring) is enabled and the "timestamp"
257 * field in address search failure cache-only entry should
258 * be used to avoid multiple WDS learning notifications.
259 *
260 * intrabss_check_en
261 * If set, intra-BSS routing detection is enabled
262 *
263 * use_ppe
264 * Indicates to RXDMA to ignore the REO_destination_indication
265 * and use a programmed value corresponding to the REO2PPE
266 * ring
267 * This override to REO2PPE for packets requiring multiple
268 * buffers shall be disabled based on an RXDMA configuration,
269 * as PPE may not support such packets.
270 *
271 * Supported only in full AP chips, not in client/soft
272 * chips
273 *
274 * ppe_routing_enable
275 * Global enable/disable bit for routing to PPE, used to disable
276 * PPE routing even if RXOLE CCE or flow search indicate 'Use_PPE'
277 * This is set by SW for peers which are being handled by a
278 * host SW/accelerator subsystem that also handles packet
279 * buffer management for WiFi-to-PPE routing.
280 *
281 * This is cleared by SW for peers which are being handled
282 * by a different subsystem, completely disabling WiFi-to-PPE
283 * routing for such peers.
284 *
285 * rx_reo_queue_desc_addr_lo
286 * Address (lower 32 bits) of the REO queue descriptor.
287 *
288 * rx_reo_queue_desc_addr_hi
289 * Address (upper 8 bits) of the REO queue descriptor.
290 *
291 * receive_queue_number
292 * Indicates the MPDU queue ID to which this MPDU link
293 * descriptor belongs.
294 *
295 * pre_delim_err_warning
296 * Indicates that a delimiter FCS error was found in between the
297 * previous MPDU and this MPDU. Note that this is just a warning,
298 * and does not mean that this MPDU is corrupted in any way. If
299 * it is, there will be other errors indicated such as FCS or
300 * decrypt errors.
301 *
302 * first_delim_err
303 * Indicates that the first delimiter had a FCS failure.
304 *
305 * pn
306 * The PN number.
307 *
308 * epd_en
309 * Field only valid when AST_based_lookup_valid == 1.
310 * In case of ndp or phy_err or AST_based_lookup_valid == 0,
311 * this field will be set to 0
312 * If set to one use EPD instead of LPD
313 * In case of ndp or phy_err, this field will never be set.
314 *
315 * all_frames_shall_be_encrypted
316 * In case of ndp or phy_err or AST_based_lookup_valid == 0,
317 * this field will be set to 0
318 *
319 * When set, all frames (data only ?) shall be encrypted. If
320 * not, RX CRYPTO shall set an error flag.
321 *
322 *
323 * encrypt_type
324 * In case of ndp or phy_err or AST_based_lookup_valid == 0,
325 * this field will be set to 0
326 *
327 * Indicates type of decrypt cipher used (as defined in the
328 * peer entry)
329 *
330 * wep_key_width_for_variable_key
331 *
332 * Field only valid when key_type is set to wep_varied_width.
333 *
334 * mesh_sta
335 *
336 * bssid_hit
337 * When set, the BSSID of the incoming frame matched one of
338 * the 8 BSSID register values
339 * bssid_number
340 * Field only valid when bssid_hit is set.
341 * This number indicates which one out of the 8 BSSID register
342 * values matched the incoming frame
343 *
344 * tid
345 * Field only valid when mpdu_qos_control_valid is set
346 * The TID field in the QoS control field
347 *
348 * peer_meta_data
349 * Meta data that SW has programmed in the Peer table entry
350 * of the transmitting STA.
351 *
352 * rxpcu_mpdu_filter_in_category
353 * Field indicates what the reason was that this mpdu frame
354 * was allowed to come into the receive path by rxpcu. Values
355 * are defined in enum %RX_DESC_RXPCU_FILTER_*.
356 *
357 * sw_frame_group_id
358 * SW processes frames based on certain classifications. Values
359 * are defined in enum %RX_DESC_SW_FRAME_GRP_ID_*.
360 *
361 * ndp_frame
362 * When set, the received frame was an NDP frame, and thus
363 * there will be no MPDU data.
364 * phy_err
365 * When set, a PHY error was received before MAC received any
366 * data, and thus there will be no MPDU data.
367 *
368 * phy_err_during_mpdu_header
369 * When set, a PHY error was received before MAC received the
370 * complete MPDU header which was needed for proper decoding
371 *
372 * protocol_version_err
373 * Set when RXPCU detected a version error in the Frame control
374 * field
375 *
376 * ast_based_lookup_valid
377 * When set, AST based lookup for this frame has found a valid
378 * result.
379 *
380 * ranging
381 * When set, a ranging NDPA or a ranging NDP was received.
382 *
383 * phy_ppdu_id
384 * A ppdu counter value that PHY increments for every PPDU
385 * received. The counter value wraps around.
386 *
387 * ast_index
388 *
389 * This field indicates the index of the AST entry corresponding
390 * to this MPDU. It is provided by the GSE module instantiated
391 * in RXPCU.
392 * A value of 0xFFFF indicates an invalid AST index, meaning
393 * that No AST entry was found or NO AST search was performed
394 *
395 * sw_peer_id
396 * In case of ndp or phy_err or AST_based_lookup_valid == 0,
397 * this field will be set to 0
398 * This field indicates a unique peer identifier. It is set
399 * equal to field 'sw_peer_id' from the AST entry
400 *
401 * frame_control_valid
402 * When set, the field Mpdu_Frame_control_field has valid information
403 *
404 * frame_duration_valid
405 * When set, the field Mpdu_duration_field has valid information
406 *
407 * mac_addr_ad1..4_valid
408 * When set, the fields mac_addr_adx_..... have valid information
409 *
410 * mpdu_seq_ctrl_valid
411 *
412 * When set, the fields mpdu_sequence_control_field and mpdu_sequence_number
413 * have valid information as well as field
414 * For MPDUs without a sequence control field, this field will
415 * not be set.
416 *
417 * mpdu_qos_ctrl_valid, mpdu_ht_ctrl_valid
418 *
419 * When set, the field mpdu_qos_control_field, mpdu_ht_control has valid
420 * information, For MPDUs without a QoS,HT control field, this field
421 * will not be set.
422 *
423 * frame_encryption_info_valid
424 *
425 * When set, the encryption related info fields, like IV and
426 * PN are valid
427 * For MPDUs that are not encrypted, this will not be set.
428 *
429 * mpdu_fragment_number
430 *
431 * Field only valid when Mpdu_sequence_control_valid is set
432 * AND Fragment_flag is set. The fragment number from the 802.11 header
433 *
434 * more_fragment_flag
435 *
436 * The More Fragment bit setting from the MPDU header of the
437 * received frame
438 *
439 * fr_ds
440 *
441 * Field only valid when Mpdu_frame_control_valid is set
442 * Set if the from DS bit is set in the frame control.
443 *
444 * to_ds
445 *
446 * Field only valid when Mpdu_frame_control_valid is set
447 * Set if the to DS bit is set in the frame control.
448 *
449 * encrypted
450 *
451 * Field only valid when Mpdu_frame_control_valid is set.
452 * Protected bit from the frame control.
453 *
454 * mpdu_retry
455 * Field only valid when Mpdu_frame_control_valid is set.
456 * Retry bit from the frame control. Only valid when first_msdu is set
457 *
458 * mpdu_sequence_number
459 * Field only valid when Mpdu_sequence_control_valid is set.
460 *
461 * The sequence number from the 802.11 header.
462 * key_id
463 * The key ID octet from the IV.
464 * Field only valid when Frame_encryption_info_valid is set
465 *
466 * new_peer_entry
467 * Set if new RX_PEER_ENTRY TLV follows. If clear, RX_PEER_ENTRY
468 * doesn't follow so RX DECRYPTION module either uses old peer
469 * entry or not decrypt.
470 *
471 * decrypt_needed
472 * When RXPCU sets bit 'ast_index_not_found or ast_index_timeout',
473 * RXPCU will also ensure that this bit is NOT set. CRYPTO for that
474 * reason only needs to evaluate this bit and non of the other ones
475 *
476 * decap_type
477 * Used by the OLE during decapsulation. Values are defined in
478 * enum %MPDU_START_DECAP_TYPE_*.
479 *
480 * rx_insert_vlan_c_tag_padding
481 * rx_insert_vlan_s_tag_padding
482 * Insert 4 byte of all zeros as VLAN tag or double VLAN tag if
483 * the rx payload does not have VLAN.
484 *
485 * strip_vlan_c_tag_decap
486 * strip_vlan_s_tag_decap
487 * Strip VLAN or double VLAN during decapsulation.
488 *
489 * pre_delim_count
490 * The number of delimiters before this MPDU. Note that this
491 * number is cleared at PPDU start. If this MPDU is the first
492 * received MPDU in the PPDU and this MPDU gets filtered-in,
493 * this field will indicate the number of delimiters located
494 * after the last MPDU in the previous PPDU.
495 *
496 * If this MPDU is located after the first received MPDU in
497 * an PPDU, this field will indicate the number of delimiters
498 * located between the previous MPDU and this MPDU.
499 *
500 * ampdu_flag
501 * Received frame was part of an A-MPDU.
502 *
503 * bar_frame
504 * Received frame is a BAR frame
505 *
506 * raw_mpdu
507 * Set when no 802.11 to nwifi/ethernet hdr conversion is done
508 *
509 * mpdu_length
510 * MPDU length before decapsulation.
511 *
512 * first_mpdu
513 * Indicates the first MSDU of the PPDU. If both first_mpdu
514 * and last_mpdu are set in the MSDU then this is a not an
515 * A-MPDU frame but a stand alone MPDU. Interior MPDU in an
516 * A-MPDU shall have both first_mpdu and last_mpdu bits set to
517 * 0. The PPDU start status will only be valid when this bit
518 * is set.
519 *
520 * mcast_bcast
521 * Multicast / broadcast indicator. Only set when the MAC
522 * address 1 bit 0 is set indicating mcast/bcast and the BSSID
523 * matches one of the 4 BSSID registers. Only set when
524 * first_msdu is set.
525 *
526 * ast_index_not_found
527 * Only valid when first_msdu is set. Indicates no AST matching
528 * entries within the max search count.
529 *
530 * ast_index_timeout
531 * Only valid when first_msdu is set. Indicates an unsuccessful
532 * search in the address search table due to timeout.
533 *
534 * power_mgmt
535 * Power management bit set in the 802.11 header. Only set
536 * when first_msdu is set.
537 *
538 * non_qos
539 * Set if packet is not a non-QoS data frame. Only set when
540 * first_msdu is set.
541 *
542 * null_data
543 * Set if frame type indicates either null data or QoS null
544 * data format. Only set when first_msdu is set.
545 *
546 * mgmt_type
547 * Set if packet is a management packet. Only set when
548 * first_msdu is set.
549 *
550 * ctrl_type
551 * Set if packet is a control packet. Only set when first_msdu
552 * is set.
553 *
554 * more_data
555 * Set if more bit in frame control is set. Only set when
556 * first_msdu is set.
557 *
558 * eosp
559 * Set if the EOSP (end of service period) bit in the QoS
560 * control field is set. Only set when first_msdu is set.
561 *
562 *
563 * fragment_flag
564 * Fragment indication
565 *
566 * order
567 * Set if the order bit in the frame control is set. Only
568 * set when first_msdu is set.
569 *
570 * u_apsd_trigger
571 * U-APSD trigger frame
572 *
573 * encrypt_required
574 * Indicates that this data type frame is not encrypted even if
575 * the policy for this MPDU requires encryption as indicated in
576 * the peer table key type.
577 *
578 * directed
579 * MPDU is a directed packet which means that the RA matched
580 * our STA addresses. In proxySTA it means that the TA matched
581 * an entry in our address search table with the corresponding
582 * 'no_ack' bit is the address search entry cleared.
583 * amsdu_present
584 * AMSDU present
585 *
586 * mpdu_frame_control_field
587 * Frame control field in header. Only valid when the field is marked valid.
588 *
589 * mpdu_duration_field
590 * Duration field in header. Only valid when the field is marked valid.
591 *
592 * mac_addr_adx
593 * MAC addresses in the received frame. Only valid when corresponding
594 * address valid bit is set
595 *
596 * mpdu_qos_control_field, mpdu_ht_control_field
597 * QoS/HT control fields from header. Valid only when corresponding fields
598 * are marked valid
599 *
600 * vdev_id
601 * Virtual device associated with this peer
602 * RXOLE uses this to determine intra-BSS routing.
603 *
604 * service_code
605 * Opaque service code between PPE and Wi-Fi
606 * This field gets passed on by REO to PPE in the EDMA descriptor
607 * ('REO_TO_PPE_RING').
608 *
609 * priority_valid
610 * This field gets passed on by REO to PPE in the EDMA descriptor
611 * ('REO_TO_PPE_RING').
612 *
613 * src_info
614 * Source (virtual) device/interface info. associated with
615 * this peer
616 * This field gets passed on by REO to PPE in the EDMA descriptor
617 * ('REO_TO_PPE_RING').
618 *
619 * multi_link_addr_ad1_ad2_valid
620 * If set, Rx OLE shall convert Address1 and Address2 of received
621 * data frames to multi-link addresses during decapsulation to eth/nwifi
622 *
623 * multi_link_addr_ad1,ad2
624 * Multi-link receiver address1,2. Only valid when corresponding
625 * valid bit is set
626 *
627 * authorize_to_send_wds
628 * If not set, RXDMA shall perform error-routing for WDS packets
629 * as the sender is not authorized and might misuse WDS frame
630 * format to inject packets with arbitrary DA/SA.
631 *
632 */
635 RX_MSDU_START_PKT_TYPE_11A,
636 RX_MSDU_START_PKT_TYPE_11B,
637 RX_MSDU_START_PKT_TYPE_11N,
638 RX_MSDU_START_PKT_TYPE_11AC,
639 RX_MSDU_START_PKT_TYPE_11AX,
640 };
643 RX_MSDU_START_SGI_0_8_US,
644 RX_MSDU_START_SGI_0_4_US,
645 RX_MSDU_START_SGI_1_6_US,
646 RX_MSDU_START_SGI_3_2_US,
647 };
650 RX_MSDU_START_RECV_BW_20MHZ,
651 RX_MSDU_START_RECV_BW_40MHZ,
652 RX_MSDU_START_RECV_BW_80MHZ,
653 RX_MSDU_START_RECV_BW_160MHZ,
654 };
657 RX_MSDU_START_RECEPTION_TYPE_SU,
658 RX_MSDU_START_RECEPTION_TYPE_DL_MU_MIMO,
659 RX_MSDU_START_RECEPTION_TYPE_DL_MU_OFDMA,
660 RX_MSDU_START_RECEPTION_TYPE_DL_MU_OFDMA_MIMO,
661 RX_MSDU_START_RECEPTION_TYPE_UL_MU_MIMO,
662 RX_MSDU_START_RECEPTION_TYPE_UL_MU_OFDMA,
663 RX_MSDU_START_RECEPTION_TYPE_UL_MU_OFDMA_MIMO,
664 };
666 #define RX_MSDU_END_64_TLV_SRC_LINK_ID GENMASK(24, 22)
668 #define RX_MSDU_END_INFO0_RXPCU_MPDU_FITLER GENMASK(1, 0)
669 #define RX_MSDU_END_INFO0_SW_FRAME_GRP_ID GENMASK(8, 2)
671 #define RX_MSDU_END_INFO1_REPORTED_MPDU_LENGTH GENMASK(13, 0)
673 #define RX_MSDU_END_INFO2_CCE_SUPER_RULE GENMASK(13, 8)
674 #define RX_MSDU_END_INFO2_CCND_TRUNCATE BIT(14)
675 #define RX_MSDU_END_INFO2_CCND_CCE_DIS BIT(15)
677 #define RX_MSDU_END_INFO3_DA_OFFSET GENMASK(5, 0)
678 #define RX_MSDU_END_INFO3_SA_OFFSET GENMASK(11, 6)
679 #define RX_MSDU_END_INFO3_DA_OFFSET_VALID BIT(12)
680 #define RX_MSDU_END_INFO3_SA_OFFSET_VALID BIT(13)
682 #define RX_MSDU_END_INFO4_TCP_FLAG GENMASK(8, 0)
683 #define RX_MSDU_END_INFO4_LRO_ELIGIBLE BIT(9)
685 #define RX_MSDU_END_INFO5_SA_IDX_TIMEOUT BIT(0)
686 #define RX_MSDU_END_INFO5_DA_IDX_TIMEOUT BIT(1)
687 #define RX_MSDU_END_INFO5_TO_DS BIT(2)
688 #define RX_MSDU_END_INFO5_TID GENMASK(6, 3)
689 #define RX_MSDU_END_INFO5_SA_IS_VALID BIT(7)
690 #define RX_MSDU_END_INFO5_DA_IS_VALID BIT(8)
691 #define RX_MSDU_END_INFO5_DA_IS_MCBC BIT(9)
692 #define RX_MSDU_END_INFO5_L3_HDR_PADDING GENMASK(11, 10)
693 #define RX_MSDU_END_INFO5_FIRST_MSDU BIT(12)
694 #define RX_MSDU_END_INFO5_LAST_MSDU BIT(13)
695 #define RX_MSDU_END_INFO5_FROM_DS BIT(14)
696 #define RX_MSDU_END_INFO5_IP_CHKSUM_FAIL_COPY BIT(15)
698 #define RX_MSDU_END_INFO6_MSDU_DROP BIT(0)
699 #define RX_MSDU_END_INFO6_REO_DEST_IND GENMASK(5, 1)
700 #define RX_MSDU_END_INFO6_FLOW_IDX GENMASK(25, 6)
701 #define RX_MSDU_END_INFO6_USE_PPE BIT(26)
702 #define RX_MSDU_END_INFO6_MESH_STA GENMASK(28, 27)
703 #define RX_MSDU_END_INFO6_VLAN_CTAG_STRIPPED BIT(29)
704 #define RX_MSDU_END_INFO6_VLAN_STAG_STRIPPED BIT(30)
705 #define RX_MSDU_END_INFO6_FRAGMENT_FLAG BIT(31)
707 #define RX_MSDU_END_INFO7_AGGR_COUNT GENMASK(7, 0)
708 #define RX_MSDU_END_INFO7_FLOW_AGGR_CONTN BIT(8)
709 #define RX_MSDU_END_INFO7_FISA_TIMEOUT BIT(9)
711 #define RX_MSDU_END_INFO7_TCPUDP_CSUM_FAIL_CPY BIT(10)
712 #define RX_MSDU_END_INFO7_MSDU_LIMIT_ERROR BIT(11)
713 #define RX_MSDU_END_INFO7_FLOW_IDX_TIMEOUT BIT(12)
714 #define RX_MSDU_END_INFO7_FLOW_IDX_INVALID BIT(13)
715 #define RX_MSDU_END_INFO7_CCE_MATCH BIT(14)
716 #define RX_MSDU_END_INFO7_AMSDU_PARSER_ERR BIT(15)
718 #define RX_MSDU_END_INFO8_KEY_ID GENMASK(7, 0)
720 #define RX_MSDU_END_INFO9_SERVICE_CODE GENMASK(14, 6)
721 #define RX_MSDU_END_INFO9_PRIORITY_VALID BIT(15)
722 #define RX_MSDU_END_INFO9_INRA_BSS BIT(16)
723 #define RX_MSDU_END_INFO9_DEST_CHIP_ID GENMASK(18, 17)
724 #define RX_MSDU_END_INFO9_MCAST_ECHO BIT(19)
725 #define RX_MSDU_END_INFO9_WDS_LEARN_EVENT BIT(20)
726 #define RX_MSDU_END_INFO9_WDS_ROAM_EVENT BIT(21)
727 #define RX_MSDU_END_INFO9_WDS_KEEP_ALIVE_EVENT BIT(22)
729 #define RX_MSDU_END_INFO10_MSDU_LENGTH GENMASK(13, 0)
730 #define RX_MSDU_END_INFO10_STBC BIT(14)
731 #define RX_MSDU_END_INFO10_IPSEC_ESP BIT(15)
732 #define RX_MSDU_END_INFO10_L3_OFFSET GENMASK(22, 16)
733 #define RX_MSDU_END_INFO10_IPSEC_AH BIT(23)
734 #define RX_MSDU_END_INFO10_L4_OFFSET GENMASK(31, 24)
736 #define RX_MSDU_END_INFO11_MSDU_NUMBER GENMASK(7, 0)
737 #define RX_MSDU_END_INFO11_DECAP_FORMAT GENMASK(9, 8)
738 #define RX_MSDU_END_INFO11_IPV4 BIT(10)
739 #define RX_MSDU_END_INFO11_IPV6 BIT(11)
740 #define RX_MSDU_END_INFO11_TCP BIT(12)
741 #define RX_MSDU_END_INFO11_UDP BIT(13)
742 #define RX_MSDU_END_INFO11_IP_FRAG BIT(14)
743 #define RX_MSDU_END_INFO11_TCP_ONLY_ACK BIT(15)
744 #define RX_MSDU_END_INFO11_DA_IS_BCAST_MCAST BIT(16)
745 #define RX_MSDU_END_INFO11_SEL_TOEPLITZ_HASH GENMASK(18, 17)
746 #define RX_MSDU_END_INFO11_IP_FIXED_HDR_VALID BIT(19)
747 #define RX_MSDU_END_INFO11_IP_EXTN_HDR_VALID BIT(20)
748 #define RX_MSDU_END_INFO11_IP_TCP_UDP_HDR_VALID BIT(21)
749 #define RX_MSDU_END_INFO11_MESH_CTRL_PRESENT BIT(22)
750 #define RX_MSDU_END_INFO11_LDPC BIT(23)
751 #define RX_MSDU_END_INFO11_IP4_IP6_NXT_HDR GENMASK(31, 24)
753 #define RX_MSDU_END_INFO12_USER_RSSI GENMASK(7, 0)
754 #define RX_MSDU_END_INFO12_PKT_TYPE GENMASK(11, 8)
755 #define RX_MSDU_END_INFO12_SGI GENMASK(13, 12)
756 #define RX_MSDU_END_INFO12_RATE_MCS GENMASK(17, 14)
757 #define RX_MSDU_END_INFO12_RECV_BW GENMASK(20, 18)
758 #define RX_MSDU_END_INFO12_RECEPTION_TYPE GENMASK(23, 21)
760 #define RX_MSDU_END_INFO12_MIMO_SS_BITMAP GENMASK(30, 24)
761 #define RX_MSDU_END_INFO12_MIMO_DONE_COPY BIT(31)
763 #define RX_MSDU_END_INFO13_FIRST_MPDU BIT(0)
764 #define RX_MSDU_END_INFO13_MCAST_BCAST BIT(2)
765 #define RX_MSDU_END_INFO13_AST_IDX_NOT_FOUND BIT(3)
766 #define RX_MSDU_END_INFO13_AST_IDX_TIMEDOUT BIT(4)
767 #define RX_MSDU_END_INFO13_POWER_MGMT BIT(5)
768 #define RX_MSDU_END_INFO13_NON_QOS BIT(6)
769 #define RX_MSDU_END_INFO13_NULL_DATA BIT(7)
770 #define RX_MSDU_END_INFO13_MGMT_TYPE BIT(8)
771 #define RX_MSDU_END_INFO13_CTRL_TYPE BIT(9)
772 #define RX_MSDU_END_INFO13_MORE_DATA BIT(10)
773 #define RX_MSDU_END_INFO13_EOSP BIT(11)
774 #define RX_MSDU_END_INFO13_A_MSDU_ERROR BIT(12)
775 #define RX_MSDU_END_INFO13_ORDER BIT(14)
776 #define RX_MSDU_END_INFO13_OVERFLOW_ERR BIT(16)
777 #define RX_MSDU_END_INFO13_MSDU_LEN_ERR BIT(17)
778 #define RX_MSDU_END_INFO13_TCP_UDP_CKSUM_FAIL BIT(18)
779 #define RX_MSDU_END_INFO13_IP_CKSUM_FAIL BIT(19)
780 #define RX_MSDU_END_INFO13_SA_IDX_INVALID BIT(20)
781 #define RX_MSDU_END_INFO13_DA_IDX_INVALID BIT(21)
782 #define RX_MSDU_END_INFO13_AMSDU_ADDR_MISMATCH BIT(22)
783 #define RX_MSDU_END_INFO13_RX_IN_TX_DECRYPT_BYP BIT(23)
784 #define RX_MSDU_END_INFO13_ENCRYPT_REQUIRED BIT(24)
785 #define RX_MSDU_END_INFO13_DIRECTED BIT(25)
786 #define RX_MSDU_END_INFO13_BUFFER_FRAGMENT BIT(26)
787 #define RX_MSDU_END_INFO13_MPDU_LEN_ERR BIT(27)
788 #define RX_MSDU_END_INFO13_TKIP_MIC_ERR BIT(28)
789 #define RX_MSDU_END_INFO13_DECRYPT_ERR BIT(29)
790 #define RX_MSDU_END_INFO13_UNDECRYPT_FRAME_ERR BIT(30)
791 #define RX_MSDU_END_INFO13_FCS_ERR BIT(31)
793 #define RX_MSDU_END_INFO13_WIFI_PARSER_ERR BIT(15)
795 #define RX_MSDU_END_INFO14_DECRYPT_STATUS_CODE GENMASK(12, 10)
796 #define RX_MSDU_END_INFO14_RX_BITMAP_NOT_UPDED BIT(13)
797 #define RX_MSDU_END_INFO14_MSDU_DONE BIT(31)
800 __le16 info0;
801 __le16 phy_ppdu_id;
802 __le16 ip_hdr_cksum;
803 __le16 info1;
804 __le16 info2;
805 __le16 cumulative_l3_checksum;
806 __le32 rule_indication0;
807 __le32 ipv6_options_crc;
808 __le16 info3;
809 __le16 l3_type;
810 __le32 rule_indication1;
811 __le32 tcp_seq_num;
812 __le32 tcp_ack_num;
813 __le16 info4;
814 __le16 window_size;
815 __le16 sa_sw_peer_id;
816 __le16 info5;
817 __le16 sa_idx;
818 __le16 da_idx_or_sw_peer_id;
819 __le32 info6;
820 __le32 fse_metadata;
821 __le16 cce_metadata;
822 __le16 tcp_udp_cksum;
823 __le16 info7;
824 __le16 cumulative_ip_length;
825 __le32 info8;
826 __le32 info9;
827 __le32 info10;
828 __le32 info11;
829 __le16 vlan_ctag_ci;
830 __le16 vlan_stag_ci;
831 __le32 peer_meta_data;
832 __le32 info12;
833 __le32 flow_id_toeplitz;
834 __le32 ppdu_start_timestamp_63_32;
835 __le32 phy_meta_data;
836 __le32 ppdu_start_timestamp_31_0;
837 __le32 toeplitz_hash_2_or_4;
838 __le16 res0;
839 __le16 sa_15_0;
840 __le32 sa_47_16;
841 __le32 info13;
842 __le32 info14;
845 #define QCN9274_MSDU_END_SELECT_MSDU_END_TAG BIT(0)
846 #define QCN9274_MSDU_END_SELECT_INFO0_PHY_PPDUID_IP_HDR_CSUM_INFO1 BIT(1)
847 #define QCN9274_MSDU_END_SELECT_INFO2_CUMULATIVE_CSUM_RULE_IND_0 BIT(2)
848 #define QCN9274_MSDU_END_SELECT_IPV6_OP_CRC_INFO3_TYPE13 BIT(3)
849 #define QCN9274_MSDU_END_SELECT_RULE_IND_1_TCP_SEQ_NUM BIT(4)
850 #define QCN9274_MSDU_END_SELECT_TCP_ACK_NUM_INFO4_WINDOW_SIZE BIT(5)
851 #define QCN9274_MSDU_END_SELECT_SA_SW_PER_ID_INFO5_SA_DA_ID BIT(6)
852 #define QCN9274_MSDU_END_SELECT_INFO6_FSE_METADATA BIT(7)
853 #define QCN9274_MSDU_END_SELECT_CCE_MDATA_TCP_UDP_CSUM_INFO7_IP_LEN BIT(8)
854 #define QCN9274_MSDU_END_SELECT_INFO8_INFO9 BIT(9)
855 #define QCN9274_MSDU_END_SELECT_INFO10_INFO11 BIT(10)
856 #define QCN9274_MSDU_END_SELECT_VLAN_CTAG_STAG_CI_PEER_MDATA BIT(11)
857 #define QCN9274_MSDU_END_SELECT_INFO12_AND_FLOW_ID_TOEPLITZ BIT(12)
858 #define QCN9274_MSDU_END_SELECT_PPDU_START_TS_63_32_PHY_MDATA BIT(13)
859 #define QCN9274_MSDU_END_SELECT_PPDU_START_TS_31_0_TOEPLITZ_HASH_2_4 BIT(14)
860 #define QCN9274_MSDU_END_SELECT_RES0_SA_47_0 BIT(15)
861 #define QCN9274_MSDU_END_SELECT_INFO13_INFO14 BIT(16)
863 #define QCN9274_MSDU_END_WMASK (QCN9274_MSDU_END_SELECT_MSDU_END_TAG | \
864 QCN9274_MSDU_END_SELECT_SA_SW_PER_ID_INFO5_SA_DA_ID | \
865 QCN9274_MSDU_END_SELECT_INFO10_INFO11 | \
866 QCN9274_MSDU_END_SELECT_INFO12_AND_FLOW_ID_TOEPLITZ | \
867 QCN9274_MSDU_END_SELECT_PPDU_START_TS_63_32_PHY_MDATA | \
868 QCN9274_MSDU_END_SELECT_INFO13_INFO14)
870 /* The below rx_msdu_end_qcn9274_compact structure is tied with the mask value
871 * QCN9274_MSDU_END_WMASK. If the mask value changes the structure will also
872 * change.
873 */
876 __le64 msdu_end_tag;
877 __le16 sa_sw_peer_id;
878 __le16 info5;
879 __le16 sa_idx;
880 __le16 da_idx_or_sw_peer_id;
881 __le32 info10;
882 __le32 info11;
883 __le32 info12;
884 __le32 flow_id_toeplitz;
885 __le32 ppdu_start_timestamp_63_32;
886 __le32 phy_meta_data;
887 __le32 info13;
888 __le32 info14;
891 /* rx_msdu_end
892 *
893 * rxpcu_mpdu_filter_in_category
894 * Field indicates what the reason was that this mpdu frame
895 * was allowed to come into the receive path by rxpcu. Values
896 * are defined in enum %RX_DESC_RXPCU_FILTER_*.
897 *
898 * sw_frame_group_id
899 * SW processes frames based on certain classifications. Values
900 * are defined in enum %RX_DESC_SW_FRAME_GRP_ID_*.
901 *
902 * phy_ppdu_id
903 * A ppdu counter value that PHY increments for every PPDU
904 * received. The counter value wraps around.
905 *
906 * ip_hdr_cksum
907 * This can include the IP header checksum or the pseudo
908 * header checksum used by TCP/UDP checksum.
909 *
910 * reported_mpdu_length
911 * MPDU length before decapsulation. Only valid when first_msdu is
912 * set. This field is taken directly from the length field of the
913 * A-MPDU delimiter or the preamble length field for non-A-MPDU
914 * frames.
915 *
916 * cce_super_rule
917 * Indicates the super filter rule.
918 *
919 * cce_classify_not_done_truncate
920 * Classification failed due to truncated frame.
921 *
922 * cce_classify_not_done_cce_dis
923 * Classification failed due to CCE global disable
924 *
925 * cumulative_l3_checksum
926 * FISA: IP header checksum including the total MSDU length
927 * that is part of this flow aggregated so far, reported if
928 * 'RXOLE_R0_FISA_CTRL. CHKSUM_CUM_IP_LEN_EN' is set
929 *
930 * rule_indication
931 * Bitmap indicating which of rules have matched.
932 *
933 * ipv6_options_crc
934 * 32 bit CRC computed out of IP v6 extension headers.
935 *
936 * da_offset
937 * Offset into MSDU buffer for DA.
938 *
939 * sa_offset
940 * Offset into MSDU buffer for SA.
941 *
942 * da_offset_valid
943 * da_offset field is valid. This will be set to 0 in case
944 * of a dynamic A-MSDU when DA is compressed.
945 *
946 * sa_offset_valid
947 * sa_offset field is valid. This will be set to 0 in case
948 * of a dynamic A-MSDU when SA is compressed.
949 *
950 * l3_type
951 * The 16-bit type value indicating the type of L3 later
952 * extracted from LLC/SNAP, set to zero if SNAP is not
953 * available.
954 *
955 * tcp_seq_number
956 * TCP sequence number.
957 *
958 * tcp_ack_number
959 * TCP acknowledge number.
960 *
961 * tcp_flag
962 * TCP flags {NS, CWR, ECE, URG, ACK, PSH, RST, SYN, FIN}.
963 *
964 * lro_eligible
965 * Computed out of TCP and IP fields to indicate that this
966 * MSDU is eligible for LRO.
967 *
968 * window_size
969 * TCP receive window size.
970 *
971 * sa_sw_peer_id
972 * sw_peer_id from the address search entry corresponding to the
973 * source address of the MSDU.
974 *
975 * sa_idx_timeout
976 * Indicates an unsuccessful MAC source address search due to the
977 * expiring of the search timer.
978 *
979 * da_idx_timeout
980 * Indicates an unsuccessful MAC destination address search due to
981 * the expiring of the search timer.
982 *
983 * to_ds
984 * Set if the to DS bit is set in the frame control.
985 *
986 * tid
987 * TID field in the QoS control field
988 *
989 * sa_is_valid
990 * Indicates that OLE found a valid SA entry.
991 *
992 * da_is_valid
993 * Indicates that OLE found a valid DA entry.
994 *
995 * da_is_mcbc
996 * Field Only valid if da_is_valid is set. Indicates the DA address
997 * was a Multicast of Broadcast address.
998 *
999 * l3_header_padding
1000 * Number of bytes padded to make sure that the L3 header will
1001 * always start of a Dword boundary.
1002 *
1003 * first_msdu
1004 * Indicates the first MSDU of A-MSDU. If both first_msdu and
1005 * last_msdu are set in the MSDU then this is a non-aggregated MSDU
1006 * frame: normal MPDU. Interior MSDU in an A-MSDU shall have both
1007 * first_mpdu and last_mpdu bits set to 0.
1008 *
1009 * last_msdu
1010 * Indicates the last MSDU of the A-MSDU. MPDU end status is only
1011 * valid when last_msdu is set.
1012 *
1013 * fr_ds
1014 * Set if the from DS bit is set in the frame control.
1015 *
1016 * ip_chksum_fail_copy
1017 * Indicates that the computed checksum did not match the
1018 * checksum in the IP header.
1019 *
1020 * sa_idx
1021 * The offset in the address table which matches the MAC source
1022 * address.
1023 *
1024 * da_idx_or_sw_peer_id
1025 * Based on a register configuration in RXOLE, this field will
1026 * contain:
1027 * The offset in the address table which matches the MAC destination
1028 * address
1029 * OR:
1030 * sw_peer_id from the address search entry corresponding to
1031 * the destination address of the MSDU
1032 *
1033 * msdu_drop
1034 * REO shall drop this MSDU and not forward it to any other ring.
1035 *
1036 * The id of the reo exit ring where the msdu frame shall push
1037 * after (MPDU level) reordering has finished. Values are defined
1038 * in enum %HAL_RX_MSDU_DESC_REO_DEST_IND_.
1039 *
1040 * flow_idx
1041 * Flow table index.
1042 *
1043 * use_ppe
1044 * Indicates to RXDMA to ignore the REO_destination_indication
1045 * and use a programmed value corresponding to the REO2PPE
1046 * ring
1047 *
1048 * mesh_sta
1049 * When set, this is a Mesh (11s) STA.
1050 *
1051 * vlan_ctag_stripped
1052 * Set by RXOLE if it stripped 4-bytes of C-VLAN Tag from the
1053 * packet
1054 *
1055 * vlan_stag_stripped
1056 * Set by RXOLE if it stripped 4-bytes of S-VLAN Tag from the
1057 * packet
1058 *
1059 * fragment_flag
1060 * Indicates that this is an 802.11 fragment frame. This is
1061 * set when either the more_frag bit is set in the frame control
1062 * or the fragment number is not zero. Only set when first_msdu
1063 * is set.
1064 *
1065 * fse_metadata
1066 * FSE related meta data.
1067 *
1068 * cce_metadata
1069 * CCE related meta data.
1070 *
1071 * tcp_udp_chksum
1072 * The value of the computed TCP/UDP checksum. A mode bit
1073 * selects whether this checksum is the full checksum or the
1074 * partial checksum which does not include the pseudo header.
1075 *
1076 * aggregation_count
1077 * Number of MSDU's aggregated so far
1078 *
1079 * flow_aggregation_continuation
1080 * To indicate that this MSDU can be aggregated with
1081 * the previous packet with the same flow id
1082 *
1083 * fisa_timeout
1084 * To indicate that the aggregation has restarted for
1085 * this flow due to timeout
1086 *
1087 * tcp_udp_chksum_fail
1088 * Indicates that the computed checksum (tcp_udp_chksum) did
1089 * not match the checksum in the TCP/UDP header.
1090 *
1091 * msdu_limit_error
1092 * Indicates that the MSDU threshold was exceeded and thus all the
1093 * rest of the MSDUs will not be scattered and will not be
1094 * decapsulated but will be DMA'ed in RAW format as a single MSDU.
1095 *
1096 * flow_idx_timeout
1097 * Indicates an unsuccessful flow search due to the expiring of
1098 * the search timer.
1099 *
1100 * flow_idx_invalid
1101 * flow id is not valid.
1102 *
1103 * cce_match
1104 * Indicates that this status has a corresponding MSDU that
1105 * requires FW processing. The OLE will have classification
1106 * ring mask registers which will indicate the ring(s) for
1107 * packets and descriptors which need FW attention.
1108 *
1109 * amsdu_parser_error
1110 * A-MSDU could not be properly de-agregated.
1111 *
1112 * cumulative_ip_length
1113 * Total MSDU length that is part of this flow aggregated
1114 * so far
1115 *
1116 * key_id
1117 * The key ID octet from the IV. Only valid when first_msdu is set.
1118 *
1119 * service_code
1120 * Opaque service code between PPE and Wi-Fi
1121 *
1122 * priority_valid
1123 * This field gets passed on by REO to PPE in the EDMA descriptor
1124 *
1125 * intra_bss
1126 * This packet needs intra-BSS routing by SW as the 'vdev_id'
1127 * for the destination is the same as 'vdev_id' (from 'RX_MPDU_PCU_START')
1128 * that this MSDU was got in.
1129 *
1130 * dest_chip_id
1131 * If intra_bss is set, copied by RXOLE from 'ADDR_SEARCH_ENTRY'
1132 * to support intra-BSS routing with multi-chip multi-link
1133 * operation. This indicates into which chip's TCL the packet should be
1134 * queueued
1135 *
1136 * multicast_echo
1137 * If set, this packet is a multicast echo, i.e. the DA is
1138 * multicast and Rx OLE SA search with mcast_echo_check = 1
1139 * passed. RXDMA should release such packets to WBM.
1140 *
1141 * wds_learning_event
1142 * If set, this packet has an SA search failure with WDS learning
1143 * enabled for the peer. RXOLE should route this TLV to the
1144 * RXDMA0 status ring to notify FW.
1145 *
1146 * wds_roaming_event
1147 * If set, this packet's SA 'Sw_peer_id' mismatches the 'Sw_peer_id'
1148 * of the peer through which the packet was got, indicating
1149 * the SA node has roamed. RXOLE should route this TLV to
1150 * the RXDMA0 status ring to notify FW.
1151 *
1152 * wds_keep_alive_event
1153 * If set, the AST timestamp for this packet's SA is older
1154 * than the current timestamp by more than a threshold programmed
1155 * in RXOLE. RXOLE should route this TLV to the RXDMA0 status
1156 * ring to notify FW to keep the AST entry for the SA alive.
1157 *
1158 * msdu_length
1159 * MSDU length in bytes after decapsulation.
1160 * This field is still valid for MPDU frames without A-MSDU.
1161 * It still represents MSDU length after decapsulation
1162 *
1163 * stbc
1164 * When set, use STBC transmission rates.
1165 *
1166 * ipsec_esp
1167 * Set if IPv4/v6 packet is using IPsec ESP.
1168 *
1169 * l3_offset
1170 * Depending upon mode bit, this field either indicates the
1171 * L3 offset in bytes from the start of the RX_HEADER or the IP
1172 * offset in bytes from the start of the packet after
1173 * decapsulation. The latter is only valid if ipv4_proto or
1174 * ipv6_proto is set.
1175 *
1176 * ipsec_ah
1177 * Set if IPv4/v6 packet is using IPsec AH
1178 *
1179 * l4_offset
1180 * Depending upon mode bit, this field either indicates the
1181 * L4 offset in bytes from the start of RX_HEADER (only valid
1182 * if either ipv4_proto or ipv6_proto is set to 1) or indicates
1183 * the offset in bytes to the start of TCP or UDP header from
1184 * the start of the IP header after decapsulation (Only valid if
1185 * tcp_proto or udp_proto is set). The value 0 indicates that
1186 * the offset is longer than 127 bytes.
1187 *
1188 * msdu_number
1189 * Indicates the MSDU number within a MPDU. This value is
1190 * reset to zero at the start of each MPDU. If the number of
1191 * MSDU exceeds 255 this number will wrap using modulo 256.
1192 *
1193 * decap_type
1194 * Indicates the format after decapsulation. Values are defined in
1195 * enum %MPDU_START_DECAP_TYPE_*.
1196 *
1197 * ipv4_proto
1198 * Set if L2 layer indicates IPv4 protocol.
1199 *
1200 * ipv6_proto
1201 * Set if L2 layer indicates IPv6 protocol.
1202 *
1203 * tcp_proto
1204 * Set if the ipv4_proto or ipv6_proto are set and the IP protocol
1205 * indicates TCP.
1206 *
1207 * udp_proto
1208 * Set if the ipv4_proto or ipv6_proto are set and the IP protocol
1209 * indicates UDP.
1210 *
1211 * ip_frag
1212 * Indicates that either the IP More frag bit is set or IP frag
1213 * number is non-zero. If set indicates that this is a fragmented
1214 * IP packet.
1215 *
1216 * tcp_only_ack
1217 * Set if only the TCP Ack bit is set in the TCP flags and if
1218 * the TCP payload is 0.
1219 *
1220 * da_is_bcast_mcast
1221 * The destination address is broadcast or multicast.
1222 *
1223 * toeplitz_hash
1224 * Actual chosen Hash.
1225 * 0 - Toeplitz hash of 2-tuple (IP source address, IP
1226 * destination address)
1227 * 1 - Toeplitz hash of 4-tuple (IP source address,
1228 * IP destination address, L4 (TCP/UDP) source port,
1229 * L4 (TCP/UDP) destination port)
1230 * 2 - Toeplitz of flow_id
1231 * 3 - Zero is used
1232 *
1233 * ip_fixed_header_valid
1234 * Fixed 20-byte IPv4 header or 40-byte IPv6 header parsed
1235 * fully within first 256 bytes of the packet
1236 *
1237 * ip_extn_header_valid
1238 * IPv6/IPv6 header, including IPv4 options and
1239 * recognizable extension headers parsed fully within first 256
1240 * bytes of the packet
1241 *
1242 * tcp_udp_header_valid
1243 * Fixed 20-byte TCP (excluding TCP options) or 8-byte UDP
1244 * header parsed fully within first 256 bytes of the packet
1245 *
1246 * mesh_control_present
1247 * When set, this MSDU includes the 'Mesh Control' field
1248 *
1249 * ldpc
1250 *
1251 * ip4_protocol_ip6_next_header
1252 * For IPv4, this is the 8 bit protocol field set). For IPv6 this
1253 * is the 8 bit next_header field.
1254 *
1255 *
1256 * vlan_ctag_ci
1257 * 2 bytes of C-VLAN Tag Control Information from WHO_L2_LLC
1258 *
1259 * vlan_stag_ci
1260 * 2 bytes of S-VLAN Tag Control Information from WHO_L2_LLC
1261 * in case of double VLAN
1262 *
1263 * peer_meta_data
1264 * Meta data that SW has programmed in the Peer table entry
1265 * of the transmitting STA.
1266 *
1267 * user_rssi
1268 * RSSI for this user
1269 *
1270 * pkt_type
1271 * Values are defined in enum %RX_MSDU_START_PKT_TYPE_*.
1272 *
1273 * sgi
1274 * Field only valid when pkt type is HT, VHT or HE. Values are
1275 * defined in enum %RX_MSDU_START_SGI_*.
1276 *
1277 * rate_mcs
1278 * MCS Rate used.
1279 *
1280 * receive_bandwidth
1281 * Full receive Bandwidth. Values are defined in enum
1282 * %RX_MSDU_START_RECV_*.
1283 *
1284 * reception_type
1285 * Indicates what type of reception this is and defined in enum
1286 * %RX_MSDU_START_RECEPTION_TYPE_*.
1287 *
1288 * mimo_ss_bitmap
1289 * Field only valid when
1290 * Reception_type is RX_MSDU_START_RECEPTION_TYPE_DL_MU_MIMO or
1291 * RX_MSDU_START_RECEPTION_TYPE_DL_MU_OFDMA_MIMO.
1292 *
1293 * Bitmap, with each bit indicating if the related spatial
1294 * stream is used for this STA
1295 *
1296 * LSB related to SS 0
1297 *
1298 * 0 - spatial stream not used for this reception
1299 * 1 - spatial stream used for this reception
1300 *
1301 * msdu_done_copy
1302 * If set indicates that the RX packet data, RX header data,
1303 * RX PPDU start descriptor, RX MPDU start/end descriptor,
1304 * RX MSDU start/end descriptors and RX Attention descriptor
1305 * are all valid. This bit is in the last 64-bit of the descriptor
1306 * expected to be subscribed in future hardware.
1307 *
1308 * flow_id_toeplitz
1309 * Toeplitz hash of 5-tuple
1310 * {IP source address, IP destination address, IP source port, IP
1311 * destination port, L4 protocol} in case of non-IPSec.
1312 *
1313 * In case of IPSec - Toeplitz hash of 4-tuple
1314 * {IP source address, IP destination address, SPI, L4 protocol}
1315 *
1316 * The relevant Toeplitz key registers are provided in RxOLE's
1317 * instance of common parser module. These registers are separate
1318 * from the Toeplitz keys used by ASE/FSE modules inside RxOLE.
1319 * The actual value will be passed on from common parser module
1320 * to RxOLE in one of the WHO_* TLVs.
1321 *
1322 * ppdu_start_timestamp
1323 * Timestamp that indicates when the PPDU that contained this MPDU
1324 * started on the medium.
1325 *
1326 * phy_meta_data
1327 * SW programmed Meta data provided by the PHY. Can be used for SW
1328 * to indicate the channel the device is on.
1329 *
1330 * toeplitz_hash_2_or_4
1331 * Controlled by multiple RxOLE registers for TCP/UDP over
1332 * IPv4/IPv6 - Either, Toeplitz hash computed over 2-tuple
1333 * IPv4 or IPv6 src/dest addresses is reported; or, Toeplitz
1334 * hash computed over 4-tuple IPv4 or IPv6 src/dest addresses
1335 * and src/dest ports is reported. The Flow_id_toeplitz hash
1336 * can also be reported here. Usually the hash reported here
1337 * is the one used for hash-based REO routing (see use_flow_id_toeplitz_clfy
1338 * in 'RXPT_CLASSIFY_INFO').
1339 *
1340 * sa
1341 * Source MAC address
1342 *
1343 * first_mpdu
1344 * Indicates the first MSDU of the PPDU. If both first_mpdu
1345 * and last_mpdu are set in the MSDU then this is a not an
1346 * A-MPDU frame but a stand alone MPDU. Interior MPDU in an
1347 * A-MPDU shall have both first_mpdu and last_mpdu bits set to
1348 * 0. The PPDU start status will only be valid when this bit
1349 * is set.
1350 *
1351 * mcast_bcast
1352 * Multicast / broadcast indicator. Only set when the MAC
1353 * address 1 bit 0 is set indicating mcast/bcast and the BSSID
1354 * matches one of the 4 BSSID registers. Only set when
1355 * first_msdu is set.
1356 *
1357 * ast_index_not_found
1358 * Only valid when first_msdu is set. Indicates no AST matching
1359 * entries within the max search count.
1360 *
1361 * ast_index_timeout
1362 * Only valid when first_msdu is set. Indicates an unsuccessful
1363 * search in the address search table due to timeout.
1364 *
1365 * power_mgmt
1366 * Power management bit set in the 802.11 header. Only set
1367 * when first_msdu is set.
1368 *
1369 * non_qos
1370 * Set if packet is not a non-QoS data frame. Only set when
1371 * first_msdu is set.
1372 *
1373 * null_data
1374 * Set if frame type indicates either null data or QoS null
1375 * data format. Only set when first_msdu is set.
1376 *
1377 * mgmt_type
1378 * Set if packet is a management packet. Only set when
1379 * first_msdu is set.
1380 *
1381 * ctrl_type
1382 * Set if packet is a control packet. Only set when first_msdu
1383 * is set.
1384 *
1385 * more_data
1386 * Set if more bit in frame control is set. Only set when
1387 * first_msdu is set.
1388 *
1389 * eosp
1390 * Set if the EOSP (end of service period) bit in the QoS
1391 * control field is set. Only set when first_msdu is set.
1392 *
1393 * a_msdu_error
1394 * Set if number of MSDUs in A-MSDU is above a threshold or if the
1395 * size of the MSDU is invalid. This receive buffer will contain
1396 * all of the remainder of MSDUs in this MPDU w/o decapsulation.
1397 *
1398 * order
1399 * Set if the order bit in the frame control is set. Only
1400 * set when first_msdu is set.
1401 *
1402 * wifi_parser_error
1403 * Indicates that the WiFi frame has one of the following errors
1404 *
1405 * overflow_err
1406 * RXPCU Receive FIFO ran out of space to receive the full MPDU.
1407 * Therefore this MPDU is terminated early and is thus corrupted.
1408 *
1409 * This MPDU will not be ACKed.
1410 *
1411 * RXPCU might still be able to correctly receive the following
1412 * MPDUs in the PPDU if enough fifo space became available in time.
1413 *
1414 * mpdu_length_err
1415 * Set by RXPCU if the expected MPDU length does not correspond
1416 * with the actually received number of bytes in the MPDU.
1417 *
1418 * tcp_udp_chksum_fail
1419 * Indicates that the computed checksum (tcp_udp_chksum) did
1420 * not match the checksum in the TCP/UDP header.
1421 *
1422 * ip_chksum_fail
1423 * Indicates that the computed checksum did not match the
1424 * checksum in the IP header.
1425 *
1426 * sa_idx_invalid
1427 * Indicates no matching entry was found in the address search
1428 * table for the source MAC address.
1429 *
1430 * da_idx_invalid
1431 * Indicates no matching entry was found in the address search
1432 * table for the destination MAC address.
1433 *
1434 * amsdu_addr_mismatch
1435 * Indicates that an A-MSDU with 'from DS = 0' had an SA mismatching
1436 * TA or an A-MDU with 'to DS = 0' had a DA mismatching RA
1437 *
1438 * rx_in_tx_decrypt_byp
1439 * Indicates that RX packet is not decrypted as Crypto is busy
1440 * with TX packet processing.
1441 *
1442 * encrypt_required
1443 * Indicates that this data type frame is not encrypted even if
1444 * the policy for this MPDU requires encryption as indicated in
1445 * the peer table key type.
1446 *
1447 * directed
1448 * MPDU is a directed packet which means that the RA matched
1449 * our STA addresses. In proxySTA it means that the TA matched
1450 * an entry in our address search table with the corresponding
1451 * 'no_ack' bit is the address search entry cleared.
1452 *
1453 * buffer_fragment
1454 * Indicates that at least one of the rx buffers has been
1455 * fragmented. If set the FW should look at the rx_frag_info
1456 * descriptor described below.
1457 *
1458 * mpdu_length_err
1459 * Indicates that the MPDU was pre-maturely terminated
1460 * resulting in a truncated MPDU. Don't trust the MPDU length
1461 * field.
1462 *
1463 * tkip_mic_err
1464 * Indicates that the MPDU Michael integrity check failed
1465 *
1466 * decrypt_err
1467 * Indicates that the MPDU decrypt integrity check failed
1468 *
1469 * fcs_err
1470 * Indicates that the MPDU FCS check failed
1471 *
1472 * flow_idx_timeout
1473 * Indicates an unsuccessful flow search due to the expiring of
1474 * the search timer.
1475 *
1476 * flow_idx_invalid
1477 * flow id is not valid.
1478 *
1479 * decrypt_status_code
1480 * Field provides insight into the decryption performed. Values
1481 * are defined in enum %RX_DESC_DECRYPT_STATUS_CODE_*.
1482 *
1483 * rx_bitmap_not_updated
1484 * Frame is received, but RXPCU could not update the receive bitmap
1485 * due to (temporary) fifo constraints.
1486 *
1487 * msdu_done
1488 * If set indicates that the RX packet data, RX header data, RX
1489 * PPDU start descriptor, RX MPDU start/end descriptor, RX MSDU
1490 * start/end descriptors and RX Attention descriptor are all
1491 * valid. This bit must be in the last octet of the
1492 * descriptor.
1493 *
1494 */
1499 u8 msdu_payload[];
1505 u8 msdu_payload[];
1508 #define RX_BE_PADDING0_BYTES 8
1509 #define RX_BE_PADDING1_BYTES 8
1511 #define HAL_RX_BE_PKT_HDR_TLV_LEN 112
1514 __le64 tag;
1515 __le64 phy_ppdu_id;
1517 };
1520 __le64 msdu_end_tag;
1523 __le64 mpdu_start_tag;
1526 u8 msdu_payload[];
1527 };
1537 #define MAX_USER_POS 8
1538 #define MAX_MU_GROUP_ID 64
1539 #define MAX_MU_GROUP_SHOW 16
1540 #define MAX_MU_GROUP_LENGTH (6 * MAX_MU_GROUP_SHOW)
1542 #define HAL_RX_RU_ALLOC_TYPE_MAX 6
1543 #define RU_26 1
1544 #define RU_52 2
1545 #define RU_106 4
1546 #define RU_242 9
1547 #define RU_484 18
1548 #define RU_996 37