1 // SPDX-License-Identifier: ISC
3 * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
6 #include <linux/module.h>
7 #include <linux/firmware.h>
10 #include "mt76x02_mcu.h"
11 #include "mt76x02_usb.h"
13 #define MT_CMD_HDR_LEN 4
15 #define MT_FCE_DMA_ADDR 0x0230
16 #define MT_FCE_DMA_LEN 0x0234
18 #define MT_TX_CPU_FROM_FCE_CPU_DESC_IDX 0x09a8
21 mt76x02u_multiple_mcu_reads(struct mt76_dev
*dev
, u8
*data
, int len
)
23 struct mt76_usb
*usb
= &dev
->usb
;
26 WARN_ON_ONCE(len
/ 8 != usb
->mcu
.rp_len
);
28 for (i
= 0; i
< usb
->mcu
.rp_len
; i
++) {
29 u32 reg
= get_unaligned_le32(data
+ 8 * i
) - usb
->mcu
.base
;
30 u32 val
= get_unaligned_le32(data
+ 8 * i
+ 4);
32 WARN_ON_ONCE(usb
->mcu
.rp
[i
].reg
!= reg
);
33 usb
->mcu
.rp
[i
].value
= val
;
37 static int mt76x02u_mcu_wait_resp(struct mt76_dev
*dev
, u8 seq
)
39 struct mt76_usb
*usb
= &dev
->usb
;
40 u8
*data
= usb
->mcu
.data
;
44 for (i
= 0; i
< 5; i
++) {
45 ret
= mt76u_bulk_msg(dev
, data
, MCU_RESP_URB_SIZE
, &len
,
46 300, MT_EP_IN_CMD_RESP
);
47 if (ret
== -ETIMEDOUT
)
53 mt76x02u_multiple_mcu_reads(dev
, data
+ 4, len
- 8);
55 rxfce
= get_unaligned_le32(data
);
56 if (seq
== FIELD_GET(MT_RX_FCE_INFO_CMD_SEQ
, rxfce
) &&
57 FIELD_GET(MT_RX_FCE_INFO_EVT_TYPE
, rxfce
) == EVT_CMD_DONE
)
60 dev_err(dev
->dev
, "error: MCU resp evt:%lx seq:%hhx-%lx\n",
61 FIELD_GET(MT_RX_FCE_INFO_EVT_TYPE
, rxfce
),
62 seq
, FIELD_GET(MT_RX_FCE_INFO_CMD_SEQ
, rxfce
));
65 dev_err(dev
->dev
, "error: %s failed with %d\n", __func__
, ret
);
70 __mt76x02u_mcu_send_msg(struct mt76_dev
*dev
, struct sk_buff
*skb
,
71 int cmd
, bool wait_resp
)
77 if (test_bit(MT76_REMOVED
, &dev
->phy
.state
)) {
83 seq
= ++dev
->mcu
.msg_seq
& 0xf;
85 seq
= ++dev
->mcu
.msg_seq
& 0xf;
88 info
= FIELD_PREP(MT_MCU_MSG_CMD_SEQ
, seq
) |
89 FIELD_PREP(MT_MCU_MSG_CMD_TYPE
, cmd
) |
91 ret
= mt76x02u_skb_dma_info(skb
, CPU_TX_PORT
, info
);
95 ret
= mt76u_bulk_msg(dev
, skb
->data
, skb
->len
, NULL
, 500,
96 MT_EP_OUT_INBAND_CMD
);
101 ret
= mt76x02u_mcu_wait_resp(dev
, seq
);
110 mt76x02u_mcu_send_msg(struct mt76_dev
*dev
, int cmd
, const void *data
,
111 int len
, bool wait_resp
)
116 skb
= mt76_mcu_msg_alloc(dev
, data
, len
);
120 mutex_lock(&dev
->mcu
.mutex
);
121 err
= __mt76x02u_mcu_send_msg(dev
, skb
, cmd
, wait_resp
);
122 mutex_unlock(&dev
->mcu
.mutex
);
127 static inline void skb_put_le32(struct sk_buff
*skb
, u32 val
)
129 put_unaligned_le32(val
, skb_put(skb
, 4));
133 mt76x02u_mcu_wr_rp(struct mt76_dev
*dev
, u32 base
,
134 const struct mt76_reg_pair
*data
, int n
)
136 const int max_vals_per_cmd
= MT_INBAND_PACKET_MAX_LEN
/ 8;
137 const int CMD_RANDOM_WRITE
= 12;
144 cnt
= min(max_vals_per_cmd
, n
);
146 skb
= alloc_skb(cnt
* 8 + MT_DMA_HDR_LEN
+ 4, GFP_KERNEL
);
149 skb_reserve(skb
, MT_DMA_HDR_LEN
);
151 for (i
= 0; i
< cnt
; i
++) {
152 skb_put_le32(skb
, base
+ data
[i
].reg
);
153 skb_put_le32(skb
, data
[i
].value
);
156 mutex_lock(&dev
->mcu
.mutex
);
157 ret
= __mt76x02u_mcu_send_msg(dev
, skb
, CMD_RANDOM_WRITE
, cnt
== n
);
158 mutex_unlock(&dev
->mcu
.mutex
);
162 return mt76x02u_mcu_wr_rp(dev
, base
, data
+ cnt
, n
- cnt
);
166 mt76x02u_mcu_rd_rp(struct mt76_dev
*dev
, u32 base
,
167 struct mt76_reg_pair
*data
, int n
)
169 const int CMD_RANDOM_READ
= 10;
170 const int max_vals_per_cmd
= MT_INBAND_PACKET_MAX_LEN
/ 8;
171 struct mt76_usb
*usb
= &dev
->usb
;
178 cnt
= min(max_vals_per_cmd
, n
);
182 skb
= alloc_skb(cnt
* 8 + MT_DMA_HDR_LEN
+ 4, GFP_KERNEL
);
185 skb_reserve(skb
, MT_DMA_HDR_LEN
);
187 for (i
= 0; i
< cnt
; i
++) {
188 skb_put_le32(skb
, base
+ data
[i
].reg
);
189 skb_put_le32(skb
, data
[i
].value
);
192 mutex_lock(&dev
->mcu
.mutex
);
196 usb
->mcu
.base
= base
;
198 ret
= __mt76x02u_mcu_send_msg(dev
, skb
, CMD_RANDOM_READ
, true);
202 mutex_unlock(&dev
->mcu
.mutex
);
207 void mt76x02u_mcu_fw_reset(struct mt76x02_dev
*dev
)
209 mt76u_vendor_request(&dev
->mt76
, MT_VEND_DEV_MODE
,
210 USB_DIR_OUT
| USB_TYPE_VENDOR
,
213 EXPORT_SYMBOL_GPL(mt76x02u_mcu_fw_reset
);
216 __mt76x02u_mcu_fw_send_data(struct mt76x02_dev
*dev
, u8
*data
,
217 const void *fw_data
, int len
, u32 dst_addr
)
223 info
= cpu_to_le32(FIELD_PREP(MT_MCU_MSG_PORT
, CPU_TX_PORT
) |
224 FIELD_PREP(MT_MCU_MSG_LEN
, len
) |
225 MT_MCU_MSG_TYPE_CMD
);
227 memcpy(data
, &info
, sizeof(info
));
228 memcpy(data
+ sizeof(info
), fw_data
, len
);
229 memset(data
+ sizeof(info
) + len
, 0, 4);
231 mt76u_single_wr(&dev
->mt76
, MT_VEND_WRITE_FCE
,
232 MT_FCE_DMA_ADDR
, dst_addr
);
233 len
= roundup(len
, 4);
234 mt76u_single_wr(&dev
->mt76
, MT_VEND_WRITE_FCE
,
235 MT_FCE_DMA_LEN
, len
<< 16);
237 data_len
= MT_CMD_HDR_LEN
+ len
+ sizeof(info
);
239 err
= mt76u_bulk_msg(&dev
->mt76
, data
, data_len
, NULL
, 1000,
240 MT_EP_OUT_INBAND_CMD
);
242 dev_err(dev
->mt76
.dev
, "firmware upload failed: %d\n", err
);
246 val
= mt76_rr(dev
, MT_TX_CPU_FROM_FCE_CPU_DESC_IDX
);
248 mt76_wr(dev
, MT_TX_CPU_FROM_FCE_CPU_DESC_IDX
, val
);
253 int mt76x02u_mcu_fw_send_data(struct mt76x02_dev
*dev
, const void *data
,
254 int data_len
, u32 max_payload
, u32 offset
)
256 int len
, err
= 0, pos
= 0, max_len
= max_payload
- 8;
259 buf
= kmalloc(max_payload
, GFP_KERNEL
);
263 while (data_len
> 0) {
264 len
= min_t(int, data_len
, max_len
);
265 err
= __mt76x02u_mcu_fw_send_data(dev
, buf
, data
+ pos
,
272 usleep_range(5000, 10000);
278 EXPORT_SYMBOL_GPL(mt76x02u_mcu_fw_send_data
);
280 void mt76x02u_init_mcu(struct mt76_dev
*dev
)
282 static const struct mt76_mcu_ops mt76x02u_mcu_ops
= {
283 .headroom
= MT_CMD_HDR_LEN
,
285 .mcu_send_msg
= mt76x02u_mcu_send_msg
,
286 .mcu_parse_response
= mt76x02_mcu_parse_response
,
287 .mcu_wr_rp
= mt76x02u_mcu_wr_rp
,
288 .mcu_rd_rp
= mt76x02u_mcu_rd_rp
,
291 dev
->mcu_ops
= &mt76x02u_mcu_ops
;
293 EXPORT_SYMBOL_GPL(mt76x02u_init_mcu
);
295 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>");
296 MODULE_DESCRIPTION("MediaTek MT76x02 MCU helpers");
297 MODULE_LICENSE("Dual BSD/GPL");