drm/vkms: Add support for ABGR8888 pixel format
[drm/drm-misc.git] / drivers / net / wireless / mediatek / mt76 / mt7925 / pci_mac.c
blobfaedbf766d1a01df5d34f4af45f10f6359a0a777
1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2023 MediaTek Inc. */
4 #include "mt7925.h"
5 #include "../dma.h"
6 #include "mac.h"
8 int mt7925e_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
9 enum mt76_txq_id qid, struct mt76_wcid *wcid,
10 struct ieee80211_sta *sta,
11 struct mt76_tx_info *tx_info)
13 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
14 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb);
15 struct ieee80211_key_conf *key = info->control.hw_key;
16 struct mt76_connac_hw_txp *txp;
17 struct mt76_txwi_cache *t;
18 int id, pid;
19 u8 *txwi = (u8 *)txwi_ptr;
21 if (unlikely(tx_info->skb->len <= ETH_HLEN))
22 return -EINVAL;
24 if (!wcid)
25 wcid = &dev->mt76.global_wcid;
27 t = (struct mt76_txwi_cache *)(txwi + mdev->drv->txwi_size);
28 t->skb = tx_info->skb;
30 id = mt76_token_consume(mdev, &t);
31 if (id < 0)
32 return id;
34 if (sta) {
35 struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv;
37 if (time_after(jiffies, msta->deflink.last_txs + HZ / 4)) {
38 info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS;
39 msta->deflink.last_txs = jiffies;
43 pid = mt76_tx_status_skb_add(mdev, wcid, tx_info->skb);
44 mt7925_mac_write_txwi(mdev, txwi_ptr, tx_info->skb, wcid, key,
45 pid, qid, 0);
47 txp = (struct mt76_connac_hw_txp *)(txwi + MT_TXD_SIZE);
48 memset(txp, 0, sizeof(struct mt76_connac_hw_txp));
49 mt76_connac_write_hw_txp(mdev, tx_info, txp, id);
51 tx_info->skb = NULL;
53 return 0;
56 void mt7925_tx_token_put(struct mt792x_dev *dev)
58 struct mt76_txwi_cache *txwi;
59 int id;
61 spin_lock_bh(&dev->mt76.token_lock);
62 idr_for_each_entry(&dev->mt76.token, txwi, id) {
63 mt7925_txwi_free(dev, txwi, NULL, NULL, NULL);
64 dev->mt76.token_count--;
66 spin_unlock_bh(&dev->mt76.token_lock);
67 idr_destroy(&dev->mt76.token);
70 int mt7925e_mac_reset(struct mt792x_dev *dev)
72 const struct mt792x_irq_map *irq_map = dev->irq_map;
73 int i, err;
75 mt792xe_mcu_drv_pmctrl(dev);
77 mt76_connac_free_pending_tx_skbs(&dev->pm, NULL);
79 mt76_wr(dev, dev->irq_map->host_irq_enable, 0);
80 mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0x0);
82 set_bit(MT76_RESET, &dev->mphy.state);
83 set_bit(MT76_MCU_RESET, &dev->mphy.state);
84 wake_up(&dev->mt76.mcu.wait);
85 skb_queue_purge(&dev->mt76.mcu.res_q);
87 mt76_txq_schedule_all(&dev->mphy);
89 mt76_worker_disable(&dev->mt76.tx_worker);
90 if (irq_map->rx.data_complete_mask)
91 napi_disable(&dev->mt76.napi[MT_RXQ_MAIN]);
92 if (irq_map->rx.wm_complete_mask)
93 napi_disable(&dev->mt76.napi[MT_RXQ_MCU]);
94 if (irq_map->rx.wm2_complete_mask)
95 napi_disable(&dev->mt76.napi[MT_RXQ_MCU_WA]);
96 if (irq_map->tx.all_complete_mask)
97 napi_disable(&dev->mt76.tx_napi);
99 mt7925_tx_token_put(dev);
100 idr_init(&dev->mt76.token);
102 mt792x_wpdma_reset(dev, true);
104 local_bh_disable();
105 mt76_for_each_q_rx(&dev->mt76, i) {
106 napi_enable(&dev->mt76.napi[i]);
107 napi_schedule(&dev->mt76.napi[i]);
109 napi_enable(&dev->mt76.tx_napi);
110 napi_schedule(&dev->mt76.tx_napi);
111 local_bh_enable();
113 dev->fw_assert = false;
114 clear_bit(MT76_MCU_RESET, &dev->mphy.state);
116 mt76_wr(dev, dev->irq_map->host_irq_enable,
117 dev->irq_map->tx.all_complete_mask |
118 MT_INT_RX_DONE_ALL | MT_INT_MCU_CMD);
119 mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff);
121 err = mt792xe_mcu_fw_pmctrl(dev);
122 if (err)
123 return err;
125 err = __mt792xe_mcu_drv_pmctrl(dev);
126 if (err)
127 goto out;
129 err = mt7925_run_firmware(dev);
130 if (err)
131 goto out;
133 err = mt7925_mcu_set_eeprom(dev);
134 if (err)
135 goto out;
137 err = mt7925_mac_init(dev);
138 if (err)
139 goto out;
141 err = __mt7925_start(&dev->phy);
142 out:
143 clear_bit(MT76_RESET, &dev->mphy.state);
145 mt76_worker_enable(&dev->mt76.tx_worker);
147 return err;