drm/rockchip: Don't change hdmi reference clock rate
[drm/drm-misc.git] / drivers / net / wireless / microchip / wilc1000 / fw.h
blob7a930e89614caf9406c64d06dc892ed728e2d6b5
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (c) 2012 - 2018 Microchip Technology Inc., and its subsidiaries.
4 * All rights reserved.
5 */
7 #ifndef WILC_FW_H
8 #define WILC_FW_H
10 #include <linux/ieee80211.h>
12 #define WILC_MAX_NUM_STA 9
13 #define WILC_MAX_RATES_SUPPORTED 12
14 #define WILC_MAX_NUM_PMKIDS 16
15 #define WILC_MAX_NUM_SCANNED_CH 14
16 #define WILC_NVMEM_MAX_NUM_BANK 6
17 #define WILC_NVMEM_BANK_BASE 0x30000000
18 #define WILC_NVMEM_LOW_BANK_OFFSET 0x102c
19 #define WILC_NVMEM_HIGH_BANK_OFFSET 0x1380
20 #define WILC_NVMEM_IS_BANK_USED BIT(31)
21 #define WILC_NVMEM_IS_BANK_INVALID BIT(30)
23 struct wilc_assoc_resp {
24 __le16 capab_info;
25 __le16 status_code;
26 __le16 aid;
27 } __packed;
29 struct wilc_pmkid {
30 u8 bssid[ETH_ALEN];
31 u8 pmkid[WLAN_PMKID_LEN];
32 } __packed;
34 struct wilc_pmkid_attr {
35 u8 numpmkid;
36 struct wilc_pmkid pmkidlist[WILC_MAX_NUM_PMKIDS];
37 } __packed;
39 struct wilc_reg_frame {
40 u8 reg;
41 u8 reg_id;
42 __le16 frame_type;
43 } __packed;
45 struct wilc_drv_handler {
46 __le32 handler;
47 u8 mode;
48 } __packed;
50 struct wilc_sta_wpa_ptk {
51 u8 mac_addr[ETH_ALEN];
52 u8 key_len;
53 u8 key[];
54 } __packed;
56 struct wilc_ap_wpa_ptk {
57 u8 mac_addr[ETH_ALEN];
58 u8 index;
59 u8 key_len;
60 u8 key[];
61 } __packed;
63 struct wilc_wpa_igtk {
64 u8 index;
65 u8 pn_len;
66 u8 pn[6];
67 u8 key_len;
68 u8 key[];
69 } __packed;
71 struct wilc_gtk_key {
72 u8 mac_addr[ETH_ALEN];
73 u8 rsc[8];
74 u8 index;
75 u8 key_len;
76 u8 key[];
77 } __packed;
79 struct wilc_op_mode {
80 __le32 mode;
81 } __packed;
83 struct wilc_noa_opp_enable {
84 u8 ct_window;
85 u8 cnt;
86 __le32 duration;
87 __le32 interval;
88 __le32 start_time;
89 } __packed;
91 struct wilc_noa_opp_disable {
92 u8 cnt;
93 __le32 duration;
94 __le32 interval;
95 __le32 start_time;
96 } __packed;
98 struct wilc_join_bss_param {
99 char ssid[IEEE80211_MAX_SSID_LEN];
100 u8 ssid_terminator;
101 u8 bss_type;
102 u8 ch;
103 __le16 cap_info;
104 u8 sa[ETH_ALEN];
105 u8 bssid[ETH_ALEN];
106 __le16 beacon_period;
107 u8 dtim_period;
108 u8 supp_rates[WILC_MAX_RATES_SUPPORTED + 1];
109 u8 wmm_cap;
110 u8 uapsd_cap;
111 u8 ht_capable;
112 u8 rsn_found;
113 u8 rsn_grp_policy;
114 u8 mode_802_11i;
115 u8 p_suites[3];
116 u8 akm_suites[3];
117 u8 rsn_cap[2];
118 u8 noa_enabled;
119 __le32 tsf_lo;
120 u8 idx;
121 u8 opp_enabled;
122 union {
123 struct wilc_noa_opp_disable opp_dis;
124 struct wilc_noa_opp_enable opp_en;
126 } __packed;
128 struct wilc_external_auth_param {
129 u8 action;
130 u8 bssid[ETH_ALEN];
131 u8 ssid[IEEE80211_MAX_SSID_LEN];
132 u8 ssid_len;
133 __le32 key_mgmt_suites;
134 __le16 status;
135 } __packed;
137 static inline u32 get_bank_offset_from_bank_index(unsigned int i)
139 return (((i) < 2) ? WILC_NVMEM_LOW_BANK_OFFSET + ((i) * 32) :
140 WILC_NVMEM_HIGH_BANK_OFFSET + ((i) - 2) * 16);
143 #endif