drm/rockchip: Don't change hdmi reference clock rate
[drm/drm-misc.git] / drivers / net / wireless / st / cw1200 / cw1200_spi.c
blob862964a8cc8761bb412b15addef562d61811440b
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Mac80211 SPI driver for ST-Ericsson CW1200 device
5 * Copyright (c) 2011, Sagrad Inc.
6 * Author: Solomon Peachy <speachy@sagrad.com>
8 * Based on cw1200_sdio.c
9 * Copyright (c) 2010, ST-Ericsson
10 * Author: Dmitry Tarnyagin <dmitry.tarnyagin@lockless.no>
13 #include <linux/module.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/delay.h>
16 #include <linux/spinlock.h>
17 #include <linux/interrupt.h>
18 #include <net/mac80211.h>
20 #include <linux/spi/spi.h>
21 #include <linux/device.h>
23 #include "cw1200.h"
24 #include "hwbus.h"
25 #include <linux/platform_data/net-cw1200.h>
26 #include "hwio.h"
28 MODULE_AUTHOR("Solomon Peachy <speachy@sagrad.com>");
29 MODULE_DESCRIPTION("mac80211 ST-Ericsson CW1200 SPI driver");
30 MODULE_LICENSE("GPL");
31 MODULE_ALIAS("spi:cw1200_wlan_spi");
33 /* #define SPI_DEBUG */
35 struct hwbus_priv {
36 struct spi_device *func;
37 struct cw1200_common *core;
38 const struct cw1200_platform_data_spi *pdata;
39 spinlock_t lock; /* Serialize all bus operations */
40 wait_queue_head_t wq;
41 struct gpio_desc *reset;
42 struct gpio_desc *powerup;
43 int claimed;
46 #define SDIO_TO_SPI_ADDR(addr) ((addr & 0x1f)>>2)
47 #define SET_WRITE 0x7FFF /* usage: and operation */
48 #define SET_READ 0x8000 /* usage: or operation */
50 /* Notes on byte ordering:
51 LE: B0 B1 B2 B3
52 BE: B3 B2 B1 B0
54 Hardware expects 32-bit data to be written as 16-bit BE words:
56 B1 B0 B3 B2
59 static int cw1200_spi_memcpy_fromio(struct hwbus_priv *self,
60 unsigned int addr,
61 void *dst, int count)
63 int ret, i;
64 u16 regaddr;
65 struct spi_message m;
67 struct spi_transfer t_addr = {
68 .tx_buf = &regaddr,
69 .len = sizeof(regaddr),
71 struct spi_transfer t_msg = {
72 .rx_buf = dst,
73 .len = count,
76 regaddr = (SDIO_TO_SPI_ADDR(addr))<<12;
77 regaddr |= SET_READ;
78 regaddr |= (count>>1);
80 #ifdef SPI_DEBUG
81 pr_info("READ : %04d from 0x%02x (%04x)\n", count, addr, regaddr);
82 #endif
84 /* Header is LE16 */
85 regaddr = (__force u16)cpu_to_le16(regaddr);
87 /* We have to byteswap if the SPI bus is limited to 8b operation
88 or we are running on a Big Endian system
90 #if defined(__LITTLE_ENDIAN)
91 if (self->func->bits_per_word == 8)
92 #endif
93 regaddr = swab16(regaddr);
95 spi_message_init(&m);
96 spi_message_add_tail(&t_addr, &m);
97 spi_message_add_tail(&t_msg, &m);
98 ret = spi_sync(self->func, &m);
100 #ifdef SPI_DEBUG
101 pr_info("READ : ");
102 for (i = 0; i < t_addr.len; i++)
103 printk("%02x ", ((u8 *)t_addr.tx_buf)[i]);
104 printk(" : ");
105 for (i = 0; i < t_msg.len; i++)
106 printk("%02x ", ((u8 *)t_msg.rx_buf)[i]);
107 printk("\n");
108 #endif
110 /* We have to byteswap if the SPI bus is limited to 8b operation
111 or we are running on a Big Endian system
113 #if defined(__LITTLE_ENDIAN)
114 if (self->func->bits_per_word == 8)
115 #endif
117 uint16_t *buf = (uint16_t *)dst;
118 for (i = 0; i < ((count + 1) >> 1); i++)
119 buf[i] = swab16(buf[i]);
122 return ret;
125 static int cw1200_spi_memcpy_toio(struct hwbus_priv *self,
126 unsigned int addr,
127 const void *src, int count)
129 int rval, i;
130 u16 regaddr;
131 struct spi_transfer t_addr = {
132 .tx_buf = &regaddr,
133 .len = sizeof(regaddr),
135 struct spi_transfer t_msg = {
136 .tx_buf = src,
137 .len = count,
139 struct spi_message m;
141 regaddr = (SDIO_TO_SPI_ADDR(addr))<<12;
142 regaddr &= SET_WRITE;
143 regaddr |= (count>>1);
145 #ifdef SPI_DEBUG
146 pr_info("WRITE: %04d to 0x%02x (%04x)\n", count, addr, regaddr);
147 #endif
149 /* Header is LE16 */
150 regaddr = (__force u16)cpu_to_le16(regaddr);
152 /* We have to byteswap if the SPI bus is limited to 8b operation
153 or we are running on a Big Endian system
155 #if defined(__LITTLE_ENDIAN)
156 if (self->func->bits_per_word == 8)
157 #endif
159 uint16_t *buf = (uint16_t *)src;
160 regaddr = swab16(regaddr);
161 for (i = 0; i < ((count + 1) >> 1); i++)
162 buf[i] = swab16(buf[i]);
165 #ifdef SPI_DEBUG
166 pr_info("WRITE: ");
167 for (i = 0; i < t_addr.len; i++)
168 printk("%02x ", ((u8 *)t_addr.tx_buf)[i]);
169 printk(" : ");
170 for (i = 0; i < t_msg.len; i++)
171 printk("%02x ", ((u8 *)t_msg.tx_buf)[i]);
172 printk("\n");
173 #endif
175 spi_message_init(&m);
176 spi_message_add_tail(&t_addr, &m);
177 spi_message_add_tail(&t_msg, &m);
178 rval = spi_sync(self->func, &m);
180 #ifdef SPI_DEBUG
181 pr_info("WROTE: %d\n", m.actual_length);
182 #endif
184 #if defined(__LITTLE_ENDIAN)
185 /* We have to byteswap if the SPI bus is limited to 8b operation */
186 if (self->func->bits_per_word == 8)
187 #endif
189 uint16_t *buf = (uint16_t *)src;
190 for (i = 0; i < ((count + 1) >> 1); i++)
191 buf[i] = swab16(buf[i]);
193 return rval;
196 static void cw1200_spi_lock(struct hwbus_priv *self)
198 unsigned long flags;
200 DECLARE_WAITQUEUE(wait, current);
202 might_sleep();
204 add_wait_queue(&self->wq, &wait);
205 spin_lock_irqsave(&self->lock, flags);
206 while (1) {
207 set_current_state(TASK_UNINTERRUPTIBLE);
208 if (!self->claimed)
209 break;
210 spin_unlock_irqrestore(&self->lock, flags);
211 schedule();
212 spin_lock_irqsave(&self->lock, flags);
214 set_current_state(TASK_RUNNING);
215 self->claimed = 1;
216 spin_unlock_irqrestore(&self->lock, flags);
217 remove_wait_queue(&self->wq, &wait);
219 return;
222 static void cw1200_spi_unlock(struct hwbus_priv *self)
224 unsigned long flags;
226 spin_lock_irqsave(&self->lock, flags);
227 self->claimed = 0;
228 spin_unlock_irqrestore(&self->lock, flags);
229 wake_up(&self->wq);
231 return;
234 static irqreturn_t cw1200_spi_irq_handler(int irq, void *dev_id)
236 struct hwbus_priv *self = dev_id;
238 if (self->core) {
239 cw1200_spi_lock(self);
240 cw1200_irq_handler(self->core);
241 cw1200_spi_unlock(self);
242 return IRQ_HANDLED;
243 } else {
244 return IRQ_NONE;
248 static int cw1200_spi_irq_subscribe(struct hwbus_priv *self)
250 int ret;
252 pr_debug("SW IRQ subscribe\n");
254 ret = request_threaded_irq(self->func->irq, NULL,
255 cw1200_spi_irq_handler,
256 IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
257 "cw1200_wlan_irq", self);
258 if (WARN_ON(ret < 0))
259 goto exit;
261 ret = enable_irq_wake(self->func->irq);
262 if (WARN_ON(ret))
263 goto free_irq;
265 return 0;
267 free_irq:
268 free_irq(self->func->irq, self);
269 exit:
270 return ret;
273 static void cw1200_spi_irq_unsubscribe(struct hwbus_priv *self)
275 pr_debug("SW IRQ unsubscribe\n");
276 disable_irq_wake(self->func->irq);
277 free_irq(self->func->irq, self);
280 static int cw1200_spi_off(struct hwbus_priv *self, const struct cw1200_platform_data_spi *pdata)
282 if (self->reset) {
283 /* Assert RESET, note active low */
284 gpiod_set_value(self->reset, 1);
285 msleep(30); /* Min is 2 * CLK32K cycles */
288 if (pdata->power_ctrl)
289 pdata->power_ctrl(pdata, false);
290 if (pdata->clk_ctrl)
291 pdata->clk_ctrl(pdata, false);
293 return 0;
296 static int cw1200_spi_on(struct hwbus_priv *self, const struct cw1200_platform_data_spi *pdata)
298 /* Ensure I/Os are pulled low */
299 gpiod_direction_output(self->reset, 1); /* Active low */
300 gpiod_direction_output(self->powerup, 0);
301 if (self->reset || self->powerup)
302 msleep(10); /* Settle time? */
304 /* Enable 3v3 and 1v8 to hardware */
305 if (pdata->power_ctrl) {
306 if (pdata->power_ctrl(pdata, true)) {
307 pr_err("power_ctrl() failed!\n");
308 return -1;
312 /* Enable CLK32K */
313 if (pdata->clk_ctrl) {
314 if (pdata->clk_ctrl(pdata, true)) {
315 pr_err("clk_ctrl() failed!\n");
316 return -1;
318 msleep(10); /* Delay until clock is stable for 2 cycles */
321 /* Enable POWERUP signal */
322 if (self->powerup) {
323 gpiod_set_value(self->powerup, 1);
324 msleep(250); /* or more..? */
326 /* Assert RSTn signal, note active low */
327 if (self->reset) {
328 gpiod_set_value(self->reset, 0);
329 msleep(50); /* Or more..? */
331 return 0;
334 static size_t cw1200_spi_align_size(struct hwbus_priv *self, size_t size)
336 return size & 1 ? size + 1 : size;
339 static int cw1200_spi_pm(struct hwbus_priv *self, bool suspend)
341 return irq_set_irq_wake(self->func->irq, suspend);
344 static const struct hwbus_ops cw1200_spi_hwbus_ops = {
345 .hwbus_memcpy_fromio = cw1200_spi_memcpy_fromio,
346 .hwbus_memcpy_toio = cw1200_spi_memcpy_toio,
347 .lock = cw1200_spi_lock,
348 .unlock = cw1200_spi_unlock,
349 .align_size = cw1200_spi_align_size,
350 .power_mgmt = cw1200_spi_pm,
353 /* Probe Function to be called by SPI stack when device is discovered */
354 static int cw1200_spi_probe(struct spi_device *func)
356 const struct cw1200_platform_data_spi *plat_data =
357 dev_get_platdata(&func->dev);
358 struct hwbus_priv *self;
359 int status;
361 /* Sanity check speed */
362 if (func->max_speed_hz > 52000000)
363 func->max_speed_hz = 52000000;
364 if (func->max_speed_hz < 1000000)
365 func->max_speed_hz = 1000000;
367 /* Fix up transfer size */
368 if (plat_data->spi_bits_per_word)
369 func->bits_per_word = plat_data->spi_bits_per_word;
370 if (!func->bits_per_word)
371 func->bits_per_word = 16;
373 /* And finally.. */
374 func->mode = SPI_MODE_0;
376 pr_info("cw1200_wlan_spi: Probe called (CS %d M %d BPW %d CLK %d)\n",
377 spi_get_chipselect(func, 0), func->mode, func->bits_per_word,
378 func->max_speed_hz);
380 self = devm_kzalloc(&func->dev, sizeof(*self), GFP_KERNEL);
381 if (!self) {
382 pr_err("Can't allocate SPI hwbus_priv.");
383 return -ENOMEM;
386 /* Request reset asserted */
387 self->reset = devm_gpiod_get_optional(&func->dev, "reset", GPIOD_OUT_HIGH);
388 if (IS_ERR(self->reset))
389 return dev_err_probe(&func->dev, PTR_ERR(self->reset),
390 "could not get reset GPIO\n");
391 gpiod_set_consumer_name(self->reset, "cw1200_wlan_reset");
393 self->powerup = devm_gpiod_get_optional(&func->dev, "powerup", GPIOD_OUT_LOW);
394 if (IS_ERR(self->powerup))
395 return dev_err_probe(&func->dev, PTR_ERR(self->powerup),
396 "could not get powerup GPIO\n");
397 gpiod_set_consumer_name(self->reset, "cw1200_wlan_powerup");
399 if (cw1200_spi_on(self, plat_data)) {
400 pr_err("spi_on() failed!\n");
401 return -ENODEV;
404 if (spi_setup(func)) {
405 pr_err("spi_setup() failed!\n");
406 return -ENODEV;
409 self->pdata = plat_data;
410 self->func = func;
411 spin_lock_init(&self->lock);
413 spi_set_drvdata(func, self);
415 init_waitqueue_head(&self->wq);
417 status = cw1200_spi_irq_subscribe(self);
419 status = cw1200_core_probe(&cw1200_spi_hwbus_ops,
420 self, &func->dev, &self->core,
421 self->pdata->ref_clk,
422 self->pdata->macaddr,
423 self->pdata->sdd_file,
424 self->pdata->have_5ghz);
426 if (status) {
427 cw1200_spi_irq_unsubscribe(self);
428 cw1200_spi_off(self, plat_data);
431 return status;
434 /* Disconnect Function to be called by SPI stack when device is disconnected */
435 static void cw1200_spi_disconnect(struct spi_device *func)
437 struct hwbus_priv *self = spi_get_drvdata(func);
439 if (self) {
440 cw1200_spi_irq_unsubscribe(self);
441 if (self->core) {
442 cw1200_core_release(self->core);
443 self->core = NULL;
446 cw1200_spi_off(self, dev_get_platdata(&func->dev));
449 static int __maybe_unused cw1200_spi_suspend(struct device *dev)
451 struct hwbus_priv *self = spi_get_drvdata(to_spi_device(dev));
453 if (self && !cw1200_can_suspend(self->core))
454 return -EAGAIN;
456 /* XXX notify host that we have to keep CW1200 powered on? */
457 return 0;
460 static SIMPLE_DEV_PM_OPS(cw1200_pm_ops, cw1200_spi_suspend, NULL);
462 static struct spi_driver spi_driver = {
463 .probe = cw1200_spi_probe,
464 .remove = cw1200_spi_disconnect,
465 .driver = {
466 .name = "cw1200_wlan_spi",
467 .pm = IS_ENABLED(CONFIG_PM) ? &cw1200_pm_ops : NULL,
471 module_spi_driver(spi_driver);