drm/rockchip: Don't change hdmi reference clock rate
[drm/drm-misc.git] / drivers / phy / qualcomm / phy-qcom-qmp-pcs-v6_20.h
blob4d9615cc0383cee27f312cbb39771d7ae79f71bb
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (c) 2023, Linaro Limited
4 */
6 #ifndef QCOM_PHY_QMP_PCS_V6_20_H_
7 #define QCOM_PHY_QMP_PCS_V6_20_H_
9 /* Only for QMP V6_20 PHY - USB/PCIe PCS registers */
10 #define QPHY_V6_20_PCS_G12S1_TXDEEMPH_M6DB 0x170
11 #define QPHY_V6_20_PCS_G3S2_PRE_GAIN 0x178
12 #define QPHY_V6_20_PCS_RX_SIGDET_LVL 0x190
13 #define QPHY_V6_20_PCS_COM_ELECIDLE_DLY_SEL 0x1b8
14 #define QPHY_V6_20_PCS_TX_RX_CONFIG1 0x1dc
15 #define QPHY_V6_20_PCS_TX_RX_CONFIG2 0x1e0
16 #define QPHY_V6_20_PCS_EQ_CONFIG4 0x1f8
17 #define QPHY_V6_20_PCS_EQ_CONFIG5 0x1fc
19 #endif