1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2017, The Linux Foundation. All rights reserved.
6 #include <linux/module.h>
8 #include <linux/platform_device.h>
10 #include "pinctrl-msm.h"
12 #define REG_SIZE 0x1000
13 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
15 .grp = PINCTRL_PINGROUP("gpio" #id, \
17 ARRAY_SIZE(gpio##id##_pins)), \
19 msm_mux_gpio, /* gpio mode */ \
31 .ctl_reg = REG_SIZE * id, \
32 .io_reg = 0x4 + REG_SIZE * id, \
33 .intr_cfg_reg = 0x8 + REG_SIZE * id, \
34 .intr_status_reg = 0xc + REG_SIZE * id, \
35 .intr_target_reg = 0x8 + REG_SIZE * id, \
42 .intr_enable_bit = 0, \
43 .intr_status_bit = 0, \
44 .intr_target_bit = 5, \
45 .intr_target_kpss_val = 3, \
46 .intr_raw_status_bit = 4, \
47 .intr_polarity_bit = 1, \
48 .intr_detection_bit = 2, \
49 .intr_detection_width = 2, \
52 static const struct pinctrl_pin_desc ipq8074_pins
[] = {
53 PINCTRL_PIN(0, "GPIO_0"),
54 PINCTRL_PIN(1, "GPIO_1"),
55 PINCTRL_PIN(2, "GPIO_2"),
56 PINCTRL_PIN(3, "GPIO_3"),
57 PINCTRL_PIN(4, "GPIO_4"),
58 PINCTRL_PIN(5, "GPIO_5"),
59 PINCTRL_PIN(6, "GPIO_6"),
60 PINCTRL_PIN(7, "GPIO_7"),
61 PINCTRL_PIN(8, "GPIO_8"),
62 PINCTRL_PIN(9, "GPIO_9"),
63 PINCTRL_PIN(10, "GPIO_10"),
64 PINCTRL_PIN(11, "GPIO_11"),
65 PINCTRL_PIN(12, "GPIO_12"),
66 PINCTRL_PIN(13, "GPIO_13"),
67 PINCTRL_PIN(14, "GPIO_14"),
68 PINCTRL_PIN(15, "GPIO_15"),
69 PINCTRL_PIN(16, "GPIO_16"),
70 PINCTRL_PIN(17, "GPIO_17"),
71 PINCTRL_PIN(18, "GPIO_18"),
72 PINCTRL_PIN(19, "GPIO_19"),
73 PINCTRL_PIN(20, "GPIO_20"),
74 PINCTRL_PIN(21, "GPIO_21"),
75 PINCTRL_PIN(22, "GPIO_22"),
76 PINCTRL_PIN(23, "GPIO_23"),
77 PINCTRL_PIN(24, "GPIO_24"),
78 PINCTRL_PIN(25, "GPIO_25"),
79 PINCTRL_PIN(26, "GPIO_26"),
80 PINCTRL_PIN(27, "GPIO_27"),
81 PINCTRL_PIN(28, "GPIO_28"),
82 PINCTRL_PIN(29, "GPIO_29"),
83 PINCTRL_PIN(30, "GPIO_30"),
84 PINCTRL_PIN(31, "GPIO_31"),
85 PINCTRL_PIN(32, "GPIO_32"),
86 PINCTRL_PIN(33, "GPIO_33"),
87 PINCTRL_PIN(34, "GPIO_34"),
88 PINCTRL_PIN(35, "GPIO_35"),
89 PINCTRL_PIN(36, "GPIO_36"),
90 PINCTRL_PIN(37, "GPIO_37"),
91 PINCTRL_PIN(38, "GPIO_38"),
92 PINCTRL_PIN(39, "GPIO_39"),
93 PINCTRL_PIN(40, "GPIO_40"),
94 PINCTRL_PIN(41, "GPIO_41"),
95 PINCTRL_PIN(42, "GPIO_42"),
96 PINCTRL_PIN(43, "GPIO_43"),
97 PINCTRL_PIN(44, "GPIO_44"),
98 PINCTRL_PIN(45, "GPIO_45"),
99 PINCTRL_PIN(46, "GPIO_46"),
100 PINCTRL_PIN(47, "GPIO_47"),
101 PINCTRL_PIN(48, "GPIO_48"),
102 PINCTRL_PIN(49, "GPIO_49"),
103 PINCTRL_PIN(50, "GPIO_50"),
104 PINCTRL_PIN(51, "GPIO_51"),
105 PINCTRL_PIN(52, "GPIO_52"),
106 PINCTRL_PIN(53, "GPIO_53"),
107 PINCTRL_PIN(54, "GPIO_54"),
108 PINCTRL_PIN(55, "GPIO_55"),
109 PINCTRL_PIN(56, "GPIO_56"),
110 PINCTRL_PIN(57, "GPIO_57"),
111 PINCTRL_PIN(58, "GPIO_58"),
112 PINCTRL_PIN(59, "GPIO_59"),
113 PINCTRL_PIN(60, "GPIO_60"),
114 PINCTRL_PIN(61, "GPIO_61"),
115 PINCTRL_PIN(62, "GPIO_62"),
116 PINCTRL_PIN(63, "GPIO_63"),
117 PINCTRL_PIN(64, "GPIO_64"),
118 PINCTRL_PIN(65, "GPIO_65"),
119 PINCTRL_PIN(66, "GPIO_66"),
120 PINCTRL_PIN(67, "GPIO_67"),
121 PINCTRL_PIN(68, "GPIO_68"),
122 PINCTRL_PIN(69, "GPIO_69"),
125 #define DECLARE_MSM_GPIO_PINS(pin) \
126 static const unsigned int gpio##pin##_pins[] = { pin }
127 DECLARE_MSM_GPIO_PINS(0);
128 DECLARE_MSM_GPIO_PINS(1);
129 DECLARE_MSM_GPIO_PINS(2);
130 DECLARE_MSM_GPIO_PINS(3);
131 DECLARE_MSM_GPIO_PINS(4);
132 DECLARE_MSM_GPIO_PINS(5);
133 DECLARE_MSM_GPIO_PINS(6);
134 DECLARE_MSM_GPIO_PINS(7);
135 DECLARE_MSM_GPIO_PINS(8);
136 DECLARE_MSM_GPIO_PINS(9);
137 DECLARE_MSM_GPIO_PINS(10);
138 DECLARE_MSM_GPIO_PINS(11);
139 DECLARE_MSM_GPIO_PINS(12);
140 DECLARE_MSM_GPIO_PINS(13);
141 DECLARE_MSM_GPIO_PINS(14);
142 DECLARE_MSM_GPIO_PINS(15);
143 DECLARE_MSM_GPIO_PINS(16);
144 DECLARE_MSM_GPIO_PINS(17);
145 DECLARE_MSM_GPIO_PINS(18);
146 DECLARE_MSM_GPIO_PINS(19);
147 DECLARE_MSM_GPIO_PINS(20);
148 DECLARE_MSM_GPIO_PINS(21);
149 DECLARE_MSM_GPIO_PINS(22);
150 DECLARE_MSM_GPIO_PINS(23);
151 DECLARE_MSM_GPIO_PINS(24);
152 DECLARE_MSM_GPIO_PINS(25);
153 DECLARE_MSM_GPIO_PINS(26);
154 DECLARE_MSM_GPIO_PINS(27);
155 DECLARE_MSM_GPIO_PINS(28);
156 DECLARE_MSM_GPIO_PINS(29);
157 DECLARE_MSM_GPIO_PINS(30);
158 DECLARE_MSM_GPIO_PINS(31);
159 DECLARE_MSM_GPIO_PINS(32);
160 DECLARE_MSM_GPIO_PINS(33);
161 DECLARE_MSM_GPIO_PINS(34);
162 DECLARE_MSM_GPIO_PINS(35);
163 DECLARE_MSM_GPIO_PINS(36);
164 DECLARE_MSM_GPIO_PINS(37);
165 DECLARE_MSM_GPIO_PINS(38);
166 DECLARE_MSM_GPIO_PINS(39);
167 DECLARE_MSM_GPIO_PINS(40);
168 DECLARE_MSM_GPIO_PINS(41);
169 DECLARE_MSM_GPIO_PINS(42);
170 DECLARE_MSM_GPIO_PINS(43);
171 DECLARE_MSM_GPIO_PINS(44);
172 DECLARE_MSM_GPIO_PINS(45);
173 DECLARE_MSM_GPIO_PINS(46);
174 DECLARE_MSM_GPIO_PINS(47);
175 DECLARE_MSM_GPIO_PINS(48);
176 DECLARE_MSM_GPIO_PINS(49);
177 DECLARE_MSM_GPIO_PINS(50);
178 DECLARE_MSM_GPIO_PINS(51);
179 DECLARE_MSM_GPIO_PINS(52);
180 DECLARE_MSM_GPIO_PINS(53);
181 DECLARE_MSM_GPIO_PINS(54);
182 DECLARE_MSM_GPIO_PINS(55);
183 DECLARE_MSM_GPIO_PINS(56);
184 DECLARE_MSM_GPIO_PINS(57);
185 DECLARE_MSM_GPIO_PINS(58);
186 DECLARE_MSM_GPIO_PINS(59);
187 DECLARE_MSM_GPIO_PINS(60);
188 DECLARE_MSM_GPIO_PINS(61);
189 DECLARE_MSM_GPIO_PINS(62);
190 DECLARE_MSM_GPIO_PINS(63);
191 DECLARE_MSM_GPIO_PINS(64);
192 DECLARE_MSM_GPIO_PINS(65);
193 DECLARE_MSM_GPIO_PINS(66);
194 DECLARE_MSM_GPIO_PINS(67);
195 DECLARE_MSM_GPIO_PINS(68);
196 DECLARE_MSM_GPIO_PINS(69);
198 enum ipq8074_functions
{
204 msm_mux_audio_rxbclk
,
206 msm_mux_audio_rxfsync
,
207 msm_mux_audio_rxmclk
,
208 msm_mux_audio_txbclk
,
210 msm_mux_audio_txfsync
,
211 msm_mux_audio_txmclk
,
286 msm_mux_qdss_cti_trig_in_a0
,
287 msm_mux_qdss_cti_trig_in_a1
,
288 msm_mux_qdss_cti_trig_in_b0
,
289 msm_mux_qdss_cti_trig_in_b1
,
290 msm_mux_qdss_cti_trig_out_a0
,
291 msm_mux_qdss_cti_trig_out_a1
,
292 msm_mux_qdss_cti_trig_out_b0
,
293 msm_mux_qdss_cti_trig_out_b1
,
294 msm_mux_qdss_traceclk_a
,
295 msm_mux_qdss_traceclk_b
,
296 msm_mux_qdss_tracectl_a
,
297 msm_mux_qdss_tracectl_b
,
298 msm_mux_qdss_tracedata_a
,
299 msm_mux_qdss_tracedata_b
,
314 static const char * const qpic_groups
[] = {
315 "gpio0", /* LCD_TE */
316 "gpio1", /* BUSY_N */
317 "gpio2", /* LCD_RS_N */
320 "gpio5", /* DATA[0] */
321 "gpio6", /* DATA[1] */
322 "gpio7", /* DATA[2] */
323 "gpio8", /* DATA[3] */
324 "gpio9", /* CS_CSR_LCD */
326 "gpio11", /* NAND_CS_N */
327 "gpio12", /* DATA[4] */
328 "gpio13", /* DATA[5] */
329 "gpio14", /* DATA[6] */
330 "gpio15", /* DATA[7] */
331 "gpio16", /* DATA[8] */
335 static const char * const blsp5_i2c_groups
[] = {
339 static const char * const blsp5_spi_groups
[] = {
340 "gpio0", "gpio2", "gpio9", "gpio16",
343 static const char * const wci2a_groups
[] = {
347 static const char * const blsp3_spi3_groups
[] = {
348 "gpio0", "gpio2", "gpio9",
351 static const char * const burn0_groups
[] = {
355 static const char * const pcm_zsi0_groups
[] = {
359 static const char * const blsp5_uart_groups
[] = {
360 "gpio0", "gpio2", "gpio9", "gpio16",
363 static const char * const mac1_sa2_groups
[] = {
367 static const char * const blsp3_spi0_groups
[] = {
368 "gpio1", "gpio3", "gpio4",
371 static const char * const burn1_groups
[] = {
375 static const char * const mac0_sa1_groups
[] = {
379 static const char * const qdss_cti_trig_out_b0_groups
[] = {
383 static const char * const qdss_cti_trig_in_b0_groups
[] = {
387 static const char * const blsp4_uart0_groups
[] = {
388 "gpio5", "gpio6", "gpio7", "gpio8",
391 static const char * const blsp4_i2c0_groups
[] = {
395 static const char * const blsp4_spi0_groups
[] = {
396 "gpio5", "gpio6", "gpio7", "gpio8",
399 static const char * const mac2_sa1_groups
[] = {
403 static const char * const qdss_cti_trig_out_b1_groups
[] = {
407 static const char * const qdss_cti_trig_in_b1_groups
[] = {
411 static const char * const cxc0_groups
[] = {
415 static const char * const mac1_sa3_groups
[] = {
419 static const char * const qdss_cti_trig_in_a1_groups
[] = {
423 static const char * const qdss_cti_trig_out_a1_groups
[] = {
427 static const char * const wci2c_groups
[] = {
431 static const char * const qdss_cti_trig_in_a0_groups
[] = {
435 static const char * const qdss_cti_trig_out_a0_groups
[] = {
439 static const char * const qdss_traceclk_b_groups
[] = {
443 static const char * const qdss_tracectl_b_groups
[] = {
447 static const char * const pcm_zsi1_groups
[] = {
451 static const char * const qdss_tracedata_b_groups
[] = {
452 "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", "gpio22",
453 "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29",
457 static const char * const led0_groups
[] = {
461 static const char * const pwm0_groups
[] = {
462 "gpio18", "gpio21", "gpio25", "gpio29", "gpio63",
465 static const char * const led1_groups
[] = {
469 static const char * const pwm1_groups
[] = {
470 "gpio19", "gpio22", "gpio26", "gpio30", "gpio64",
473 static const char * const led2_groups
[] = {
477 static const char * const pwm2_groups
[] = {
478 "gpio20", "gpio23", "gpio27", "gpio31", "gpio66",
481 static const char * const blsp4_uart1_groups
[] = {
482 "gpio21", "gpio22", "gpio23", "gpio24",
485 static const char * const blsp4_i2c1_groups
[] = {
489 static const char * const blsp4_spi1_groups
[] = {
490 "gpio21", "gpio22", "gpio23", "gpio24",
493 static const char * const wci2d_groups
[] = {
497 static const char * const mac1_sa1_groups
[] = {
501 static const char * const blsp3_spi2_groups
[] = {
502 "gpio21", "gpio22", "gpio23",
505 static const char * const pwm3_groups
[] = {
506 "gpio24", "gpio28", "gpio32", "gpio67",
509 static const char * const audio_txmclk_groups
[] = {
513 static const char * const audio_txbclk_groups
[] = {
517 static const char * const audio_txfsync_groups
[] = {
521 static const char * const audio_txd_groups
[] = {
525 static const char * const audio_rxmclk_groups
[] = {
529 static const char * const atest_char0_groups
[] = {
533 static const char * const audio_rxbclk_groups
[] = {
537 static const char * const atest_char1_groups
[] = {
541 static const char * const audio_rxfsync_groups
[] = {
545 static const char * const atest_char2_groups
[] = {
549 static const char * const audio_rxd_groups
[] = {
553 static const char * const atest_char3_groups
[] = {
557 static const char * const pcm_drx_groups
[] = {
561 static const char * const mac1_sa0_groups
[] = {
565 static const char * const mac0_sa0_groups
[] = {
569 static const char * const pcm_dtx_groups
[] = {
573 static const char * const pcm_fsync_groups
[] = {
577 static const char * const mac2_sa0_groups
[] = {
581 static const char * const qdss_traceclk_a_groups
[] = {
585 static const char * const pcm_pclk_groups
[] = {
589 static const char * const qdss_tracectl_a_groups
[] = {
593 static const char * const atest_char_groups
[] = {
597 static const char * const qdss_tracedata_a_groups
[] = {
598 "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43",
599 "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", "gpio50",
603 static const char * const blsp0_uart_groups
[] = {
604 "gpio38", "gpio39", "gpio40", "gpio41",
607 static const char * const blsp0_i2c_groups
[] = {
611 static const char * const blsp0_spi_groups
[] = {
612 "gpio38", "gpio39", "gpio40", "gpio41",
615 static const char * const blsp1_uart_groups
[] = {
616 "gpio42", "gpio43", "gpio44", "gpio45",
619 static const char * const blsp1_i2c_groups
[] = {
623 static const char * const blsp1_spi_groups
[] = {
624 "gpio42", "gpio43", "gpio44", "gpio45",
627 static const char * const blsp2_uart_groups
[] = {
628 "gpio46", "gpio47", "gpio48", "gpio49",
631 static const char * const blsp2_i2c_groups
[] = {
635 static const char * const blsp2_spi_groups
[] = {
636 "gpio46", "gpio47", "gpio48", "gpio49",
639 static const char * const blsp3_uart_groups
[] = {
640 "gpio50", "gpio51", "gpio52", "gpio53",
643 static const char * const blsp3_i2c_groups
[] = {
647 static const char * const blsp3_spi_groups
[] = {
648 "gpio50", "gpio51", "gpio52", "gpio53",
651 static const char * const pta2_0_groups
[] = {
655 static const char * const wci2b_groups
[] = {
659 static const char * const cxc1_groups
[] = {
663 static const char * const blsp3_spi1_groups
[] = {
664 "gpio54", "gpio55", "gpio56",
667 static const char * const pta2_1_groups
[] = {
671 static const char * const pta2_2_groups
[] = {
675 static const char * const pcie0_clk_groups
[] = {
679 static const char * const dbg_out_groups
[] = {
683 static const char * const cri_trng0_groups
[] = {
687 static const char * const pcie0_rst_groups
[] = {
691 static const char * const cri_trng1_groups
[] = {
695 static const char * const pcie0_wake_groups
[] = {
699 static const char * const cri_trng_groups
[] = {
703 static const char * const pcie1_clk_groups
[] = {
707 static const char * const rx2_groups
[] = {
711 static const char * const ldo_update_groups
[] = {
715 static const char * const pcie1_rst_groups
[] = {
719 static const char * const ldo_en_groups
[] = {
723 static const char * const pcie1_wake_groups
[] = {
727 static const char * const gcc_plltest_groups
[] = {
731 static const char * const sd_card_groups
[] = {
735 static const char * const pta1_1_groups
[] = {
739 static const char * const rx1_groups
[] = {
743 static const char * const pta1_2_groups
[] = {
747 static const char * const gcc_tlmm_groups
[] = {
751 static const char * const pta1_0_groups
[] = {
755 static const char * const prng_rosc_groups
[] = {
759 static const char * const sd_write_groups
[] = {
763 static const char * const rx0_groups
[] = {
767 static const char * const tsens_max_groups
[] = {
771 static const char * const mdc_groups
[] = {
775 static const char * const mdio_groups
[] = {
779 static const char * const gpio_groups
[] = {
780 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
781 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
782 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
783 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
784 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
785 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
786 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
787 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
788 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
789 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69",
792 static const struct pinfunction ipq8074_functions
[] = {
793 MSM_PIN_FUNCTION(atest_char
),
794 MSM_PIN_FUNCTION(atest_char0
),
795 MSM_PIN_FUNCTION(atest_char1
),
796 MSM_PIN_FUNCTION(atest_char2
),
797 MSM_PIN_FUNCTION(atest_char3
),
798 MSM_PIN_FUNCTION(audio_rxbclk
),
799 MSM_PIN_FUNCTION(audio_rxd
),
800 MSM_PIN_FUNCTION(audio_rxfsync
),
801 MSM_PIN_FUNCTION(audio_rxmclk
),
802 MSM_PIN_FUNCTION(audio_txbclk
),
803 MSM_PIN_FUNCTION(audio_txd
),
804 MSM_PIN_FUNCTION(audio_txfsync
),
805 MSM_PIN_FUNCTION(audio_txmclk
),
806 MSM_PIN_FUNCTION(blsp0_i2c
),
807 MSM_PIN_FUNCTION(blsp0_spi
),
808 MSM_PIN_FUNCTION(blsp0_uart
),
809 MSM_PIN_FUNCTION(blsp1_i2c
),
810 MSM_PIN_FUNCTION(blsp1_spi
),
811 MSM_PIN_FUNCTION(blsp1_uart
),
812 MSM_PIN_FUNCTION(blsp2_i2c
),
813 MSM_PIN_FUNCTION(blsp2_spi
),
814 MSM_PIN_FUNCTION(blsp2_uart
),
815 MSM_PIN_FUNCTION(blsp3_i2c
),
816 MSM_PIN_FUNCTION(blsp3_spi
),
817 MSM_PIN_FUNCTION(blsp3_spi0
),
818 MSM_PIN_FUNCTION(blsp3_spi1
),
819 MSM_PIN_FUNCTION(blsp3_spi2
),
820 MSM_PIN_FUNCTION(blsp3_spi3
),
821 MSM_PIN_FUNCTION(blsp3_uart
),
822 MSM_PIN_FUNCTION(blsp4_i2c0
),
823 MSM_PIN_FUNCTION(blsp4_i2c1
),
824 MSM_PIN_FUNCTION(blsp4_spi0
),
825 MSM_PIN_FUNCTION(blsp4_spi1
),
826 MSM_PIN_FUNCTION(blsp4_uart0
),
827 MSM_PIN_FUNCTION(blsp4_uart1
),
828 MSM_PIN_FUNCTION(blsp5_i2c
),
829 MSM_PIN_FUNCTION(blsp5_spi
),
830 MSM_PIN_FUNCTION(blsp5_uart
),
831 MSM_PIN_FUNCTION(burn0
),
832 MSM_PIN_FUNCTION(burn1
),
833 MSM_PIN_FUNCTION(cri_trng
),
834 MSM_PIN_FUNCTION(cri_trng0
),
835 MSM_PIN_FUNCTION(cri_trng1
),
836 MSM_PIN_FUNCTION(cxc0
),
837 MSM_PIN_FUNCTION(cxc1
),
838 MSM_PIN_FUNCTION(dbg_out
),
839 MSM_PIN_FUNCTION(gcc_plltest
),
840 MSM_PIN_FUNCTION(gcc_tlmm
),
841 MSM_PIN_FUNCTION(gpio
),
842 MSM_PIN_FUNCTION(ldo_en
),
843 MSM_PIN_FUNCTION(ldo_update
),
844 MSM_PIN_FUNCTION(led0
),
845 MSM_PIN_FUNCTION(led1
),
846 MSM_PIN_FUNCTION(led2
),
847 MSM_PIN_FUNCTION(mac0_sa0
),
848 MSM_PIN_FUNCTION(mac0_sa1
),
849 MSM_PIN_FUNCTION(mac1_sa0
),
850 MSM_PIN_FUNCTION(mac1_sa1
),
851 MSM_PIN_FUNCTION(mac1_sa2
),
852 MSM_PIN_FUNCTION(mac1_sa3
),
853 MSM_PIN_FUNCTION(mac2_sa0
),
854 MSM_PIN_FUNCTION(mac2_sa1
),
855 MSM_PIN_FUNCTION(mdc
),
856 MSM_PIN_FUNCTION(mdio
),
857 MSM_PIN_FUNCTION(pcie0_clk
),
858 MSM_PIN_FUNCTION(pcie0_rst
),
859 MSM_PIN_FUNCTION(pcie0_wake
),
860 MSM_PIN_FUNCTION(pcie1_clk
),
861 MSM_PIN_FUNCTION(pcie1_rst
),
862 MSM_PIN_FUNCTION(pcie1_wake
),
863 MSM_PIN_FUNCTION(pcm_drx
),
864 MSM_PIN_FUNCTION(pcm_dtx
),
865 MSM_PIN_FUNCTION(pcm_fsync
),
866 MSM_PIN_FUNCTION(pcm_pclk
),
867 MSM_PIN_FUNCTION(pcm_zsi0
),
868 MSM_PIN_FUNCTION(pcm_zsi1
),
869 MSM_PIN_FUNCTION(prng_rosc
),
870 MSM_PIN_FUNCTION(pta1_0
),
871 MSM_PIN_FUNCTION(pta1_1
),
872 MSM_PIN_FUNCTION(pta1_2
),
873 MSM_PIN_FUNCTION(pta2_0
),
874 MSM_PIN_FUNCTION(pta2_1
),
875 MSM_PIN_FUNCTION(pta2_2
),
876 MSM_PIN_FUNCTION(pwm0
),
877 MSM_PIN_FUNCTION(pwm1
),
878 MSM_PIN_FUNCTION(pwm2
),
879 MSM_PIN_FUNCTION(pwm3
),
880 MSM_PIN_FUNCTION(qdss_cti_trig_in_a0
),
881 MSM_PIN_FUNCTION(qdss_cti_trig_in_a1
),
882 MSM_PIN_FUNCTION(qdss_cti_trig_in_b0
),
883 MSM_PIN_FUNCTION(qdss_cti_trig_in_b1
),
884 MSM_PIN_FUNCTION(qdss_cti_trig_out_a0
),
885 MSM_PIN_FUNCTION(qdss_cti_trig_out_a1
),
886 MSM_PIN_FUNCTION(qdss_cti_trig_out_b0
),
887 MSM_PIN_FUNCTION(qdss_cti_trig_out_b1
),
888 MSM_PIN_FUNCTION(qdss_traceclk_a
),
889 MSM_PIN_FUNCTION(qdss_traceclk_b
),
890 MSM_PIN_FUNCTION(qdss_tracectl_a
),
891 MSM_PIN_FUNCTION(qdss_tracectl_b
),
892 MSM_PIN_FUNCTION(qdss_tracedata_a
),
893 MSM_PIN_FUNCTION(qdss_tracedata_b
),
894 MSM_PIN_FUNCTION(qpic
),
895 MSM_PIN_FUNCTION(rx0
),
896 MSM_PIN_FUNCTION(rx1
),
897 MSM_PIN_FUNCTION(rx2
),
898 MSM_PIN_FUNCTION(sd_card
),
899 MSM_PIN_FUNCTION(sd_write
),
900 MSM_PIN_FUNCTION(tsens_max
),
901 MSM_PIN_FUNCTION(wci2a
),
902 MSM_PIN_FUNCTION(wci2b
),
903 MSM_PIN_FUNCTION(wci2c
),
904 MSM_PIN_FUNCTION(wci2d
),
907 static const struct msm_pingroup ipq8074_groups
[] = {
908 PINGROUP(0, qpic
, blsp5_uart
, blsp5_i2c
, blsp5_spi
, wci2a
,
909 blsp3_spi3
, NA
, burn0
, NA
),
910 PINGROUP(1, qpic
, pcm_zsi0
, mac1_sa2
, blsp3_spi0
, NA
, burn1
, NA
, NA
,
912 PINGROUP(2, qpic
, blsp5_uart
, blsp5_i2c
, blsp5_spi
, wci2a
,
913 blsp3_spi3
, NA
, NA
, NA
),
914 PINGROUP(3, qpic
, mac0_sa1
, blsp3_spi0
, qdss_cti_trig_out_b0
, NA
, NA
,
916 PINGROUP(4, qpic
, mac0_sa1
, blsp3_spi0
, qdss_cti_trig_in_b0
, NA
, NA
,
918 PINGROUP(5, qpic
, blsp4_uart0
, blsp4_i2c0
, blsp4_spi0
, mac2_sa1
,
919 qdss_cti_trig_out_b1
, NA
, NA
, NA
),
920 PINGROUP(6, qpic
, blsp4_uart0
, blsp4_i2c0
, blsp4_spi0
, mac2_sa1
,
921 qdss_cti_trig_in_b1
, NA
, NA
, NA
),
922 PINGROUP(7, qpic
, blsp4_uart0
, blsp4_spi0
, NA
, NA
, NA
, NA
, NA
, NA
),
923 PINGROUP(8, qpic
, blsp4_uart0
, blsp4_spi0
, NA
, NA
, NA
, NA
, NA
, NA
),
924 PINGROUP(9, qpic
, blsp5_uart
, blsp5_spi
, cxc0
, mac1_sa3
, blsp3_spi3
,
925 qdss_cti_trig_in_a1
, NA
, NA
),
926 PINGROUP(10, qpic
, qdss_cti_trig_out_a1
, NA
, NA
, NA
, NA
, NA
, NA
,
928 PINGROUP(11, qpic
, wci2c
, mac1_sa2
, qdss_cti_trig_in_a0
, NA
, NA
, NA
,
930 PINGROUP(12, qpic
, qdss_cti_trig_out_a0
, NA
, NA
, NA
, NA
, NA
, NA
,
932 PINGROUP(13, qpic
, NA
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
933 PINGROUP(14, qpic
, qdss_traceclk_b
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
934 PINGROUP(15, qpic
, qdss_tracectl_b
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
935 PINGROUP(16, qpic
, blsp5_uart
, pcm_zsi1
, blsp5_spi
, cxc0
, mac1_sa3
,
936 qdss_tracedata_b
, NA
, NA
),
937 PINGROUP(17, qpic
, wci2c
, qdss_tracedata_b
, NA
, NA
, NA
, NA
, NA
, NA
),
938 PINGROUP(18, led0
, pwm0
, qdss_tracedata_b
, NA
, NA
, NA
, NA
, NA
, NA
),
939 PINGROUP(19, led1
, pwm1
, NA
, qdss_tracedata_b
, NA
, NA
, NA
, NA
, NA
),
940 PINGROUP(20, led2
, pwm2
, NA
, qdss_tracedata_b
, NA
, NA
, NA
, NA
, NA
),
941 PINGROUP(21, pwm0
, blsp4_uart1
, blsp4_i2c1
, blsp4_spi1
, wci2d
, mac1_sa1
,
942 blsp3_spi2
, NA
, qdss_tracedata_b
),
943 PINGROUP(22, pwm1
, blsp4_uart1
, blsp4_i2c1
, blsp4_spi1
, wci2d
, mac1_sa1
,
944 blsp3_spi2
, NA
, qdss_tracedata_b
),
945 PINGROUP(23, pwm2
, blsp4_uart1
, blsp4_spi1
, blsp3_spi2
, NA
,
946 qdss_tracedata_b
, NA
, NA
, NA
),
947 PINGROUP(24, pwm3
, blsp4_uart1
, blsp4_spi1
, NA
, qdss_tracedata_b
, NA
,
949 PINGROUP(25, audio_txmclk
, pwm0
, NA
, qdss_tracedata_b
, NA
, NA
, NA
, NA
,
951 PINGROUP(26, audio_txbclk
, pwm1
, NA
, qdss_tracedata_b
, NA
, NA
, NA
, NA
,
953 PINGROUP(27, audio_txfsync
, pwm2
, NA
, qdss_tracedata_b
, NA
, NA
, NA
,
955 PINGROUP(28, audio_txd
, pwm3
, NA
, qdss_tracedata_b
, NA
, NA
, NA
, NA
,
957 PINGROUP(29, audio_rxmclk
, pwm0
, atest_char0
, NA
, qdss_tracedata_b
,
959 PINGROUP(30, audio_rxbclk
, pwm1
, atest_char1
, NA
, qdss_tracedata_b
,
961 PINGROUP(31, audio_rxfsync
, pwm2
, atest_char2
, NA
, qdss_tracedata_b
,
963 PINGROUP(32, audio_rxd
, pwm3
, atest_char3
, NA
, NA
, NA
, NA
, NA
, NA
),
964 PINGROUP(33, pcm_drx
, mac1_sa0
, mac0_sa0
, NA
, NA
, NA
, NA
, NA
, NA
),
965 PINGROUP(34, pcm_dtx
, mac1_sa0
, mac0_sa0
, NA
, NA
, NA
, NA
, NA
, NA
),
966 PINGROUP(35, pcm_fsync
, mac2_sa0
, qdss_traceclk_a
, NA
, NA
, NA
, NA
, NA
, NA
),
967 PINGROUP(36, pcm_pclk
, mac2_sa0
, NA
, qdss_tracectl_a
, NA
, NA
, NA
, NA
, NA
),
968 PINGROUP(37, atest_char
, NA
, qdss_tracedata_a
, NA
, NA
, NA
, NA
, NA
, NA
),
969 PINGROUP(38, blsp0_uart
, blsp0_i2c
, blsp0_spi
, NA
, qdss_tracedata_a
,
971 PINGROUP(39, blsp0_uart
, blsp0_i2c
, blsp0_spi
, NA
, qdss_tracedata_a
,
973 PINGROUP(40, blsp0_uart
, blsp0_spi
, NA
, qdss_tracedata_a
, NA
, NA
, NA
,
975 PINGROUP(41, blsp0_uart
, blsp0_spi
, NA
, qdss_tracedata_a
, NA
, NA
, NA
,
977 PINGROUP(42, blsp1_uart
, blsp1_i2c
, blsp1_spi
, NA
, qdss_tracedata_a
,
979 PINGROUP(43, blsp1_uart
, blsp1_i2c
, blsp1_spi
, NA
, qdss_tracedata_a
,
981 PINGROUP(44, blsp1_uart
, blsp1_spi
, NA
, qdss_tracedata_a
, NA
, NA
, NA
,
983 PINGROUP(45, blsp1_uart
, blsp1_spi
, qdss_tracedata_a
, NA
, NA
, NA
, NA
,
985 PINGROUP(46, blsp2_uart
, blsp2_i2c
, blsp2_spi
, qdss_tracedata_a
, NA
,
987 PINGROUP(47, blsp2_uart
, blsp2_i2c
, blsp2_spi
, NA
, qdss_tracedata_a
,
989 PINGROUP(48, blsp2_uart
, blsp2_spi
, NA
, qdss_tracedata_a
, NA
, NA
, NA
,
991 PINGROUP(49, blsp2_uart
, blsp2_spi
, NA
, qdss_tracedata_a
, NA
, NA
, NA
,
993 PINGROUP(50, blsp3_uart
, blsp3_i2c
, blsp3_spi
, NA
, qdss_tracedata_a
,
995 PINGROUP(51, blsp3_uart
, blsp3_i2c
, blsp3_spi
, NA
, qdss_tracedata_a
,
997 PINGROUP(52, blsp3_uart
, blsp3_spi
, NA
, qdss_tracedata_a
, NA
, NA
, NA
,
999 PINGROUP(53, blsp3_uart
, blsp3_spi
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
1000 PINGROUP(54, pta2_0
, wci2b
, cxc1
, blsp3_spi1
, NA
, NA
, NA
, NA
, NA
),
1001 PINGROUP(55, pta2_1
, blsp3_spi1
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
1002 PINGROUP(56, pta2_2
, wci2b
, cxc1
, blsp3_spi1
, NA
, NA
, NA
, NA
, NA
),
1003 PINGROUP(57, pcie0_clk
, NA
, dbg_out
, cri_trng0
, NA
, NA
, NA
, NA
, NA
),
1004 PINGROUP(58, pcie0_rst
, NA
, cri_trng1
, NA
, NA
, NA
, NA
, NA
, NA
),
1005 PINGROUP(59, pcie0_wake
, NA
, cri_trng
, NA
, NA
, NA
, NA
, NA
, NA
),
1006 PINGROUP(60, pcie1_clk
, rx2
, ldo_update
, NA
, NA
, NA
, NA
, NA
, NA
),
1007 PINGROUP(61, pcie1_rst
, ldo_en
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
1008 PINGROUP(62, pcie1_wake
, gcc_plltest
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
1009 PINGROUP(63, sd_card
, pwm0
, NA
, gcc_plltest
, NA
, NA
, NA
, NA
, NA
),
1010 PINGROUP(64, pta1_1
, pwm1
, NA
, rx1
, NA
, NA
, NA
, NA
, NA
),
1011 PINGROUP(65, pta1_2
, NA
, gcc_tlmm
, NA
, NA
, NA
, NA
, NA
, NA
),
1012 PINGROUP(66, pta1_0
, pwm2
, prng_rosc
, NA
, NA
, NA
, NA
, NA
, NA
),
1013 PINGROUP(67, sd_write
, pwm3
, rx0
, tsens_max
, NA
, NA
, NA
, NA
, NA
),
1014 PINGROUP(68, mdc
, NA
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
1015 PINGROUP(69, mdio
, NA
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
1018 static const struct msm_pinctrl_soc_data ipq8074_pinctrl
= {
1019 .pins
= ipq8074_pins
,
1020 .npins
= ARRAY_SIZE(ipq8074_pins
),
1021 .functions
= ipq8074_functions
,
1022 .nfunctions
= ARRAY_SIZE(ipq8074_functions
),
1023 .groups
= ipq8074_groups
,
1024 .ngroups
= ARRAY_SIZE(ipq8074_groups
),
1028 static int ipq8074_pinctrl_probe(struct platform_device
*pdev
)
1030 return msm_pinctrl_probe(pdev
, &ipq8074_pinctrl
);
1033 static const struct of_device_id ipq8074_pinctrl_of_match
[] = {
1034 { .compatible
= "qcom,ipq8074-pinctrl", },
1038 static struct platform_driver ipq8074_pinctrl_driver
= {
1040 .name
= "ipq8074-pinctrl",
1041 .of_match_table
= ipq8074_pinctrl_of_match
,
1043 .probe
= ipq8074_pinctrl_probe
,
1044 .remove
= msm_pinctrl_remove
,
1047 static int __init
ipq8074_pinctrl_init(void)
1049 return platform_driver_register(&ipq8074_pinctrl_driver
);
1051 arch_initcall(ipq8074_pinctrl_init
);
1053 static void __exit
ipq8074_pinctrl_exit(void)
1055 platform_driver_unregister(&ipq8074_pinctrl_driver
);
1057 module_exit(ipq8074_pinctrl_exit
);
1059 MODULE_DESCRIPTION("Qualcomm ipq8074 pinctrl driver");
1060 MODULE_LICENSE("GPL v2");
1061 MODULE_DEVICE_TABLE(of
, ipq8074_pinctrl_of_match
);