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accel/qaic: Add AIC200 support
[drm/drm-misc.git] / drivers / usb / chipidea / udc.c
blob8a9b31fd5c89d8ddf4bb1bbe184a9c094983d38c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * udc.c - ChipIdea UDC driver
4 *
5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
6 *
7 * Author: David Lopo
8 */
9
10 #include <linux/delay.h>
11 #include <linux/device.h>
12 #include <linux/dmapool.h>
13 #include <linux/dma-direct.h>
14 #include <linux/err.h>
15 #include <linux/irqreturn.h>
16 #include <linux/kernel.h>
17 #include <linux/slab.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/pinctrl/consumer.h>
20 #include <linux/usb/ch9.h>
21 #include <linux/usb/gadget.h>
22 #include <linux/usb/otg-fsm.h>
23 #include <linux/usb/chipidea.h>
24
25 #include "ci.h"
26 #include "udc.h"
27 #include "bits.h"
28 #include "otg.h"
29 #include "otg_fsm.h"
30 #include "trace.h"
31
32 /* control endpoint description */
33 static const struct usb_endpoint_descriptor
34 ctrl_endpt_out_desc = {
35 .bLength = USB_DT_ENDPOINT_SIZE,
36 .bDescriptorType = USB_DT_ENDPOINT,
37
38 .bEndpointAddress = USB_DIR_OUT,
39 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
40 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
41 };
42
43 static const struct usb_endpoint_descriptor
44 ctrl_endpt_in_desc = {
45 .bLength = USB_DT_ENDPOINT_SIZE,
46 .bDescriptorType = USB_DT_ENDPOINT,
47
48 .bEndpointAddress = USB_DIR_IN,
49 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
50 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
51 };
52
53 static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
54 struct td_node *node);
55 /**
56 * hw_ep_bit: calculates the bit number
57 * @num: endpoint number
58 * @dir: endpoint direction
59 *
60 * This function returns bit number
61 */
62 static inline int hw_ep_bit(int num, int dir)
63 {
64 return num + ((dir == TX) ? 16 : 0);
65 }
66
67 static inline int ep_to_bit(struct ci_hdrc *ci, int n)
68 {
69 int fill = 16 - ci->hw_ep_max / 2;
70
71 if (n >= ci->hw_ep_max / 2)
72 n += fill;
73
74 return n;
75 }
76
77 /**
78 * hw_device_state: enables/disables interrupts (execute without interruption)
79 * @ci: the controller
80 * @dma: 0 => disable, !0 => enable and set dma engine
81 *
82 * This function returns an error code
83 */
84 static int hw_device_state(struct ci_hdrc *ci, u32 dma)
85 {
86 if (dma) {
87 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
88 /* interrupt, error, port change, reset, sleep/suspend */
89 hw_write(ci, OP_USBINTR, ~0,
90 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI);
91 } else {
92 hw_write(ci, OP_USBINTR, ~0, 0);
93 }
94 return 0;
95 }
96
97 /**
98 * hw_ep_flush: flush endpoint fifo (execute without interruption)
99 * @ci: the controller
100 * @num: endpoint number
101 * @dir: endpoint direction
102 *
103 * This function returns an error code
104 */
105 static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
106 {
107 int n = hw_ep_bit(num, dir);
108
109 do {
110 /* flush any pending transfer */
111 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
112 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
113 cpu_relax();
114 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
115
116 return 0;
117 }
118
119 /**
120 * hw_ep_disable: disables endpoint (execute without interruption)
121 * @ci: the controller
122 * @num: endpoint number
123 * @dir: endpoint direction
124 *
125 * This function returns an error code
126 */
127 static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
128 {
129 hw_write(ci, OP_ENDPTCTRL + num,
130 (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
131 return 0;
132 }
133
134 /**
135 * hw_ep_enable: enables endpoint (execute without interruption)
136 * @ci: the controller
137 * @num: endpoint number
138 * @dir: endpoint direction
139 * @type: endpoint type
140 *
141 * This function returns an error code
142 */
143 static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
144 {
145 u32 mask, data;
146
147 if (dir == TX) {
148 mask = ENDPTCTRL_TXT; /* type */
149 data = type << __ffs(mask);
150
151 mask |= ENDPTCTRL_TXS; /* unstall */
152 mask |= ENDPTCTRL_TXR; /* reset data toggle */
153 data |= ENDPTCTRL_TXR;
154 mask |= ENDPTCTRL_TXE; /* enable */
155 data |= ENDPTCTRL_TXE;
156 } else {
157 mask = ENDPTCTRL_RXT; /* type */
158 data = type << __ffs(mask);
159
160 mask |= ENDPTCTRL_RXS; /* unstall */
161 mask |= ENDPTCTRL_RXR; /* reset data toggle */
162 data |= ENDPTCTRL_RXR;
163 mask |= ENDPTCTRL_RXE; /* enable */
164 data |= ENDPTCTRL_RXE;
165 }
166 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
167 return 0;
168 }
169
170 /**
171 * hw_ep_get_halt: return endpoint halt status
172 * @ci: the controller
173 * @num: endpoint number
174 * @dir: endpoint direction
175 *
176 * This function returns 1 if endpoint halted
177 */
178 static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
179 {
180 u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
181
182 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
183 }
184
185 /**
186 * hw_ep_prime: primes endpoint (execute without interruption)
187 * @ci: the controller
188 * @num: endpoint number
189 * @dir: endpoint direction
190 * @is_ctrl: true if control endpoint
191 *
192 * This function returns an error code
193 */
194 static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
195 {
196 int n = hw_ep_bit(num, dir);
197
198 /* Synchronize before ep prime */
199 wmb();
200
201 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
202 return -EAGAIN;
203
204 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
205
206 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
207 cpu_relax();
208 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
209 return -EAGAIN;
210
211 /* status shoult be tested according with manual but it doesn't work */
212 return 0;
213 }
214
215 /**
216 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
217 * without interruption)
218 * @ci: the controller
219 * @num: endpoint number
220 * @dir: endpoint direction
221 * @value: true => stall, false => unstall
222 *
223 * This function returns an error code
224 */
225 static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
226 {
227 if (value != 0 && value != 1)
228 return -EINVAL;
229
230 do {
231 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
232 u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
233 u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
234
235 /* data toggle - reserved for EP0 but it's in ESS */
236 hw_write(ci, reg, mask_xs|mask_xr,
237 value ? mask_xs : mask_xr);
238 } while (value != hw_ep_get_halt(ci, num, dir));
239
240 return 0;
241 }
242
243 /**
244 * hw_port_is_high_speed: test if port is high speed
245 * @ci: the controller
246 *
247 * This function returns true if high speed port
248 */
249 static int hw_port_is_high_speed(struct ci_hdrc *ci)
250 {
251 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
252 hw_read(ci, OP_PORTSC, PORTSC_HSP);
253 }
254
255 /**
256 * hw_test_and_clear_complete: test & clear complete status (execute without
257 * interruption)
258 * @ci: the controller
259 * @n: endpoint number
260 *
261 * This function returns complete status
262 */
263 static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
264 {
265 n = ep_to_bit(ci, n);
266 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
267 }
268
269 /**
270 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
271 * without interruption)
272 * @ci: the controller
273 *
274 * This function returns active interrutps
275 */
276 static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
277 {
278 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
279
280 hw_write(ci, OP_USBSTS, ~0, reg);
281 return reg;
282 }
283
284 /**
285 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
286 * interruption)
287 * @ci: the controller
288 *
289 * This function returns guard value
290 */
291 static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
292 {
293 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
294 }
295
296 /**
297 * hw_test_and_set_setup_guard: test & set setup guard (execute without
298 * interruption)
299 * @ci: the controller
300 *
301 * This function returns guard value
302 */
303 static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
304 {
305 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
306 }
307
308 /**
309 * hw_usb_set_address: configures USB address (execute without interruption)
310 * @ci: the controller
311 * @value: new USB address
312 *
313 * This function explicitly sets the address, without the "USBADRA" (advance)
314 * feature, which is not supported by older versions of the controller.
315 */
316 static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
317 {
318 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
319 value << __ffs(DEVICEADDR_USBADR));
320 }
321
322 /**
323 * hw_usb_reset: restart device after a bus reset (execute without
324 * interruption)
325 * @ci: the controller
326 *
327 * This function returns an error code
328 */
329 static int hw_usb_reset(struct ci_hdrc *ci)
330 {
331 hw_usb_set_address(ci, 0);
332
333 /* ESS flushes only at end?!? */
334 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
335
336 /* clear setup token semaphores */
337 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
338
339 /* clear complete status */
340 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
341
342 /* wait until all bits cleared */
343 while (hw_read(ci, OP_ENDPTPRIME, ~0))
344 udelay(10); /* not RTOS friendly */
345
346 /* reset all endpoints ? */
347
348 /* reset internal status and wait for further instructions
349 no need to verify the port reset status (ESS does it) */
350
351 return 0;
352 }
353
354 /******************************************************************************
355 * UTIL block
356 *****************************************************************************/
357
358 static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
359 unsigned int length, struct scatterlist *s)
360 {
361 int i;
362 u32 temp;
363 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
364 GFP_ATOMIC);
365
366 if (node == NULL)
367 return -ENOMEM;
368
369 node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
370 if (node->ptr == NULL) {
371 kfree(node);
372 return -ENOMEM;
373 }
374
375 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
376 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
377 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
378 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
379 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
380
381 if (hwreq->req.length == 0
382 || hwreq->req.length % hwep->ep.maxpacket)
383 mul++;
384 node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
385 }
386
387 if (s) {
388 temp = (u32) (sg_dma_address(s) + hwreq->req.actual);
389 node->td_remaining_size = CI_MAX_BUF_SIZE - length;
390 } else {
391 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
392 }
393
394 if (length) {
395 node->ptr->page[0] = cpu_to_le32(temp);
396 for (i = 1; i < TD_PAGE_COUNT; i++) {
397 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
398 page &= ~TD_RESERVED_MASK;
399 node->ptr->page[i] = cpu_to_le32(page);
400 }
401 }
402
403 hwreq->req.actual += length;
404
405 if (!list_empty(&hwreq->tds)) {
406 /* get the last entry */
407 lastnode = list_entry(hwreq->tds.prev,
408 struct td_node, td);
409 lastnode->ptr->next = cpu_to_le32(node->dma);
410 }
411
412 INIT_LIST_HEAD(&node->td);
413 list_add_tail(&node->td, &hwreq->tds);
414
415 return 0;
416 }
417
418 /**
419 * _usb_addr: calculates endpoint address from direction & number
420 * @ep: endpoint
421 */
422 static inline u8 _usb_addr(struct ci_hw_ep *ep)
423 {
424 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
425 }
426
427 static int prepare_td_for_non_sg(struct ci_hw_ep *hwep,
428 struct ci_hw_req *hwreq)
429 {
430 unsigned int rest = hwreq->req.length;
431 int pages = TD_PAGE_COUNT;
432 int ret = 0;
433
434 if (rest == 0) {
435 ret = add_td_to_list(hwep, hwreq, 0, NULL);
436 if (ret < 0)
437 return ret;
438 }
439
440 /*
441 * The first buffer could be not page aligned.
442 * In that case we have to span into one extra td.
443 */
444 if (hwreq->req.dma % PAGE_SIZE)
445 pages--;
446
447 while (rest > 0) {
448 unsigned int count = min(hwreq->req.length - hwreq->req.actual,
449 (unsigned int)(pages * CI_HDRC_PAGE_SIZE));
450
451 ret = add_td_to_list(hwep, hwreq, count, NULL);
452 if (ret < 0)
453 return ret;
454
455 rest -= count;
456 }
457
458 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
459 && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
460 ret = add_td_to_list(hwep, hwreq, 0, NULL);
461 if (ret < 0)
462 return ret;
463 }
464
465 return ret;
466 }
467
468 static int prepare_td_per_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
469 struct scatterlist *s)
470 {
471 unsigned int rest = sg_dma_len(s);
472 int ret = 0;
473
474 hwreq->req.actual = 0;
475 while (rest > 0) {
476 unsigned int count = min_t(unsigned int, rest,
477 CI_MAX_BUF_SIZE);
478
479 ret = add_td_to_list(hwep, hwreq, count, s);
480 if (ret < 0)
481 return ret;
482
483 rest -= count;
484 }
485
486 return ret;
487 }
488
489 static void ci_add_buffer_entry(struct td_node *node, struct scatterlist *s)
490 {
491 int empty_td_slot_index = (CI_MAX_BUF_SIZE - node->td_remaining_size)
492 / CI_HDRC_PAGE_SIZE;
493 int i;
494 u32 token;
495
496 token = le32_to_cpu(node->ptr->token) + (sg_dma_len(s) << __ffs(TD_TOTAL_BYTES));
497 node->ptr->token = cpu_to_le32(token);
498
499 for (i = empty_td_slot_index; i < TD_PAGE_COUNT; i++) {
500 u32 page = (u32) sg_dma_address(s) +
501 (i - empty_td_slot_index) * CI_HDRC_PAGE_SIZE;
502
503 page &= ~TD_RESERVED_MASK;
504 node->ptr->page[i] = cpu_to_le32(page);
505 }
506 }
507
508 static int prepare_td_for_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
509 {
510 struct usb_request *req = &hwreq->req;
511 struct scatterlist *s = req->sg;
512 int ret = 0, i = 0;
513 struct td_node *node = NULL;
514
515 if (!s || req->zero || req->length == 0) {
516 dev_err(hwep->ci->dev, "not supported operation for sg\n");
517 return -EINVAL;
518 }
519
520 while (i++ < req->num_mapped_sgs) {
521 if (sg_dma_address(s) % PAGE_SIZE) {
522 dev_err(hwep->ci->dev, "not page aligned sg buffer\n");
523 return -EINVAL;
524 }
525
526 if (node && (node->td_remaining_size >= sg_dma_len(s))) {
527 ci_add_buffer_entry(node, s);
528 node->td_remaining_size -= sg_dma_len(s);
529 } else {
530 ret = prepare_td_per_sg(hwep, hwreq, s);
531 if (ret)
532 return ret;
533
534 node = list_entry(hwreq->tds.prev,
535 struct td_node, td);
536 }
537
538 s = sg_next(s);
539 }
540
541 return ret;
542 }
543
544 /*
545 * Verify if the scatterlist is valid by iterating each sg entry.
546 * Return invalid sg entry index which is less than num_sgs.
547 */
548 static int sglist_get_invalid_entry(struct device *dma_dev, u8 dir,
549 struct usb_request *req)
550 {
551 int i;
552 struct scatterlist *s = req->sg;
553
554 if (req->num_sgs == 1)
555 return 1;
556
557 dir = dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
558
559 for (i = 0; i < req->num_sgs; i++, s = sg_next(s)) {
560 /* Only small sg (generally last sg) may be bounced. If
561 * that happens. we can't ensure the addr is page-aligned
562 * after dma map.
563 */
564 if (dma_kmalloc_needs_bounce(dma_dev, s->length, dir))
565 break;
566
567 /* Make sure each sg start address (except first sg) is
568 * page-aligned and end address (except last sg) is also
569 * page-aligned.
570 */
571 if (i == 0) {
572 if (!IS_ALIGNED(s->offset + s->length,
573 CI_HDRC_PAGE_SIZE))
574 break;
575 } else {
576 if (s->offset)
577 break;
578 if (!sg_is_last(s) && !IS_ALIGNED(s->length,
579 CI_HDRC_PAGE_SIZE))
580 break;
581 }
582 }
583
584 return i;
585 }
586
587 static int sglist_do_bounce(struct ci_hw_req *hwreq, int index,
588 bool copy, unsigned int *bounced)
589 {
590 void *buf;
591 int i, ret, nents, num_sgs;
592 unsigned int rest, rounded;
593 struct scatterlist *sg, *src, *dst;
594
595 nents = index + 1;
596 ret = sg_alloc_table(&hwreq->sgt, nents, GFP_KERNEL);
597 if (ret)
598 return ret;
599
600 sg = src = hwreq->req.sg;
601 num_sgs = hwreq->req.num_sgs;
602 rest = hwreq->req.length;
603 dst = hwreq->sgt.sgl;
604
605 for (i = 0; i < index; i++) {
606 memcpy(dst, src, sizeof(*src));
607 rest -= src->length;
608 src = sg_next(src);
609 dst = sg_next(dst);
610 }
611
612 /* create one bounce buffer */
613 rounded = round_up(rest, CI_HDRC_PAGE_SIZE);
614 buf = kmalloc(rounded, GFP_KERNEL);
615 if (!buf) {
616 sg_free_table(&hwreq->sgt);
617 return -ENOMEM;
618 }
619
620 sg_set_buf(dst, buf, rounded);
621
622 hwreq->req.sg = hwreq->sgt.sgl;
623 hwreq->req.num_sgs = nents;
624 hwreq->sgt.sgl = sg;
625 hwreq->sgt.nents = num_sgs;
626
627 if (copy)
628 sg_copy_to_buffer(src, num_sgs - index, buf, rest);
629
630 *bounced = rest;
631
632 return 0;
633 }
634
635 static void sglist_do_debounce(struct ci_hw_req *hwreq, bool copy)
636 {
637 void *buf;
638 int i, nents, num_sgs;
639 struct scatterlist *sg, *src, *dst;
640
641 sg = hwreq->req.sg;
642 num_sgs = hwreq->req.num_sgs;
643 src = sg_last(sg, num_sgs);
644 buf = sg_virt(src);
645
646 if (copy) {
647 dst = hwreq->sgt.sgl;
648 for (i = 0; i < num_sgs - 1; i++)
649 dst = sg_next(dst);
650
651 nents = hwreq->sgt.nents - num_sgs + 1;
652 sg_copy_from_buffer(dst, nents, buf, sg_dma_len(src));
653 }
654
655 hwreq->req.sg = hwreq->sgt.sgl;
656 hwreq->req.num_sgs = hwreq->sgt.nents;
657 hwreq->sgt.sgl = sg;
658 hwreq->sgt.nents = num_sgs;
659
660 kfree(buf);
661 sg_free_table(&hwreq->sgt);
662 }
663
664 /**
665 * _hardware_enqueue: configures a request at hardware level
666 * @hwep: endpoint
667 * @hwreq: request
668 *
669 * This function returns an error code
670 */
671 static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
672 {
673 struct ci_hdrc *ci = hwep->ci;
674 int ret = 0;
675 struct td_node *firstnode, *lastnode;
676 unsigned int bounced_size;
677 struct scatterlist *sg;
678
679 /* don't queue twice */
680 if (hwreq->req.status == -EALREADY)
681 return -EALREADY;
682
683 hwreq->req.status = -EALREADY;
684
685 if (hwreq->req.num_sgs && hwreq->req.length &&
686 ci->has_short_pkt_limit) {
687 ret = sglist_get_invalid_entry(ci->dev->parent, hwep->dir,
688 &hwreq->req);
689 if (ret < hwreq->req.num_sgs) {
690 ret = sglist_do_bounce(hwreq, ret, hwep->dir == TX,
691 &bounced_size);
692 if (ret)
693 return ret;
694 }
695 }
696
697 ret = usb_gadget_map_request_by_dev(ci->dev->parent,
698 &hwreq->req, hwep->dir);
699 if (ret)
700 return ret;
701
702 if (hwreq->sgt.sgl) {
703 /* We've mapped a bigger buffer, now recover the actual size */
704 sg = sg_last(hwreq->req.sg, hwreq->req.num_sgs);
705 sg_dma_len(sg) = min(sg_dma_len(sg), bounced_size);
706 }
707
708 if (hwreq->req.num_mapped_sgs)
709 ret = prepare_td_for_sg(hwep, hwreq);
710 else
711 ret = prepare_td_for_non_sg(hwep, hwreq);
712
713 if (ret)
714 return ret;
715
716 lastnode = list_entry(hwreq->tds.prev,
717 struct td_node, td);
718
719 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
720 if (!hwreq->req.no_interrupt)
721 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
722
723 list_for_each_entry_safe(firstnode, lastnode, &hwreq->tds, td)
724 trace_ci_prepare_td(hwep, hwreq, firstnode);
725
726 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
727
728 wmb();
729
730 hwreq->req.actual = 0;
731 if (!list_empty(&hwep->qh.queue)) {
732 struct ci_hw_req *hwreqprev;
733 int n = hw_ep_bit(hwep->num, hwep->dir);
734 int tmp_stat;
735 struct td_node *prevlastnode;
736 u32 next = firstnode->dma & TD_ADDR_MASK;
737
738 hwreqprev = list_entry(hwep->qh.queue.prev,
739 struct ci_hw_req, queue);
740 prevlastnode = list_entry(hwreqprev->tds.prev,
741 struct td_node, td);
742
743 prevlastnode->ptr->next = cpu_to_le32(next);
744 wmb();
745
746 if (ci->rev == CI_REVISION_22) {
747 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
748 reprime_dtd(ci, hwep, prevlastnode);
749 }
750
751 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
752 goto done;
753 do {
754 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
755 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
756 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW) && tmp_stat);
757 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
758 if (tmp_stat)
759 goto done;
760
761 /* OP_ENDPTSTAT will be clear by HW when the endpoint met
762 * err. This dTD don't push to dQH if current dTD point is
763 * not the last one in previous request.
764 */
765 if (hwep->qh.ptr->curr != cpu_to_le32(prevlastnode->dma))
766 goto done;
767 }
768
769 /* QH configuration */
770 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
771 hwep->qh.ptr->td.token &=
772 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
773
774 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
775 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
776
777 if (hwreq->req.length == 0
778 || hwreq->req.length % hwep->ep.maxpacket)
779 mul++;
780 hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
781 }
782
783 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
784 hwep->type == USB_ENDPOINT_XFER_CONTROL);
785 done:
786 return ret;
787 }
788
789 /**
790 * free_pending_td: remove a pending request for the endpoint
791 * @hwep: endpoint
792 */
793 static void free_pending_td(struct ci_hw_ep *hwep)
794 {
795 struct td_node *pending = hwep->pending_td;
796
797 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
798 hwep->pending_td = NULL;
799 kfree(pending);
800 }
801
802 static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
803 struct td_node *node)
804 {
805 hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
806 hwep->qh.ptr->td.token &=
807 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
808
809 return hw_ep_prime(ci, hwep->num, hwep->dir,
810 hwep->type == USB_ENDPOINT_XFER_CONTROL);
811 }
812
813 /**
814 * _hardware_dequeue: handles a request at hardware level
815 * @hwep: endpoint
816 * @hwreq: request
817 *
818 * This function returns an error code
819 */
820 static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
821 {
822 u32 tmptoken;
823 struct td_node *node, *tmpnode;
824 unsigned remaining_length;
825 unsigned actual = hwreq->req.length;
826 struct ci_hdrc *ci = hwep->ci;
827 bool is_isoc = hwep->type == USB_ENDPOINT_XFER_ISOC;
828
829 if (hwreq->req.status != -EALREADY)
830 return -EINVAL;
831
832 hwreq->req.status = 0;
833
834 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
835 tmptoken = le32_to_cpu(node->ptr->token);
836 trace_ci_complete_td(hwep, hwreq, node);
837 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
838 int n = hw_ep_bit(hwep->num, hwep->dir);
839
840 if (ci->rev == CI_REVISION_24 ||
841 ci->rev == CI_REVISION_22 || is_isoc)
842 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
843 reprime_dtd(ci, hwep, node);
844 hwreq->req.status = -EALREADY;
845 return -EBUSY;
846 }
847
848 remaining_length = (tmptoken & TD_TOTAL_BYTES);
849 remaining_length >>= __ffs(TD_TOTAL_BYTES);
850 actual -= remaining_length;
851
852 hwreq->req.status = tmptoken & TD_STATUS;
853 if ((TD_STATUS_HALTED & hwreq->req.status)) {
854 hwreq->req.status = -EPIPE;
855 break;
856 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
857 hwreq->req.status = -EPROTO;
858 break;
859 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
860 if (is_isoc) {
861 hwreq->req.status = 0;
862 } else {
863 hwreq->req.status = -EILSEQ;
864 break;
865 }
866 }
867
868 if (remaining_length && !is_isoc) {
869 if (hwep->dir == TX) {
870 hwreq->req.status = -EPROTO;
871 break;
872 }
873 }
874 /*
875 * As the hardware could still address the freed td
876 * which will run the udc unusable, the cleanup of the
877 * td has to be delayed by one.
878 */
879 if (hwep->pending_td)
880 free_pending_td(hwep);
881
882 hwep->pending_td = node;
883 list_del_init(&node->td);
884 }
885
886 usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
887 &hwreq->req, hwep->dir);
888
889 /* sglist bounced */
890 if (hwreq->sgt.sgl)
891 sglist_do_debounce(hwreq, hwep->dir == RX);
892
893 hwreq->req.actual += actual;
894
895 if (hwreq->req.status)
896 return hwreq->req.status;
897
898 return hwreq->req.actual;
899 }
900
901 /**
902 * _ep_nuke: dequeues all endpoint requests
903 * @hwep: endpoint
904 *
905 * This function returns an error code
906 * Caller must hold lock
907 */
908 static int _ep_nuke(struct ci_hw_ep *hwep)
909 __releases(hwep->lock)
910 __acquires(hwep->lock)
911 {
912 struct td_node *node, *tmpnode;
913 if (hwep == NULL)
914 return -EINVAL;
915
916 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
917
918 while (!list_empty(&hwep->qh.queue)) {
919
920 /* pop oldest request */
921 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
922 struct ci_hw_req, queue);
923
924 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
925 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
926 list_del_init(&node->td);
927 node->ptr = NULL;
928 kfree(node);
929 }
930
931 list_del_init(&hwreq->queue);
932 hwreq->req.status = -ESHUTDOWN;
933
934 if (hwreq->req.complete != NULL) {
935 spin_unlock(hwep->lock);
936 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
937 spin_lock(hwep->lock);
938 }
939 }
940
941 if (hwep->pending_td)
942 free_pending_td(hwep);
943
944 return 0;
945 }
946
947 static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
948 {
949 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
950 int direction, retval = 0;
951 unsigned long flags;
952
953 if (ep == NULL || hwep->ep.desc == NULL)
954 return -EINVAL;
955
956 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
957 return -EOPNOTSUPP;
958
959 spin_lock_irqsave(hwep->lock, flags);
960
961 if (value && hwep->dir == TX && check_transfer &&
962 !list_empty(&hwep->qh.queue) &&
963 !usb_endpoint_xfer_control(hwep->ep.desc)) {
964 spin_unlock_irqrestore(hwep->lock, flags);
965 return -EAGAIN;
966 }
967
968 direction = hwep->dir;
969 do {
970 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
971
972 if (!value)
973 hwep->wedge = 0;
974
975 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
976 hwep->dir = (hwep->dir == TX) ? RX : TX;
977
978 } while (hwep->dir != direction);
979
980 spin_unlock_irqrestore(hwep->lock, flags);
981 return retval;
982 }
983
984
985 /**
986 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
987 * @gadget: gadget
988 *
989 * This function returns an error code
990 */
991 static int _gadget_stop_activity(struct usb_gadget *gadget)
992 {
993 struct usb_ep *ep;
994 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
995 unsigned long flags;
996
997 /* flush all endpoints */
998 gadget_for_each_ep(ep, gadget) {
999 usb_ep_fifo_flush(ep);
1000 }
1001 usb_ep_fifo_flush(&ci->ep0out->ep);
1002 usb_ep_fifo_flush(&ci->ep0in->ep);
1003
1004 /* make sure to disable all endpoints */
1005 gadget_for_each_ep(ep, gadget) {
1006 usb_ep_disable(ep);
1007 }
1008
1009 if (ci->status != NULL) {
1010 usb_ep_free_request(&ci->ep0in->ep, ci->status);
1011 ci->status = NULL;
1012 }
1013
1014 spin_lock_irqsave(&ci->lock, flags);
1015 ci->gadget.speed = USB_SPEED_UNKNOWN;
1016 ci->remote_wakeup = 0;
1017 ci->suspended = 0;
1018 spin_unlock_irqrestore(&ci->lock, flags);
1019
1020 return 0;
1021 }
1022
1023 /******************************************************************************
1024 * ISR block
1025 *****************************************************************************/
1026 /**
1027 * isr_reset_handler: USB reset interrupt handler
1028 * @ci: UDC device
1029 *
1030 * This function resets USB engine after a bus reset occurred
1031 */
1032 static void isr_reset_handler(struct ci_hdrc *ci)
1033 __releases(ci->lock)
1034 __acquires(ci->lock)
1035 {
1036 int retval;
1037 u32 intr;
1038
1039 spin_unlock(&ci->lock);
1040 if (ci->gadget.speed != USB_SPEED_UNKNOWN)
1041 usb_gadget_udc_reset(&ci->gadget, ci->driver);
1042
1043 retval = _gadget_stop_activity(&ci->gadget);
1044 if (retval)
1045 goto done;
1046
1047 retval = hw_usb_reset(ci);
1048 if (retval)
1049 goto done;
1050
1051 /* clear SLI */
1052 hw_write(ci, OP_USBSTS, USBi_SLI, USBi_SLI);
1053 intr = hw_read(ci, OP_USBINTR, ~0);
1054 hw_write(ci, OP_USBINTR, ~0, intr | USBi_SLI);
1055
1056 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
1057 if (ci->status == NULL)
1058 retval = -ENOMEM;
1059
1060 done:
1061 spin_lock(&ci->lock);
1062
1063 if (retval)
1064 dev_err(ci->dev, "error: %i\n", retval);
1065 }
1066
1067 /**
1068 * isr_get_status_complete: get_status request complete function
1069 * @ep: endpoint
1070 * @req: request handled
1071 *
1072 * Caller must release lock
1073 */
1074 static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
1075 {
1076 if (ep == NULL || req == NULL)
1077 return;
1078
1079 kfree(req->buf);
1080 usb_ep_free_request(ep, req);
1081 }
1082
1083 /**
1084 * _ep_queue: queues (submits) an I/O request to an endpoint
1085 * @ep: endpoint
1086 * @req: request
1087 * @gfp_flags: GFP flags (not used)
1088 *
1089 * Caller must hold lock
1090 * This function returns an error code
1091 */
1092 static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
1093 gfp_t __maybe_unused gfp_flags)
1094 {
1095 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1096 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1097 struct ci_hdrc *ci = hwep->ci;
1098 int retval = 0;
1099
1100 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1101 return -EINVAL;
1102
1103 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1104 if (req->length)
1105 hwep = (ci->ep0_dir == RX) ?
1106 ci->ep0out : ci->ep0in;
1107 if (!list_empty(&hwep->qh.queue)) {
1108 _ep_nuke(hwep);
1109 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
1110 _usb_addr(hwep));
1111 }
1112 }
1113
1114 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
1115 hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
1116 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
1117 return -EMSGSIZE;
1118 }
1119
1120 if (ci->has_short_pkt_limit &&
1121 hwreq->req.length > CI_MAX_REQ_SIZE) {
1122 dev_err(hwep->ci->dev, "request length too big (max 16KB)\n");
1123 return -EMSGSIZE;
1124 }
1125
1126 /* first nuke then test link, e.g. previous status has not sent */
1127 if (!list_empty(&hwreq->queue)) {
1128 dev_err(hwep->ci->dev, "request already in queue\n");
1129 return -EBUSY;
1130 }
1131
1132 /* push request */
1133 hwreq->req.status = -EINPROGRESS;
1134 hwreq->req.actual = 0;
1135
1136 retval = _hardware_enqueue(hwep, hwreq);
1137
1138 if (retval == -EALREADY)
1139 retval = 0;
1140 if (!retval)
1141 list_add_tail(&hwreq->queue, &hwep->qh.queue);
1142
1143 return retval;
1144 }
1145
1146 /**
1147 * isr_get_status_response: get_status request response
1148 * @ci: ci struct
1149 * @setup: setup request packet
1150 *
1151 * This function returns an error code
1152 */
1153 static int isr_get_status_response(struct ci_hdrc *ci,
1154 struct usb_ctrlrequest *setup)
1155 __releases(hwep->lock)
1156 __acquires(hwep->lock)
1157 {
1158 struct ci_hw_ep *hwep = ci->ep0in;
1159 struct usb_request *req = NULL;
1160 gfp_t gfp_flags = GFP_ATOMIC;
1161 int dir, num, retval;
1162
1163 if (hwep == NULL || setup == NULL)
1164 return -EINVAL;
1165
1166 spin_unlock(hwep->lock);
1167 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
1168 spin_lock(hwep->lock);
1169 if (req == NULL)
1170 return -ENOMEM;
1171
1172 req->complete = isr_get_status_complete;
1173 req->length = 2;
1174 req->buf = kzalloc(req->length, gfp_flags);
1175 if (req->buf == NULL) {
1176 retval = -ENOMEM;
1177 goto err_free_req;
1178 }
1179
1180 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1181 *(u16 *)req->buf = (ci->remote_wakeup << 1) |
1182 ci->gadget.is_selfpowered;
1183 } else if ((setup->bRequestType & USB_RECIP_MASK) \
1184 == USB_RECIP_ENDPOINT) {
1185 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
1186 TX : RX;
1187 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
1188 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
1189 }
1190 /* else do nothing; reserved for future use */
1191
1192 retval = _ep_queue(&hwep->ep, req, gfp_flags);
1193 if (retval)
1194 goto err_free_buf;
1195
1196 return 0;
1197
1198 err_free_buf:
1199 kfree(req->buf);
1200 err_free_req:
1201 spin_unlock(hwep->lock);
1202 usb_ep_free_request(&hwep->ep, req);
1203 spin_lock(hwep->lock);
1204 return retval;
1205 }
1206
1207 /**
1208 * isr_setup_status_complete: setup_status request complete function
1209 * @ep: endpoint
1210 * @req: request handled
1211 *
1212 * Caller must release lock. Put the port in test mode if test mode
1213 * feature is selected.
1214 */
1215 static void
1216 isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
1217 {
1218 struct ci_hdrc *ci = req->context;
1219 unsigned long flags;
1220
1221 if (req->status < 0)
1222 return;
1223
1224 if (ci->setaddr) {
1225 hw_usb_set_address(ci, ci->address);
1226 ci->setaddr = false;
1227 if (ci->address)
1228 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
1229 }
1230
1231 spin_lock_irqsave(&ci->lock, flags);
1232 if (ci->test_mode)
1233 hw_port_test_set(ci, ci->test_mode);
1234 spin_unlock_irqrestore(&ci->lock, flags);
1235 }
1236
1237 /**
1238 * isr_setup_status_phase: queues the status phase of a setup transation
1239 * @ci: ci struct
1240 *
1241 * This function returns an error code
1242 */
1243 static int isr_setup_status_phase(struct ci_hdrc *ci)
1244 {
1245 struct ci_hw_ep *hwep;
1246
1247 /*
1248 * Unexpected USB controller behavior, caused by bad signal integrity
1249 * or ground reference problems, can lead to isr_setup_status_phase
1250 * being called with ci->status equal to NULL.
1251 * If this situation occurs, you should review your USB hardware design.
1252 */
1253 if (WARN_ON_ONCE(!ci->status))
1254 return -EPIPE;
1255
1256 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
1257 ci->status->context = ci;
1258 ci->status->complete = isr_setup_status_complete;
1259
1260 return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
1261 }
1262
1263 /**
1264 * isr_tr_complete_low: transaction complete low level handler
1265 * @hwep: endpoint
1266 *
1267 * This function returns an error code
1268 * Caller must hold lock
1269 */
1270 static int isr_tr_complete_low(struct ci_hw_ep *hwep)
1271 __releases(hwep->lock)
1272 __acquires(hwep->lock)
1273 {
1274 struct ci_hw_req *hwreq, *hwreqtemp;
1275 struct ci_hw_ep *hweptemp = hwep;
1276 int retval = 0;
1277
1278 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
1279 queue) {
1280 retval = _hardware_dequeue(hwep, hwreq);
1281 if (retval < 0)
1282 break;
1283 list_del_init(&hwreq->queue);
1284 if (hwreq->req.complete != NULL) {
1285 spin_unlock(hwep->lock);
1286 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
1287 hwreq->req.length)
1288 hweptemp = hwep->ci->ep0in;
1289 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
1290 spin_lock(hwep->lock);
1291 }
1292 }
1293
1294 if (retval == -EBUSY)
1295 retval = 0;
1296
1297 return retval;
1298 }
1299
1300 static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
1301 {
1302 dev_warn(&ci->gadget.dev,
1303 "connect the device to an alternate port if you want HNP\n");
1304 return isr_setup_status_phase(ci);
1305 }
1306
1307 /**
1308 * isr_setup_packet_handler: setup packet handler
1309 * @ci: UDC descriptor
1310 *
1311 * This function handles setup packet
1312 */
1313 static void isr_setup_packet_handler(struct ci_hdrc *ci)
1314 __releases(ci->lock)
1315 __acquires(ci->lock)
1316 {
1317 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1318 struct usb_ctrlrequest req;
1319 int type, num, dir, err = -EINVAL;
1320 u8 tmode = 0;
1321
1322 /*
1323 * Flush data and handshake transactions of previous
1324 * setup packet.
1325 */
1326 _ep_nuke(ci->ep0out);
1327 _ep_nuke(ci->ep0in);
1328
1329 /* read_setup_packet */
1330 do {
1331 hw_test_and_set_setup_guard(ci);
1332 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1333 } while (!hw_test_and_clear_setup_guard(ci));
1334
1335 type = req.bRequestType;
1336
1337 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1338
1339 switch (req.bRequest) {
1340 case USB_REQ_CLEAR_FEATURE:
1341 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1342 le16_to_cpu(req.wValue) ==
1343 USB_ENDPOINT_HALT) {
1344 if (req.wLength != 0)
1345 break;
1346 num = le16_to_cpu(req.wIndex);
1347 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1348 num &= USB_ENDPOINT_NUMBER_MASK;
1349 if (dir == TX)
1350 num += ci->hw_ep_max / 2;
1351 if (!ci->ci_hw_ep[num].wedge) {
1352 spin_unlock(&ci->lock);
1353 err = usb_ep_clear_halt(
1354 &ci->ci_hw_ep[num].ep);
1355 spin_lock(&ci->lock);
1356 if (err)
1357 break;
1358 }
1359 err = isr_setup_status_phase(ci);
1360 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1361 le16_to_cpu(req.wValue) ==
1362 USB_DEVICE_REMOTE_WAKEUP) {
1363 if (req.wLength != 0)
1364 break;
1365 ci->remote_wakeup = 0;
1366 err = isr_setup_status_phase(ci);
1367 } else {
1368 goto delegate;
1369 }
1370 break;
1371 case USB_REQ_GET_STATUS:
1372 if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1373 le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1374 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1375 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1376 goto delegate;
1377 if (le16_to_cpu(req.wLength) != 2 ||
1378 le16_to_cpu(req.wValue) != 0)
1379 break;
1380 err = isr_get_status_response(ci, &req);
1381 break;
1382 case USB_REQ_SET_ADDRESS:
1383 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1384 goto delegate;
1385 if (le16_to_cpu(req.wLength) != 0 ||
1386 le16_to_cpu(req.wIndex) != 0)
1387 break;
1388 ci->address = (u8)le16_to_cpu(req.wValue);
1389 ci->setaddr = true;
1390 err = isr_setup_status_phase(ci);
1391 break;
1392 case USB_REQ_SET_FEATURE:
1393 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1394 le16_to_cpu(req.wValue) ==
1395 USB_ENDPOINT_HALT) {
1396 if (req.wLength != 0)
1397 break;
1398 num = le16_to_cpu(req.wIndex);
1399 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1400 num &= USB_ENDPOINT_NUMBER_MASK;
1401 if (dir == TX)
1402 num += ci->hw_ep_max / 2;
1403
1404 spin_unlock(&ci->lock);
1405 err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1406 spin_lock(&ci->lock);
1407 if (!err)
1408 isr_setup_status_phase(ci);
1409 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1410 if (req.wLength != 0)
1411 break;
1412 switch (le16_to_cpu(req.wValue)) {
1413 case USB_DEVICE_REMOTE_WAKEUP:
1414 ci->remote_wakeup = 1;
1415 err = isr_setup_status_phase(ci);
1416 break;
1417 case USB_DEVICE_TEST_MODE:
1418 tmode = le16_to_cpu(req.wIndex) >> 8;
1419 switch (tmode) {
1420 case USB_TEST_J:
1421 case USB_TEST_K:
1422 case USB_TEST_SE0_NAK:
1423 case USB_TEST_PACKET:
1424 case USB_TEST_FORCE_ENABLE:
1425 ci->test_mode = tmode;
1426 err = isr_setup_status_phase(
1427 ci);
1428 break;
1429 default:
1430 break;
1431 }
1432 break;
1433 case USB_DEVICE_B_HNP_ENABLE:
1434 if (ci_otg_is_fsm_mode(ci)) {
1435 ci->gadget.b_hnp_enable = 1;
1436 err = isr_setup_status_phase(
1437 ci);
1438 }
1439 break;
1440 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1441 if (ci_otg_is_fsm_mode(ci))
1442 err = otg_a_alt_hnp_support(ci);
1443 break;
1444 case USB_DEVICE_A_HNP_SUPPORT:
1445 if (ci_otg_is_fsm_mode(ci)) {
1446 ci->gadget.a_hnp_support = 1;
1447 err = isr_setup_status_phase(
1448 ci);
1449 }
1450 break;
1451 default:
1452 goto delegate;
1453 }
1454 } else {
1455 goto delegate;
1456 }
1457 break;
1458 default:
1459 delegate:
1460 if (req.wLength == 0) /* no data phase */
1461 ci->ep0_dir = TX;
1462
1463 spin_unlock(&ci->lock);
1464 err = ci->driver->setup(&ci->gadget, &req);
1465 spin_lock(&ci->lock);
1466 break;
1467 }
1468
1469 if (err < 0) {
1470 spin_unlock(&ci->lock);
1471 if (_ep_set_halt(&hwep->ep, 1, false))
1472 dev_err(ci->dev, "error: _ep_set_halt\n");
1473 spin_lock(&ci->lock);
1474 }
1475 }
1476
1477 /**
1478 * isr_tr_complete_handler: transaction complete interrupt handler
1479 * @ci: UDC descriptor
1480 *
1481 * This function handles traffic events
1482 */
1483 static void isr_tr_complete_handler(struct ci_hdrc *ci)
1484 __releases(ci->lock)
1485 __acquires(ci->lock)
1486 {
1487 unsigned i;
1488 int err;
1489
1490 for (i = 0; i < ci->hw_ep_max; i++) {
1491 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1492
1493 if (hwep->ep.desc == NULL)
1494 continue; /* not configured */
1495
1496 if (hw_test_and_clear_complete(ci, i)) {
1497 err = isr_tr_complete_low(hwep);
1498 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1499 if (err > 0) /* needs status phase */
1500 err = isr_setup_status_phase(ci);
1501 if (err < 0) {
1502 spin_unlock(&ci->lock);
1503 if (_ep_set_halt(&hwep->ep, 1, false))
1504 dev_err(ci->dev,
1505 "error: _ep_set_halt\n");
1506 spin_lock(&ci->lock);
1507 }
1508 }
1509 }
1510
1511 /* Only handle setup packet below */
1512 if (i == 0 &&
1513 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1514 isr_setup_packet_handler(ci);
1515 }
1516 }
1517
1518 /******************************************************************************
1519 * ENDPT block
1520 *****************************************************************************/
1521 /*
1522 * ep_enable: configure endpoint, making it usable
1523 *
1524 * Check usb_ep_enable() at "usb_gadget.h" for details
1525 */
1526 static int ep_enable(struct usb_ep *ep,
1527 const struct usb_endpoint_descriptor *desc)
1528 {
1529 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1530 int retval = 0;
1531 unsigned long flags;
1532 u32 cap = 0;
1533
1534 if (ep == NULL || desc == NULL)
1535 return -EINVAL;
1536
1537 spin_lock_irqsave(hwep->lock, flags);
1538
1539 /* only internal SW should enable ctrl endpts */
1540
1541 if (!list_empty(&hwep->qh.queue)) {
1542 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1543 spin_unlock_irqrestore(hwep->lock, flags);
1544 return -EBUSY;
1545 }
1546
1547 hwep->ep.desc = desc;
1548
1549 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1550 hwep->num = usb_endpoint_num(desc);
1551 hwep->type = usb_endpoint_type(desc);
1552
1553 hwep->ep.maxpacket = usb_endpoint_maxp(desc);
1554 hwep->ep.mult = usb_endpoint_maxp_mult(desc);
1555
1556 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1557 cap |= QH_IOS;
1558
1559 cap |= QH_ZLT;
1560 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1561 /*
1562 * For ISO-TX, we set mult at QH as the largest value, and use
1563 * MultO at TD as real mult value.
1564 */
1565 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1566 cap |= 3 << __ffs(QH_MULT);
1567
1568 hwep->qh.ptr->cap = cpu_to_le32(cap);
1569
1570 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
1571
1572 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1573 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1574 retval = -EINVAL;
1575 }
1576
1577 /*
1578 * Enable endpoints in the HW other than ep0 as ep0
1579 * is always enabled
1580 */
1581 if (hwep->num)
1582 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1583 hwep->type);
1584
1585 spin_unlock_irqrestore(hwep->lock, flags);
1586 return retval;
1587 }
1588
1589 /*
1590 * ep_disable: endpoint is no longer usable
1591 *
1592 * Check usb_ep_disable() at "usb_gadget.h" for details
1593 */
1594 static int ep_disable(struct usb_ep *ep)
1595 {
1596 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1597 int direction, retval = 0;
1598 unsigned long flags;
1599
1600 if (ep == NULL)
1601 return -EINVAL;
1602 else if (hwep->ep.desc == NULL)
1603 return -EBUSY;
1604
1605 spin_lock_irqsave(hwep->lock, flags);
1606 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1607 spin_unlock_irqrestore(hwep->lock, flags);
1608 return 0;
1609 }
1610
1611 /* only internal SW should disable ctrl endpts */
1612
1613 direction = hwep->dir;
1614 do {
1615 retval |= _ep_nuke(hwep);
1616 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1617
1618 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1619 hwep->dir = (hwep->dir == TX) ? RX : TX;
1620
1621 } while (hwep->dir != direction);
1622
1623 hwep->ep.desc = NULL;
1624
1625 spin_unlock_irqrestore(hwep->lock, flags);
1626 return retval;
1627 }
1628
1629 /*
1630 * ep_alloc_request: allocate a request object to use with this endpoint
1631 *
1632 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1633 */
1634 static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1635 {
1636 struct ci_hw_req *hwreq;
1637
1638 if (ep == NULL)
1639 return NULL;
1640
1641 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1642 if (hwreq != NULL) {
1643 INIT_LIST_HEAD(&hwreq->queue);
1644 INIT_LIST_HEAD(&hwreq->tds);
1645 }
1646
1647 return (hwreq == NULL) ? NULL : &hwreq->req;
1648 }
1649
1650 /*
1651 * ep_free_request: frees a request object
1652 *
1653 * Check usb_ep_free_request() at "usb_gadget.h" for details
1654 */
1655 static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1656 {
1657 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1658 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1659 struct td_node *node, *tmpnode;
1660 unsigned long flags;
1661
1662 if (ep == NULL || req == NULL) {
1663 return;
1664 } else if (!list_empty(&hwreq->queue)) {
1665 dev_err(hwep->ci->dev, "freeing queued request\n");
1666 return;
1667 }
1668
1669 spin_lock_irqsave(hwep->lock, flags);
1670
1671 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1672 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1673 list_del_init(&node->td);
1674 node->ptr = NULL;
1675 kfree(node);
1676 }
1677
1678 kfree(hwreq);
1679
1680 spin_unlock_irqrestore(hwep->lock, flags);
1681 }
1682
1683 /*
1684 * ep_queue: queues (submits) an I/O request to an endpoint
1685 *
1686 * Check usb_ep_queue()* at usb_gadget.h" for details
1687 */
1688 static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1689 gfp_t __maybe_unused gfp_flags)
1690 {
1691 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1692 int retval = 0;
1693 unsigned long flags;
1694
1695 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1696 return -EINVAL;
1697
1698 spin_lock_irqsave(hwep->lock, flags);
1699 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1700 spin_unlock_irqrestore(hwep->lock, flags);
1701 return 0;
1702 }
1703 retval = _ep_queue(ep, req, gfp_flags);
1704 spin_unlock_irqrestore(hwep->lock, flags);
1705 return retval;
1706 }
1707
1708 /*
1709 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1710 *
1711 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1712 */
1713 static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1714 {
1715 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1716 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1717 unsigned long flags;
1718 struct td_node *node, *tmpnode;
1719
1720 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1721 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1722 list_empty(&hwep->qh.queue))
1723 return -EINVAL;
1724
1725 spin_lock_irqsave(hwep->lock, flags);
1726 if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN)
1727 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1728
1729 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1730 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1731 list_del(&node->td);
1732 kfree(node);
1733 }
1734
1735 /* pop request */
1736 list_del_init(&hwreq->queue);
1737
1738 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1739
1740 if (hwreq->sgt.sgl)
1741 sglist_do_debounce(hwreq, false);
1742
1743 req->status = -ECONNRESET;
1744
1745 if (hwreq->req.complete != NULL) {
1746 spin_unlock(hwep->lock);
1747 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1748 spin_lock(hwep->lock);
1749 }
1750
1751 spin_unlock_irqrestore(hwep->lock, flags);
1752 return 0;
1753 }
1754
1755 /*
1756 * ep_set_halt: sets the endpoint halt feature
1757 *
1758 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1759 */
1760 static int ep_set_halt(struct usb_ep *ep, int value)
1761 {
1762 return _ep_set_halt(ep, value, true);
1763 }
1764
1765 /*
1766 * ep_set_wedge: sets the halt feature and ignores clear requests
1767 *
1768 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1769 */
1770 static int ep_set_wedge(struct usb_ep *ep)
1771 {
1772 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1773 unsigned long flags;
1774
1775 if (ep == NULL || hwep->ep.desc == NULL)
1776 return -EINVAL;
1777
1778 spin_lock_irqsave(hwep->lock, flags);
1779 hwep->wedge = 1;
1780 spin_unlock_irqrestore(hwep->lock, flags);
1781
1782 return usb_ep_set_halt(ep);
1783 }
1784
1785 /*
1786 * ep_fifo_flush: flushes contents of a fifo
1787 *
1788 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1789 */
1790 static void ep_fifo_flush(struct usb_ep *ep)
1791 {
1792 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1793 unsigned long flags;
1794
1795 if (ep == NULL) {
1796 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1797 return;
1798 }
1799
1800 spin_lock_irqsave(hwep->lock, flags);
1801 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1802 spin_unlock_irqrestore(hwep->lock, flags);
1803 return;
1804 }
1805
1806 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1807
1808 spin_unlock_irqrestore(hwep->lock, flags);
1809 }
1810
1811 /*
1812 * Endpoint-specific part of the API to the USB controller hardware
1813 * Check "usb_gadget.h" for details
1814 */
1815 static const struct usb_ep_ops usb_ep_ops = {
1816 .enable = ep_enable,
1817 .disable = ep_disable,
1818 .alloc_request = ep_alloc_request,
1819 .free_request = ep_free_request,
1820 .queue = ep_queue,
1821 .dequeue = ep_dequeue,
1822 .set_halt = ep_set_halt,
1823 .set_wedge = ep_set_wedge,
1824 .fifo_flush = ep_fifo_flush,
1825 };
1826
1827 /******************************************************************************
1828 * GADGET block
1829 *****************************************************************************/
1830
1831 static int ci_udc_get_frame(struct usb_gadget *_gadget)
1832 {
1833 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1834 unsigned long flags;
1835 int ret;
1836
1837 spin_lock_irqsave(&ci->lock, flags);
1838 ret = hw_read(ci, OP_FRINDEX, 0x3fff);
1839 spin_unlock_irqrestore(&ci->lock, flags);
1840 return ret >> 3;
1841 }
1842
1843 /*
1844 * ci_hdrc_gadget_connect: caller makes sure gadget driver is binded
1845 */
1846 static void ci_hdrc_gadget_connect(struct usb_gadget *_gadget, int is_active)
1847 {
1848 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1849
1850 if (is_active) {
1851 pm_runtime_get_sync(ci->dev);
1852 hw_device_reset(ci);
1853 spin_lock_irq(&ci->lock);
1854 if (ci->driver) {
1855 hw_device_state(ci, ci->ep0out->qh.dma);
1856 usb_gadget_set_state(_gadget, USB_STATE_POWERED);
1857 spin_unlock_irq(&ci->lock);
1858 usb_udc_vbus_handler(_gadget, true);
1859 } else {
1860 spin_unlock_irq(&ci->lock);
1861 }
1862 } else {
1863 usb_udc_vbus_handler(_gadget, false);
1864 if (ci->driver)
1865 ci->driver->disconnect(&ci->gadget);
1866 hw_device_state(ci, 0);
1867 if (ci->platdata->notify_event)
1868 ci->platdata->notify_event(ci,
1869 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1870 _gadget_stop_activity(&ci->gadget);
1871 pm_runtime_put_sync(ci->dev);
1872 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1873 }
1874 }
1875
1876 static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1877 {
1878 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1879 unsigned long flags;
1880 int ret = 0;
1881
1882 spin_lock_irqsave(&ci->lock, flags);
1883 ci->vbus_active = is_active;
1884 spin_unlock_irqrestore(&ci->lock, flags);
1885
1886 if (ci->usb_phy)
1887 usb_phy_set_charger_state(ci->usb_phy, is_active ?
1888 USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
1889
1890 if (ci->platdata->notify_event)
1891 ret = ci->platdata->notify_event(ci,
1892 CI_HDRC_CONTROLLER_VBUS_EVENT);
1893
1894 if (ci->usb_phy) {
1895 if (is_active)
1896 usb_phy_set_event(ci->usb_phy, USB_EVENT_VBUS);
1897 else
1898 usb_phy_set_event(ci->usb_phy, USB_EVENT_NONE);
1899 }
1900
1901 if (ci->driver)
1902 ci_hdrc_gadget_connect(_gadget, is_active);
1903
1904 return ret;
1905 }
1906
1907 static int ci_udc_wakeup(struct usb_gadget *_gadget)
1908 {
1909 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1910 unsigned long flags;
1911 int ret = 0;
1912
1913 spin_lock_irqsave(&ci->lock, flags);
1914 if (ci->gadget.speed == USB_SPEED_UNKNOWN) {
1915 spin_unlock_irqrestore(&ci->lock, flags);
1916 return 0;
1917 }
1918 if (!ci->remote_wakeup) {
1919 ret = -EOPNOTSUPP;
1920 goto out;
1921 }
1922 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1923 ret = -EINVAL;
1924 goto out;
1925 }
1926 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1927 out:
1928 spin_unlock_irqrestore(&ci->lock, flags);
1929 return ret;
1930 }
1931
1932 static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1933 {
1934 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1935
1936 if (ci->usb_phy)
1937 return usb_phy_set_power(ci->usb_phy, ma);
1938 return -ENOTSUPP;
1939 }
1940
1941 static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1942 {
1943 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1944 struct ci_hw_ep *hwep = ci->ep0in;
1945 unsigned long flags;
1946
1947 spin_lock_irqsave(hwep->lock, flags);
1948 _gadget->is_selfpowered = (is_on != 0);
1949 spin_unlock_irqrestore(hwep->lock, flags);
1950
1951 return 0;
1952 }
1953
1954 /* Change Data+ pullup status
1955 * this func is used by usb_gadget_connect/disconnect
1956 */
1957 static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1958 {
1959 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1960
1961 /*
1962 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1963 * and don't touch Data+ in host mode for dual role config.
1964 */
1965 if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1966 return 0;
1967
1968 pm_runtime_get_sync(ci->dev);
1969 if (is_on)
1970 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1971 else
1972 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1973 pm_runtime_put_sync(ci->dev);
1974
1975 return 0;
1976 }
1977
1978 static int ci_udc_start(struct usb_gadget *gadget,
1979 struct usb_gadget_driver *driver);
1980 static int ci_udc_stop(struct usb_gadget *gadget);
1981
1982 /* Match ISOC IN from the highest endpoint */
1983 static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget,
1984 struct usb_endpoint_descriptor *desc,
1985 struct usb_ss_ep_comp_descriptor *comp_desc)
1986 {
1987 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1988 struct usb_ep *ep;
1989
1990 if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) {
1991 list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) {
1992 if (ep->caps.dir_in && !ep->claimed)
1993 return ep;
1994 }
1995 }
1996
1997 return NULL;
1998 }
1999
2000 /*
2001 * Device operations part of the API to the USB controller hardware,
2002 * which don't involve endpoints (or i/o)
2003 * Check "usb_gadget.h" for details
2004 */
2005 static const struct usb_gadget_ops usb_gadget_ops = {
2006 .get_frame = ci_udc_get_frame,
2007 .vbus_session = ci_udc_vbus_session,
2008 .wakeup = ci_udc_wakeup,
2009 .set_selfpowered = ci_udc_selfpowered,
2010 .pullup = ci_udc_pullup,
2011 .vbus_draw = ci_udc_vbus_draw,
2012 .udc_start = ci_udc_start,
2013 .udc_stop = ci_udc_stop,
2014 .match_ep = ci_udc_match_ep,
2015 };
2016
2017 static int init_eps(struct ci_hdrc *ci)
2018 {
2019 int retval = 0, i, j;
2020
2021 for (i = 0; i < ci->hw_ep_max/2; i++)
2022 for (j = RX; j <= TX; j++) {
2023 int k = i + j * ci->hw_ep_max/2;
2024 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
2025
2026 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
2027 (j == TX) ? "in" : "out");
2028
2029 hwep->ci = ci;
2030 hwep->lock = &ci->lock;
2031 hwep->td_pool = ci->td_pool;
2032
2033 hwep->ep.name = hwep->name;
2034 hwep->ep.ops = &usb_ep_ops;
2035
2036 if (i == 0) {
2037 hwep->ep.caps.type_control = true;
2038 } else {
2039 hwep->ep.caps.type_iso = true;
2040 hwep->ep.caps.type_bulk = true;
2041 hwep->ep.caps.type_int = true;
2042 }
2043
2044 if (j == TX)
2045 hwep->ep.caps.dir_in = true;
2046 else
2047 hwep->ep.caps.dir_out = true;
2048
2049 /*
2050 * for ep0: maxP defined in desc, for other
2051 * eps, maxP is set by epautoconfig() called
2052 * by gadget layer
2053 */
2054 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
2055
2056 INIT_LIST_HEAD(&hwep->qh.queue);
2057 hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
2058 &hwep->qh.dma);
2059 if (hwep->qh.ptr == NULL)
2060 retval = -ENOMEM;
2061
2062 /*
2063 * set up shorthands for ep0 out and in endpoints,
2064 * don't add to gadget's ep_list
2065 */
2066 if (i == 0) {
2067 if (j == RX)
2068 ci->ep0out = hwep;
2069 else
2070 ci->ep0in = hwep;
2071
2072 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
2073 continue;
2074 }
2075
2076 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
2077 }
2078
2079 return retval;
2080 }
2081
2082 static void destroy_eps(struct ci_hdrc *ci)
2083 {
2084 int i;
2085
2086 for (i = 0; i < ci->hw_ep_max; i++) {
2087 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
2088
2089 if (hwep->pending_td)
2090 free_pending_td(hwep);
2091 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
2092 }
2093 }
2094
2095 /**
2096 * ci_udc_start: register a gadget driver
2097 * @gadget: our gadget
2098 * @driver: the driver being registered
2099 *
2100 * Interrupts are enabled here.
2101 */
2102 static int ci_udc_start(struct usb_gadget *gadget,
2103 struct usb_gadget_driver *driver)
2104 {
2105 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
2106 int retval;
2107
2108 if (driver->disconnect == NULL)
2109 return -EINVAL;
2110
2111 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
2112 retval = usb_ep_enable(&ci->ep0out->ep);
2113 if (retval)
2114 return retval;
2115
2116 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
2117 retval = usb_ep_enable(&ci->ep0in->ep);
2118 if (retval)
2119 return retval;
2120
2121 ci->driver = driver;
2122
2123 /* Start otg fsm for B-device */
2124 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
2125 ci_hdrc_otg_fsm_start(ci);
2126 return retval;
2127 }
2128
2129 if (ci->vbus_active)
2130 ci_hdrc_gadget_connect(gadget, 1);
2131 else
2132 usb_udc_vbus_handler(&ci->gadget, false);
2133
2134 return retval;
2135 }
2136
2137 static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
2138 {
2139 if (!ci_otg_is_fsm_mode(ci))
2140 return;
2141
2142 mutex_lock(&ci->fsm.lock);
2143 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
2144 ci->fsm.a_bidl_adis_tmout = 1;
2145 ci_hdrc_otg_fsm_start(ci);
2146 } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
2147 ci->fsm.protocol = PROTO_UNDEF;
2148 ci->fsm.otg->state = OTG_STATE_UNDEFINED;
2149 }
2150 mutex_unlock(&ci->fsm.lock);
2151 }
2152
2153 /*
2154 * ci_udc_stop: unregister a gadget driver
2155 */
2156 static int ci_udc_stop(struct usb_gadget *gadget)
2157 {
2158 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
2159 unsigned long flags;
2160
2161 spin_lock_irqsave(&ci->lock, flags);
2162 ci->driver = NULL;
2163
2164 if (ci->vbus_active) {
2165 hw_device_state(ci, 0);
2166 spin_unlock_irqrestore(&ci->lock, flags);
2167 if (ci->platdata->notify_event)
2168 ci->platdata->notify_event(ci,
2169 CI_HDRC_CONTROLLER_STOPPED_EVENT);
2170 _gadget_stop_activity(&ci->gadget);
2171 spin_lock_irqsave(&ci->lock, flags);
2172 pm_runtime_put(ci->dev);
2173 }
2174
2175 spin_unlock_irqrestore(&ci->lock, flags);
2176
2177 ci_udc_stop_for_otg_fsm(ci);
2178 return 0;
2179 }
2180
2181 /******************************************************************************
2182 * BUS block
2183 *****************************************************************************/
2184 /*
2185 * udc_irq: ci interrupt handler
2186 *
2187 * This function returns IRQ_HANDLED if the IRQ has been handled
2188 * It locks access to registers
2189 */
2190 static irqreturn_t udc_irq(struct ci_hdrc *ci)
2191 {
2192 irqreturn_t retval;
2193 u32 intr;
2194
2195 if (ci == NULL)
2196 return IRQ_HANDLED;
2197
2198 spin_lock(&ci->lock);
2199
2200 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
2201 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
2202 USBMODE_CM_DC) {
2203 spin_unlock(&ci->lock);
2204 return IRQ_NONE;
2205 }
2206 }
2207 intr = hw_test_and_clear_intr_active(ci);
2208
2209 if (intr) {
2210 /* order defines priority - do NOT change it */
2211 if (USBi_URI & intr)
2212 isr_reset_handler(ci);
2213
2214 if (USBi_PCI & intr) {
2215 ci->gadget.speed = hw_port_is_high_speed(ci) ?
2216 USB_SPEED_HIGH : USB_SPEED_FULL;
2217 if (ci->usb_phy)
2218 usb_phy_set_event(ci->usb_phy,
2219 USB_EVENT_ENUMERATED);
2220 if (ci->suspended) {
2221 if (ci->driver->resume) {
2222 spin_unlock(&ci->lock);
2223 ci->driver->resume(&ci->gadget);
2224 spin_lock(&ci->lock);
2225 }
2226 ci->suspended = 0;
2227 usb_gadget_set_state(&ci->gadget,
2228 ci->resume_state);
2229 }
2230 }
2231
2232 if ((USBi_UI | USBi_UEI) & intr)
2233 isr_tr_complete_handler(ci);
2234
2235 if ((USBi_SLI & intr) && !(ci->suspended)) {
2236 ci->suspended = 1;
2237 ci->resume_state = ci->gadget.state;
2238 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
2239 ci->driver->suspend) {
2240 spin_unlock(&ci->lock);
2241 ci->driver->suspend(&ci->gadget);
2242 spin_lock(&ci->lock);
2243 }
2244 usb_gadget_set_state(&ci->gadget,
2245 USB_STATE_SUSPENDED);
2246 }
2247 retval = IRQ_HANDLED;
2248 } else {
2249 retval = IRQ_NONE;
2250 }
2251 spin_unlock(&ci->lock);
2252
2253 return retval;
2254 }
2255
2256 /**
2257 * udc_start: initialize gadget role
2258 * @ci: chipidea controller
2259 */
2260 static int udc_start(struct ci_hdrc *ci)
2261 {
2262 struct device *dev = ci->dev;
2263 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
2264 int retval = 0;
2265
2266 ci->gadget.ops = &usb_gadget_ops;
2267 ci->gadget.speed = USB_SPEED_UNKNOWN;
2268 ci->gadget.max_speed = USB_SPEED_HIGH;
2269 ci->gadget.name = ci->platdata->name;
2270 ci->gadget.otg_caps = otg_caps;
2271 ci->gadget.sg_supported = 1;
2272 ci->gadget.irq = ci->irq;
2273
2274 if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
2275 ci->gadget.quirk_avoids_skb_reserve = 1;
2276
2277 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
2278 otg_caps->adp_support))
2279 ci->gadget.is_otg = 1;
2280
2281 INIT_LIST_HEAD(&ci->gadget.ep_list);
2282
2283 /* alloc resources */
2284 ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
2285 sizeof(struct ci_hw_qh),
2286 64, CI_HDRC_PAGE_SIZE);
2287 if (ci->qh_pool == NULL)
2288 return -ENOMEM;
2289
2290 ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
2291 sizeof(struct ci_hw_td),
2292 64, CI_HDRC_PAGE_SIZE);
2293 if (ci->td_pool == NULL) {
2294 retval = -ENOMEM;
2295 goto free_qh_pool;
2296 }
2297
2298 retval = init_eps(ci);
2299 if (retval)
2300 goto free_pools;
2301
2302 ci->gadget.ep0 = &ci->ep0in->ep;
2303
2304 retval = usb_add_gadget_udc(dev, &ci->gadget);
2305 if (retval)
2306 goto destroy_eps;
2307
2308 return retval;
2309
2310 destroy_eps:
2311 destroy_eps(ci);
2312 free_pools:
2313 dma_pool_destroy(ci->td_pool);
2314 free_qh_pool:
2315 dma_pool_destroy(ci->qh_pool);
2316 return retval;
2317 }
2318
2319 /*
2320 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
2321 *
2322 * No interrupts active, the IRQ has been released
2323 */
2324 void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
2325 {
2326 if (!ci->roles[CI_ROLE_GADGET])
2327 return;
2328
2329 usb_del_gadget_udc(&ci->gadget);
2330
2331 destroy_eps(ci);
2332
2333 dma_pool_destroy(ci->td_pool);
2334 dma_pool_destroy(ci->qh_pool);
2335 }
2336
2337 static int udc_id_switch_for_device(struct ci_hdrc *ci)
2338 {
2339 if (ci->platdata->pins_device)
2340 pinctrl_select_state(ci->platdata->pctl,
2341 ci->platdata->pins_device);
2342
2343 if (ci->is_otg)
2344 /* Clear and enable BSV irq */
2345 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2346 OTGSC_BSVIS | OTGSC_BSVIE);
2347
2348 return 0;
2349 }
2350
2351 static void udc_id_switch_for_host(struct ci_hdrc *ci)
2352 {
2353 /*
2354 * host doesn't care B_SESSION_VALID event
2355 * so clear and disable BSV irq
2356 */
2357 if (ci->is_otg)
2358 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
2359
2360 ci->vbus_active = 0;
2361
2362 if (ci->platdata->pins_device && ci->platdata->pins_default)
2363 pinctrl_select_state(ci->platdata->pctl,
2364 ci->platdata->pins_default);
2365 }
2366
2367 #ifdef CONFIG_PM_SLEEP
2368 static void udc_suspend(struct ci_hdrc *ci)
2369 {
2370 /*
2371 * Set OP_ENDPTLISTADDR to be non-zero for
2372 * checking if controller resume from power lost
2373 * in non-host mode.
2374 */
2375 if (hw_read(ci, OP_ENDPTLISTADDR, ~0) == 0)
2376 hw_write(ci, OP_ENDPTLISTADDR, ~0, ~0);
2377 }
2378
2379 static void udc_resume(struct ci_hdrc *ci, bool power_lost)
2380 {
2381 if (power_lost) {
2382 if (ci->is_otg)
2383 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2384 OTGSC_BSVIS | OTGSC_BSVIE);
2385 if (ci->vbus_active)
2386 usb_gadget_vbus_disconnect(&ci->gadget);
2387 }
2388
2389 /* Restore value 0 if it was set for power lost check */
2390 if (hw_read(ci, OP_ENDPTLISTADDR, ~0) == 0xFFFFFFFF)
2391 hw_write(ci, OP_ENDPTLISTADDR, ~0, 0);
2392 }
2393 #endif
2394
2395 /**
2396 * ci_hdrc_gadget_init - initialize device related bits
2397 * @ci: the controller
2398 *
2399 * This function initializes the gadget, if the device is "device capable".
2400 */
2401 int ci_hdrc_gadget_init(struct ci_hdrc *ci)
2402 {
2403 struct ci_role_driver *rdrv;
2404 int ret;
2405
2406 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
2407 return -ENXIO;
2408
2409 rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
2410 if (!rdrv)
2411 return -ENOMEM;
2412
2413 rdrv->start = udc_id_switch_for_device;
2414 rdrv->stop = udc_id_switch_for_host;
2415 #ifdef CONFIG_PM_SLEEP
2416 rdrv->suspend = udc_suspend;
2417 rdrv->resume = udc_resume;
2418 #endif
2419 rdrv->irq = udc_irq;
2420 rdrv->name = "gadget";
2421
2422 ret = udc_start(ci);
2423 if (!ret)
2424 ci->roles[CI_ROLE_GADGET] = rdrv;
2425
2426 return ret;
2427 }
Kernel DRM miscellaneous fixes and cross-tree changes