drivers/usb/musb/mpfs.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * PolarFire SoC (MPFS) MUSB Glue Layer
   4  *
   5  * Copyright (c) 2020-2022 Microchip Corporation. All rights reserved.
   6  * Based on {omap2430,tusb6010,ux500}.c
   7  *
   8  */
   9
  10 #include <linux/clk.h>
  11 #include <linux/dma-mapping.h>
  12 #include <linux/err.h>
  13 #include <linux/io.h>
  14 #include <linux/kernel.h>
  15 #include <linux/module.h>
  16 #include <linux/of.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/usb/usb_phy_generic.h>
  19 #include "musb_core.h"
  20 #include "musb_dma.h"
  21
  22 #define MPFS_MUSB_MAX_EP_NUM    8
  23 #define MPFS_MUSB_RAM_BITS      12
  24
  25 struct mpfs_glue {
  26         struct device *dev;
  27         struct platform_device *musb;
  28         struct platform_device *phy;
  29         struct clk *clk;
  30 };
  31
  32 static struct musb_fifo_cfg mpfs_musb_mode_cfg[] = {
  33         { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
  34         { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
  35         { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
  36         { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
  37         { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
  38         { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
  39         { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 1024, },
  40         { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 4096, },
  41 };
  42
  43 static const struct musb_hdrc_config mpfs_musb_hdrc_config = {
  44         .fifo_cfg = mpfs_musb_mode_cfg,
  45         .fifo_cfg_size = ARRAY_SIZE(mpfs_musb_mode_cfg),
  46         .multipoint = true,
  47         .dyn_fifo = true,
  48         .num_eps = MPFS_MUSB_MAX_EP_NUM,
  49         .ram_bits = MPFS_MUSB_RAM_BITS,
  50 };
  51
  52 static void mpfs_musb_set_vbus(struct musb *musb, int is_on)
  53 {
  54         u8 devctl;
  55
  56         /*
  57          * HDRC controls CPEN, but beware current surges during device
  58          * connect.  They can trigger transient overcurrent conditions
  59          * that must be ignored.
  60          */
  61         devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  62
  63         if (is_on) {
  64                 musb->is_active = 1;
  65                 musb->xceiv->otg->default_a = 1;
  66                 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
  67                 devctl |= MUSB_DEVCTL_SESSION;
  68                 MUSB_HST_MODE(musb);
  69         } else {
  70                 musb->is_active = 0;
  71
  72                 /*
  73                  * NOTE:  skipping A_WAIT_VFALL -> A_IDLE and
  74                  * jumping right to B_IDLE...
  75                  */
  76                 musb->xceiv->otg->default_a = 0;
  77                 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
  78                 devctl &= ~MUSB_DEVCTL_SESSION;
  79
  80                 MUSB_DEV_MODE(musb);
  81         }
  82
  83         musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  84
  85         dev_dbg(musb->controller, "VBUS %s, devctl %02x\n",
  86                 usb_otg_state_string(musb->xceiv->otg->state),
  87                 musb_readb(musb->mregs, MUSB_DEVCTL));
  88 }
  89
  90 #define POLL_SECONDS    2
  91
  92 static void otg_timer(struct timer_list *t)
  93 {
  94         struct musb             *musb = from_timer(musb, t, dev_timer);
  95         void __iomem            *mregs = musb->mregs;
  96         u8                      devctl;
  97         unsigned long           flags;
  98
  99         /*
 100          * We poll because PolarFire SoC won't expose several OTG-critical
 101          * status change events (from the transceiver) otherwise.
 102          */
 103         devctl = musb_readb(mregs, MUSB_DEVCTL);
 104         dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
 105                 usb_otg_state_string(musb->xceiv->otg->state));
 106
 107         spin_lock_irqsave(&musb->lock, flags);
 108         switch (musb->xceiv->otg->state) {
 109         case OTG_STATE_A_WAIT_BCON:
 110                 devctl &= ~MUSB_DEVCTL_SESSION;
 111                 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
 112
 113                 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
 114                 if (devctl & MUSB_DEVCTL_BDEVICE) {
 115                         musb->xceiv->otg->state = OTG_STATE_B_IDLE;
 116                         MUSB_DEV_MODE(musb);
 117                         mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
 118                 } else {
 119                         musb->xceiv->otg->state = OTG_STATE_A_IDLE;
 120                         MUSB_HST_MODE(musb);
 121                 }
 122                 break;
 123         case OTG_STATE_A_WAIT_VFALL:
 124                 if (devctl & MUSB_DEVCTL_VBUS) {
 125                         mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
 126                         break;
 127                 }
 128                 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
 129                 break;
 130         case OTG_STATE_B_IDLE:
 131                 /*
 132                  * There's no ID-changed IRQ, so we have no good way to tell
 133                  * when to switch to the A-Default state machine (by setting
 134                  * the DEVCTL.Session bit).
 135                  *
 136                  * Workaround:  whenever we're in B_IDLE, try setting the
 137                  * session flag every few seconds.  If it works, ID was
 138                  * grounded and we're now in the A-Default state machine.
 139                  *
 140                  * NOTE: setting the session flag is _supposed_ to trigger
 141                  * SRP but clearly it doesn't.
 142                  */
 143                 musb_writeb(mregs, MUSB_DEVCTL, devctl | MUSB_DEVCTL_SESSION);
 144                 devctl = musb_readb(mregs, MUSB_DEVCTL);
 145                 if (devctl & MUSB_DEVCTL_BDEVICE)
 146                         mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
 147                 else
 148                         musb->xceiv->otg->state = OTG_STATE_A_IDLE;
 149                 break;
 150         default:
 151                 break;
 152         }
 153         spin_unlock_irqrestore(&musb->lock, flags);
 154 }
 155
 156 static void __maybe_unused mpfs_musb_try_idle(struct musb *musb, unsigned long timeout)
 157 {
 158         static unsigned long last_timer;
 159
 160         if (timeout == 0)
 161                 timeout = jiffies + msecs_to_jiffies(3);
 162
 163         /* Never idle if active, or when VBUS timeout is not set as host */
 164         if (musb->is_active || (musb->a_wait_bcon == 0 &&
 165                                 musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)) {
 166                 dev_dbg(musb->controller, "%s active, deleting timer\n",
 167                         usb_otg_state_string(musb->xceiv->otg->state));
 168                 del_timer(&musb->dev_timer);
 169                 last_timer = jiffies;
 170                 return;
 171         }
 172
 173         if (time_after(last_timer, timeout) && timer_pending(&musb->dev_timer)) {
 174                 dev_dbg(musb->controller, "Longer idle timer already pending, ignoring...\n");
 175                 return;
 176         }
 177         last_timer = timeout;
 178
 179         dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
 180                 usb_otg_state_string(musb->xceiv->otg->state),
 181                 jiffies_to_msecs(timeout - jiffies));
 182         mod_timer(&musb->dev_timer, timeout);
 183 }
 184
 185 static irqreturn_t mpfs_musb_interrupt(int irq, void *__hci)
 186 {
 187         unsigned long flags;
 188         irqreturn_t ret = IRQ_NONE;
 189         struct musb *musb = __hci;
 190
 191         spin_lock_irqsave(&musb->lock, flags);
 192
 193         musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
 194         musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
 195         musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
 196
 197         if (musb->int_usb || musb->int_tx || musb->int_rx) {
 198                 musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
 199                 musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
 200                 musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx);
 201                 ret = musb_interrupt(musb);
 202         }
 203
 204         /* Poll for ID change */
 205         if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
 206                 mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
 207
 208         spin_unlock_irqrestore(&musb->lock, flags);
 209
 210         return ret;
 211 }
 212
 213 static int mpfs_musb_init(struct musb *musb)
 214 {
 215         struct device *dev = musb->controller;
 216
 217         musb->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
 218         if (IS_ERR(musb->xceiv)) {
 219                 dev_err(dev, "HS UDC: no transceiver configured\n");
 220                 return PTR_ERR(musb->xceiv);
 221         }
 222
 223         timer_setup(&musb->dev_timer, otg_timer, 0);
 224
 225         musb->dyn_fifo = true;
 226         musb->isr = mpfs_musb_interrupt;
 227
 228         musb_platform_set_vbus(musb, 1);
 229
 230         return 0;
 231 }
 232
 233 static int mpfs_musb_exit(struct musb *musb)
 234 {
 235         del_timer_sync(&musb->dev_timer);
 236
 237         return 0;
 238 }
 239
 240 static const struct musb_platform_ops mpfs_ops = {
 241         .quirks         = MUSB_DMA_INVENTRA,
 242         .init           = mpfs_musb_init,
 243         .exit           = mpfs_musb_exit,
 244         .fifo_mode      = 2,
 245 #ifdef CONFIG_USB_INVENTRA_DMA
 246         .dma_init       = musbhs_dma_controller_create,
 247         .dma_exit       = musbhs_dma_controller_destroy,
 248 #endif
 249 #ifndef CONFIG_USB_MUSB_HOST
 250         .try_idle       = mpfs_musb_try_idle,
 251 #endif
 252         .set_vbus       = mpfs_musb_set_vbus
 253 };
 254
 255 static int mpfs_probe(struct platform_device *pdev)
 256 {
 257         struct musb_hdrc_platform_data *pdata = dev_get_platdata(&pdev->dev);
 258         struct mpfs_glue *glue;
 259         struct platform_device *musb_pdev;
 260         struct device *dev = &pdev->dev;
 261         struct clk *clk;
 262         int ret;
 263
 264         glue = devm_kzalloc(dev, sizeof(*glue), GFP_KERNEL);
 265         if (!glue)
 266                 return -ENOMEM;
 267
 268         musb_pdev = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
 269         if (!musb_pdev) {
 270                 dev_err(dev, "failed to allocate musb device\n");
 271                 return -ENOMEM;
 272         }
 273
 274         clk = devm_clk_get(&pdev->dev, NULL);
 275         if (IS_ERR(clk)) {
 276                 dev_err(&pdev->dev, "failed to get clock\n");
 277                 ret = PTR_ERR(clk);
 278                 goto err_phy_release;
 279         }
 280
 281         ret = clk_prepare_enable(clk);
 282         if (ret) {
 283                 dev_err(&pdev->dev, "failed to enable clock\n");
 284                 goto err_phy_release;
 285         }
 286
 287         musb_pdev->dev.parent = dev;
 288         musb_pdev->dev.coherent_dma_mask = DMA_BIT_MASK(39);
 289         musb_pdev->dev.dma_mask = &musb_pdev->dev.coherent_dma_mask;
 290         device_set_of_node_from_dev(&musb_pdev->dev, dev);
 291
 292         glue->dev = dev;
 293         glue->musb = musb_pdev;
 294         glue->clk = clk;
 295
 296         pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
 297         if (!pdata) {
 298                 ret = -ENOMEM;
 299                 goto err_clk_disable;
 300         }
 301
 302         pdata->config = &mpfs_musb_hdrc_config;
 303         pdata->platform_ops = &mpfs_ops;
 304
 305         pdata->extvbus = device_property_read_bool(dev, "microchip,ext-vbus-drv");
 306
 307         pdata->mode = usb_get_dr_mode(dev);
 308         if (pdata->mode == USB_DR_MODE_UNKNOWN) {
 309                 dev_info(dev, "No dr_mode property found, defaulting to otg\n");
 310                 pdata->mode = USB_DR_MODE_OTG;
 311         }
 312
 313         glue->phy = usb_phy_generic_register();
 314         if (IS_ERR(glue->phy)) {
 315                 dev_err(dev, "failed to register usb-phy %ld\n",
 316                         PTR_ERR(glue->phy));
 317                 ret = PTR_ERR(glue->phy);
 318                 goto err_clk_disable;
 319         }
 320
 321         platform_set_drvdata(pdev, glue);
 322
 323         ret = platform_device_add_resources(musb_pdev, pdev->resource, pdev->num_resources);
 324         if (ret) {
 325                 dev_err(dev, "failed to add resources\n");
 326                 goto err_clk_disable;
 327         }
 328
 329         ret = platform_device_add_data(musb_pdev, pdata, sizeof(*pdata));
 330         if (ret) {
 331                 dev_err(dev, "failed to add platform_data\n");
 332                 goto err_clk_disable;
 333         }
 334
 335         ret = platform_device_add(musb_pdev);
 336         if (ret) {
 337                 dev_err(dev, "failed to register musb device\n");
 338                 goto err_clk_disable;
 339         }
 340
 341         dev_info(&pdev->dev, "Registered MPFS MUSB driver\n");
 342         return 0;
 343
 344 err_clk_disable:
 345         clk_disable_unprepare(clk);
 346
 347 err_phy_release:
 348         usb_phy_generic_unregister(glue->phy);
 349         platform_device_put(musb_pdev);
 350         return ret;
 351 }
 352
 353 static void mpfs_remove(struct platform_device *pdev)
 354 {
 355         struct mpfs_glue *glue = platform_get_drvdata(pdev);
 356
 357         clk_disable_unprepare(glue->clk);
 358         platform_device_unregister(glue->musb);
 359         usb_phy_generic_unregister(pdev);
 360 }
 361
 362 #ifdef CONFIG_OF
 363 static const struct of_device_id mpfs_id_table[] = {
 364         { .compatible = "microchip,mpfs-musb" },
 365         { }
 366 };
 367 MODULE_DEVICE_TABLE(of, mpfs_id_table);
 368 #endif
 369
 370 static struct platform_driver mpfs_musb_driver = {
 371         .probe = mpfs_probe,
 372         .remove = mpfs_remove,
 373         .driver = {
 374                 .name = "mpfs-musb",
 375                 .of_match_table = of_match_ptr(mpfs_id_table)
 376         },
 377 };
 378
 379 module_platform_driver(mpfs_musb_driver);
 380
 381 MODULE_DESCRIPTION("PolarFire SoC MUSB Glue Layer");
 382 MODULE_LICENSE("GPL");