1 // SPDX-License-Identifier: GPL-2.0
4 * ATI Mach64 Hardware Acceleration
7 #include <linux/delay.h>
8 #include <linux/unaligned.h>
10 #include <video/mach64.h>
14 * Generic Mach64 routines
17 /* this is for DMA GUI engine! work in progress */
23 } BM_DESCRIPTOR_ENTRY
;
25 #define LAST_DESCRIPTOR (1 << 31)
26 #define SYSTEM_TO_FRAME_BUFFER 0
28 static u32
rotation24bpp(u32 dx
, u32 direction
)
31 if (direction
& DST_X_LEFT_TO_RIGHT
) {
32 rotation
= (dx
/ 4) % 6;
34 rotation
= ((dx
+ 2) / 4) % 6;
37 return ((rotation
<< 8) | DST_24_ROTATION_ENABLE
);
40 void aty_reset_engine(struct atyfb_par
*par
)
43 aty_st_le32(GEN_TEST_CNTL
,
44 aty_ld_le32(GEN_TEST_CNTL
, par
) &
45 ~(GUI_ENGINE_ENABLE
| HWCURSOR_ENABLE
), par
);
47 aty_st_le32(GEN_TEST_CNTL
,
48 aty_ld_le32(GEN_TEST_CNTL
, par
) | GUI_ENGINE_ENABLE
, par
);
49 /* ensure engine is not locked up by clearing any FIFO or */
52 aty_ld_le32(BUS_CNTL
, par
) | BUS_HOST_ERR_ACK
| BUS_FIFO_ERR_ACK
, par
);
57 static void reset_GTC_3D_engine(const struct atyfb_par
*par
)
59 aty_st_le32(SCALE_3D_CNTL
, 0xc0, par
);
60 mdelay(GTC_3D_RESET_DELAY
);
61 aty_st_le32(SETUP_CNTL
, 0x00, par
);
62 mdelay(GTC_3D_RESET_DELAY
);
63 aty_st_le32(SCALE_3D_CNTL
, 0x00, par
);
64 mdelay(GTC_3D_RESET_DELAY
);
67 void aty_init_engine(struct atyfb_par
*par
, struct fb_info
*info
)
72 /* determine modal information from global mode structure */
73 pitch_value
= info
->fix
.line_length
/ (info
->var
.bits_per_pixel
/ 8);
74 vxres
= info
->var
.xres_virtual
;
76 if (info
->var
.bits_per_pixel
== 24) {
77 /* In 24 bpp, the engine is in 8 bpp - this requires that all */
78 /* horizontal coordinates and widths must be adjusted */
83 /* On GTC (RagePro), we need to reset the 3D engine before */
84 if (M64_HAS(RESET_3D
))
85 reset_GTC_3D_engine(par
);
87 /* Reset engine, enable, and clear any engine errors */
88 aty_reset_engine(par
);
89 /* Ensure that vga page pointers are set to zero - the upper */
90 /* page pointers are set to 1 to handle overflows in the */
92 aty_st_le32(MEM_VGA_WP_SEL
, 0x00010000, par
);
93 aty_st_le32(MEM_VGA_RP_SEL
, 0x00010000, par
);
95 /* ---- Setup standard engine context ---- */
97 /* All GUI registers here are FIFOed - therefore, wait for */
98 /* the appropriate number of empty FIFO entries */
99 wait_for_fifo(14, par
);
101 /* enable all registers to be loaded for context loads */
102 aty_st_le32(CONTEXT_MASK
, 0xFFFFFFFF, par
);
104 /* set destination pitch to modal pitch, set offset to zero */
105 aty_st_le32(DST_OFF_PITCH
, (pitch_value
/ 8) << 22, par
);
107 /* zero these registers (set them to a known state) */
108 aty_st_le32(DST_Y_X
, 0, par
);
109 aty_st_le32(DST_HEIGHT
, 0, par
);
110 aty_st_le32(DST_BRES_ERR
, 0, par
);
111 aty_st_le32(DST_BRES_INC
, 0, par
);
112 aty_st_le32(DST_BRES_DEC
, 0, par
);
114 /* set destination drawing attributes */
115 aty_st_le32(DST_CNTL
, DST_LAST_PEL
| DST_Y_TOP_TO_BOTTOM
|
116 DST_X_LEFT_TO_RIGHT
, par
);
118 /* set source pitch to modal pitch, set offset to zero */
119 aty_st_le32(SRC_OFF_PITCH
, (pitch_value
/ 8) << 22, par
);
121 /* set these registers to a known state */
122 aty_st_le32(SRC_Y_X
, 0, par
);
123 aty_st_le32(SRC_HEIGHT1_WIDTH1
, 1, par
);
124 aty_st_le32(SRC_Y_X_START
, 0, par
);
125 aty_st_le32(SRC_HEIGHT2_WIDTH2
, 1, par
);
127 /* set source pixel retrieving attributes */
128 aty_st_le32(SRC_CNTL
, SRC_LINE_X_LEFT_TO_RIGHT
, par
);
130 /* set host attributes */
131 wait_for_fifo(13, par
);
132 aty_st_le32(HOST_CNTL
, HOST_BYTE_ALIGN
, par
);
134 /* set pattern attributes */
135 aty_st_le32(PAT_REG0
, 0, par
);
136 aty_st_le32(PAT_REG1
, 0, par
);
137 aty_st_le32(PAT_CNTL
, 0, par
);
139 /* set scissors to modal size */
140 aty_st_le32(SC_LEFT
, 0, par
);
141 aty_st_le32(SC_TOP
, 0, par
);
142 aty_st_le32(SC_BOTTOM
, par
->crtc
.vyres
- 1, par
);
143 aty_st_le32(SC_RIGHT
, vxres
- 1, par
);
145 /* set background color to minimum value (usually BLACK) */
146 aty_st_le32(DP_BKGD_CLR
, 0, par
);
148 /* set foreground color to maximum value (usually WHITE) */
149 aty_st_le32(DP_FRGD_CLR
, 0xFFFFFFFF, par
);
151 /* set write mask to effect all pixel bits */
152 aty_st_le32(DP_WRITE_MASK
, 0xFFFFFFFF, par
);
154 /* set foreground mix to overpaint and background mix to */
156 aty_st_le32(DP_MIX
, FRGD_MIX_S
| BKGD_MIX_D
, par
);
158 /* set primary source pixel channel to foreground color */
160 aty_st_le32(DP_SRC
, FRGD_SRC_FRGD_CLR
, par
);
162 /* set compare functionality to false (no-effect on */
164 wait_for_fifo(3, par
);
165 aty_st_le32(CLR_CMP_CLR
, 0, par
);
166 aty_st_le32(CLR_CMP_MASK
, 0xFFFFFFFF, par
);
167 aty_st_le32(CLR_CMP_CNTL
, 0, par
);
169 /* set pixel depth */
170 wait_for_fifo(2, par
);
171 aty_st_le32(DP_PIX_WIDTH
, par
->crtc
.dp_pix_width
, par
);
172 aty_st_le32(DP_CHAIN_MASK
, par
->crtc
.dp_chain_mask
, par
);
174 wait_for_fifo(5, par
);
175 aty_st_le32(SCALE_3D_CNTL
, 0, par
);
176 aty_st_le32(Z_CNTL
, 0, par
);
177 aty_st_le32(CRTC_INT_CNTL
, aty_ld_le32(CRTC_INT_CNTL
, par
) & ~0x20,
179 aty_st_le32(GUI_TRAJ_CNTL
, 0x100023, par
);
181 /* insure engine is idle before leaving */
186 * Accelerated functions
189 static inline void draw_rect(s16 x
, s16 y
, u16 width
, u16 height
,
190 struct atyfb_par
*par
)
192 /* perform rectangle fill */
193 wait_for_fifo(2, par
);
194 aty_st_le32(DST_Y_X
, (x
<< 16) | y
, par
);
195 aty_st_le32(DST_HEIGHT_WIDTH
, (width
<< 16) | height
, par
);
196 par
->blitter_may_be_busy
= 1;
199 void atyfb_copyarea(struct fb_info
*info
, const struct fb_copyarea
*area
)
201 struct atyfb_par
*par
= (struct atyfb_par
*) info
->par
;
202 u32 dy
= area
->dy
, sy
= area
->sy
, direction
= DST_LAST_PEL
;
203 u32 sx
= area
->sx
, dx
= area
->dx
, width
= area
->width
, rotation
= 0;
207 if (!area
->width
|| !area
->height
)
209 if (!par
->accel_flags
) {
210 cfb_copyarea(info
, area
);
214 if (info
->var
.bits_per_pixel
== 24) {
215 /* In 24 bpp, the engine is in 8 bpp - this requires that all */
216 /* horizontal coordinates and widths must be adjusted */
222 if (area
->sy
< area
->dy
) {
223 dy
+= area
->height
- 1;
224 sy
+= area
->height
- 1;
226 direction
|= DST_Y_TOP_TO_BOTTOM
;
232 direction
|= DST_X_LEFT_TO_RIGHT
;
234 if (info
->var
.bits_per_pixel
== 24) {
235 rotation
= rotation24bpp(dx
, direction
);
238 wait_for_fifo(5, par
);
239 aty_st_le32(DP_PIX_WIDTH
, par
->crtc
.dp_pix_width
, par
);
240 aty_st_le32(DP_SRC
, FRGD_SRC_BLIT
, par
);
241 aty_st_le32(SRC_Y_X
, (sx
<< 16) | sy
, par
);
242 aty_st_le32(SRC_HEIGHT1_WIDTH1
, (width
<< 16) | area
->height
, par
);
243 aty_st_le32(DST_CNTL
, direction
| rotation
, par
);
244 draw_rect(dx
, dy
, width
, area
->height
, par
);
247 void atyfb_fillrect(struct fb_info
*info
, const struct fb_fillrect
*rect
)
249 struct atyfb_par
*par
= (struct atyfb_par
*) info
->par
;
250 u32 color
, dx
= rect
->dx
, width
= rect
->width
, rotation
= 0;
254 if (!rect
->width
|| !rect
->height
)
256 if (!par
->accel_flags
) {
257 cfb_fillrect(info
, rect
);
261 if (info
->fix
.visual
== FB_VISUAL_TRUECOLOR
||
262 info
->fix
.visual
== FB_VISUAL_DIRECTCOLOR
)
263 color
= ((u32
*)(info
->pseudo_palette
))[rect
->color
];
267 if (info
->var
.bits_per_pixel
== 24) {
268 /* In 24 bpp, the engine is in 8 bpp - this requires that all */
269 /* horizontal coordinates and widths must be adjusted */
272 rotation
= rotation24bpp(dx
, DST_X_LEFT_TO_RIGHT
);
275 wait_for_fifo(4, par
);
276 aty_st_le32(DP_PIX_WIDTH
, par
->crtc
.dp_pix_width
, par
);
277 aty_st_le32(DP_FRGD_CLR
, color
, par
);
279 BKGD_SRC_BKGD_CLR
| FRGD_SRC_FRGD_CLR
| MONO_SRC_ONE
,
281 aty_st_le32(DST_CNTL
,
282 DST_LAST_PEL
| DST_Y_TOP_TO_BOTTOM
|
283 DST_X_LEFT_TO_RIGHT
| rotation
, par
);
284 draw_rect(dx
, rect
->dy
, width
, rect
->height
, par
);
287 void atyfb_imageblit(struct fb_info
*info
, const struct fb_image
*image
)
289 struct atyfb_par
*par
= (struct atyfb_par
*) info
->par
;
290 u32 src_bytes
, dx
= image
->dx
, dy
= image
->dy
, width
= image
->width
;
291 u32 pix_width
, rotation
= 0, src
, mix
;
295 if (!image
->width
|| !image
->height
)
297 if (!par
->accel_flags
||
298 (image
->depth
!= 1 && info
->var
.bits_per_pixel
!= image
->depth
)) {
299 cfb_imageblit(info
, image
);
303 pix_width
= par
->crtc
.dp_pix_width
;
305 switch (image
->depth
) {
307 pix_width
&= ~(BYTE_ORDER_MASK
| HOST_MASK
);
308 pix_width
|= (BYTE_ORDER_MSB_TO_LSB
| HOST_1BPP
);
311 pix_width
&= ~(BYTE_ORDER_MASK
| HOST_MASK
);
312 pix_width
|= (BYTE_ORDER_MSB_TO_LSB
| HOST_4BPP
);
315 pix_width
&= ~HOST_MASK
;
316 pix_width
|= HOST_8BPP
;
319 pix_width
&= ~HOST_MASK
;
320 pix_width
|= HOST_15BPP
;
323 pix_width
&= ~HOST_MASK
;
324 pix_width
|= HOST_16BPP
;
327 pix_width
&= ~HOST_MASK
;
328 pix_width
|= HOST_24BPP
;
331 pix_width
&= ~HOST_MASK
;
332 pix_width
|= HOST_32BPP
;
336 if (info
->var
.bits_per_pixel
== 24) {
337 /* In 24 bpp, the engine is in 8 bpp - this requires that all */
338 /* horizontal coordinates and widths must be adjusted */
342 rotation
= rotation24bpp(dx
, DST_X_LEFT_TO_RIGHT
);
344 pix_width
&= ~DST_MASK
;
345 pix_width
|= DST_8BPP
;
348 * since Rage 3D IIc we have DP_HOST_TRIPLE_EN bit
349 * this hwaccelerated triple has an issue with not aligned data
351 if (image
->depth
== 1 && M64_HAS(HW_TRIPLE
) && image
->width
% 8 == 0)
352 pix_width
|= DP_HOST_TRIPLE_EN
;
355 if (image
->depth
== 1) {
357 if (info
->fix
.visual
== FB_VISUAL_TRUECOLOR
||
358 info
->fix
.visual
== FB_VISUAL_DIRECTCOLOR
) {
359 fg
= ((u32
*)(info
->pseudo_palette
))[image
->fg_color
];
360 bg
= ((u32
*)(info
->pseudo_palette
))[image
->bg_color
];
362 fg
= image
->fg_color
;
363 bg
= image
->bg_color
;
366 wait_for_fifo(2, par
);
367 aty_st_le32(DP_BKGD_CLR
, bg
, par
);
368 aty_st_le32(DP_FRGD_CLR
, fg
, par
);
369 src
= MONO_SRC_HOST
| FRGD_SRC_FRGD_CLR
| BKGD_SRC_BKGD_CLR
;
370 mix
= FRGD_MIX_S
| BKGD_MIX_S
;
372 src
= MONO_SRC_ONE
| FRGD_SRC_HOST
;
373 mix
= FRGD_MIX_D_XOR_S
| BKGD_MIX_D
;
376 wait_for_fifo(5, par
);
377 aty_st_le32(DP_PIX_WIDTH
, pix_width
, par
);
378 aty_st_le32(DP_MIX
, mix
, par
);
379 aty_st_le32(DP_SRC
, src
, par
);
380 aty_st_le32(HOST_CNTL
, HOST_BYTE_ALIGN
, par
);
381 aty_st_le32(DST_CNTL
, DST_Y_TOP_TO_BOTTOM
| DST_X_LEFT_TO_RIGHT
| rotation
, par
);
383 draw_rect(dx
, dy
, width
, image
->height
, par
);
384 src_bytes
= (((image
->width
* image
->depth
) + 7) / 8) * image
->height
;
386 /* manual triple each pixel */
387 if (image
->depth
== 1 && info
->var
.bits_per_pixel
== 24 && !(pix_width
& DP_HOST_TRIPLE_EN
)) {
388 int inbit
, outbit
, mult24
, byte_id_in_dword
, width
;
389 u8
*pbitmapin
= (u8
*)image
->data
, *pbitmapout
;
392 for (width
= image
->width
, inbit
= 7, mult24
= 0; src_bytes
; ) {
393 for (hostdword
= 0, pbitmapout
= (u8
*)&hostdword
, byte_id_in_dword
= 0;
394 byte_id_in_dword
< 4 && src_bytes
;
395 byte_id_in_dword
++, pbitmapout
++) {
396 for (outbit
= 7; outbit
>= 0; outbit
--) {
397 *pbitmapout
|= (((*pbitmapin
>> inbit
) & 1) << outbit
);
407 if (inbit
< 0 || width
== 0) {
413 width
= image
->width
;
419 wait_for_fifo(1, par
);
420 aty_st_le32(HOST_DATA0
, le32_to_cpu(hostdword
), par
);
423 u32
*pbitmap
, dwords
= (src_bytes
+ 3) / 4;
424 for (pbitmap
= (u32
*)(image
->data
); dwords
; dwords
--, pbitmap
++) {
425 wait_for_fifo(1, par
);
426 aty_st_le32(HOST_DATA0
, get_unaligned_le32(pbitmap
), par
);