1 # SPDX-License-Identifier: GPL-2.0
2 config FB_OMAP2_DSS_INIT
7 select VIDEOMODE_HELPERS
8 select FB_OMAP2_DSS_INIT
11 config FB_OMAP2_DSS_DEBUG
14 This enables printing of debug messages. Alternatively, debug messages
15 can also be enabled by setting CONFIG_DYNAMIC_DEBUG and then setting
16 appropriate flags in <debugfs>/dynamic_debug/control.
18 config FB_OMAP2_DSS_DEBUGFS
19 bool "Debugfs filesystem support"
22 This enables debugfs for OMAPDSS at <debugfs>/omapdss. This enables
23 querying about clock configuration and register configuration of dss,
24 dispc, dsi, hdmi and rfbi.
26 config FB_OMAP2_DSS_COLLECT_IRQ_STATS
27 bool "Collect DSS IRQ statistics"
28 depends on FB_OMAP2_DSS_DEBUGFS
30 Collect DSS IRQ statistics, printable via debugfs.
32 The statistics can be found from
33 <debugfs>/omapdss/dispc_irq for DISPC interrupts, and
34 <debugfs>/omapdss/dsi_irq for DSI interrupts.
36 config FB_OMAP2_DSS_DPI
40 DPI Interface. This is the Parallel Display Interface.
42 config FB_OMAP2_DSS_VENC
46 OMAP Video Encoder support for S-Video and composite TV-out.
48 config FB_OMAP2_DSS_HDMI_COMMON
51 config FB_OMAP4_DSS_HDMI
52 bool "HDMI support for OMAP4"
54 select FB_OMAP2_DSS_HDMI_COMMON
56 HDMI support for OMAP4 based SoCs.
58 config FB_OMAP5_DSS_HDMI
59 bool "HDMI support for OMAP5"
60 select FB_OMAP2_DSS_HDMI_COMMON
62 HDMI Interface for OMAP5 and similar cores. This adds the High
63 Definition Multimedia Interface. See https://www.hdmi.org/ for HDMI
66 config FB_OMAP2_DSS_SDI
69 SDI (Serial Display Interface) support.
71 SDI is a high speed one-way display serial bus between the host
72 processor and a display.
74 config FB_OMAP2_DSS_DSI
77 MIPI DSI (Display Serial Interface) support.
79 DSI is a high speed half-duplex serial interface between the host
80 processor and a peripheral, such as a display or a framebuffer chip.
82 See https://www.mipi.org/ for DSI specifications.
84 config FB_OMAP2_DSS_MIN_FCK_PER_PCK
85 int "Minimum FCK/PCK ratio (for scaling)"
89 This can be used to adjust the minimum FCK/PCK ratio.
91 With this you can make sure that DISPC FCK is at least
92 n x PCK. Video plane scaling requires higher FCK than
95 If this is set to 0, there's no extra constraint on the
96 DISPC FCK. However, the FCK will at minimum be
97 2xPCK (if active matrix) or 3xPCK (if passive matrix).
99 Max FCK is 173MHz, so this doesn't work if your PCK
102 config FB_OMAP2_DSS_SLEEP_AFTER_VENC_RESET
103 bool "Sleep 20ms after VENC reset"
106 There is a 20ms sleep after VENC reset which seemed to fix the
107 reset. The reason for the bug is unclear, and it's also unclear
108 on what platforms this happens.
110 This option enables the sleep, and is enabled by default. You can
111 disable the sleep if it doesn't cause problems on your platform.