include/dt-bindings/clock/amlogic,a1-pll-clkc.h

   1 /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
   2 /*
   3  * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
   4  * Author: Jian Hu <jian.hu@amlogic.com>
   5  *
   6  * Copyright (c) 2023, SberDevices. All Rights Reserved.
   7  * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru>
   8  */
   9
  10 #ifndef __A1_PLL_CLKC_H
  11 #define __A1_PLL_CLKC_H
  12
  13 #define CLKID_FIXED_PLL_DCO     0
  14 #define CLKID_FIXED_PLL         1
  15 #define CLKID_FCLK_DIV2_DIV     2
  16 #define CLKID_FCLK_DIV3_DIV     3
  17 #define CLKID_FCLK_DIV5_DIV     4
  18 #define CLKID_FCLK_DIV7_DIV     5
  19 #define CLKID_FCLK_DIV2         6
  20 #define CLKID_FCLK_DIV3         7
  21 #define CLKID_FCLK_DIV5         8
  22 #define CLKID_FCLK_DIV7         9
  23 #define CLKID_HIFI_PLL          10
  24 #define CLKID_SYS_PLL           11
  25
  26 #endif /* __A1_PLL_CLKC_H */