| blob | 38531acd699fe82a3384451c509cf8f79d3a8d80 |
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /*
3 * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
4 */
6 #ifndef _DT_BINDINGS_CLK_QCOM_SA8775P_CAM_CC_H
7 #define _DT_BINDINGS_CLK_QCOM_SA8775P_CAM_CC_H
9 /* CAM_CC clocks */
10 #define CAM_CC_CAMNOC_AXI_CLK 0
11 #define CAM_CC_CAMNOC_AXI_CLK_SRC 1
12 #define CAM_CC_CAMNOC_DCD_XO_CLK 2
13 #define CAM_CC_CAMNOC_XO_CLK 3
14 #define CAM_CC_CCI_0_CLK 4
15 #define CAM_CC_CCI_0_CLK_SRC 5
16 #define CAM_CC_CCI_1_CLK 6
17 #define CAM_CC_CCI_1_CLK_SRC 7
18 #define CAM_CC_CCI_2_CLK 8
19 #define CAM_CC_CCI_2_CLK_SRC 9
20 #define CAM_CC_CCI_3_CLK 10
21 #define CAM_CC_CCI_3_CLK_SRC 11
22 #define CAM_CC_CORE_AHB_CLK 12
23 #define CAM_CC_CPAS_AHB_CLK 13
24 #define CAM_CC_CPAS_FAST_AHB_CLK 14
25 #define CAM_CC_CPAS_IFE_0_CLK 15
26 #define CAM_CC_CPAS_IFE_1_CLK 16
27 #define CAM_CC_CPAS_IFE_LITE_CLK 17
28 #define CAM_CC_CPAS_IPE_CLK 18
29 #define CAM_CC_CPAS_SFE_LITE_0_CLK 19
30 #define CAM_CC_CPAS_SFE_LITE_1_CLK 20
31 #define CAM_CC_CPHY_RX_CLK_SRC 21
32 #define CAM_CC_CSI0PHYTIMER_CLK 22
33 #define CAM_CC_CSI0PHYTIMER_CLK_SRC 23
34 #define CAM_CC_CSI1PHYTIMER_CLK 24
35 #define CAM_CC_CSI1PHYTIMER_CLK_SRC 25
36 #define CAM_CC_CSI2PHYTIMER_CLK 26
37 #define CAM_CC_CSI2PHYTIMER_CLK_SRC 27
38 #define CAM_CC_CSI3PHYTIMER_CLK 28
39 #define CAM_CC_CSI3PHYTIMER_CLK_SRC 29
40 #define CAM_CC_CSID_CLK 30
41 #define CAM_CC_CSID_CLK_SRC 31
42 #define CAM_CC_CSID_CSIPHY_RX_CLK 32
43 #define CAM_CC_CSIPHY0_CLK 33
44 #define CAM_CC_CSIPHY1_CLK 34
45 #define CAM_CC_CSIPHY2_CLK 35
46 #define CAM_CC_CSIPHY3_CLK 36
47 #define CAM_CC_FAST_AHB_CLK_SRC 37
48 #define CAM_CC_GDSC_CLK 38
49 #define CAM_CC_ICP_AHB_CLK 39
50 #define CAM_CC_ICP_CLK 40
51 #define CAM_CC_ICP_CLK_SRC 41
52 #define CAM_CC_IFE_0_CLK 42
53 #define CAM_CC_IFE_0_CLK_SRC 43
54 #define CAM_CC_IFE_0_FAST_AHB_CLK 44
55 #define CAM_CC_IFE_1_CLK 45
56 #define CAM_CC_IFE_1_CLK_SRC 46
57 #define CAM_CC_IFE_1_FAST_AHB_CLK 47
58 #define CAM_CC_IFE_LITE_AHB_CLK 48
59 #define CAM_CC_IFE_LITE_CLK 49
60 #define CAM_CC_IFE_LITE_CLK_SRC 50
61 #define CAM_CC_IFE_LITE_CPHY_RX_CLK 51
62 #define CAM_CC_IFE_LITE_CSID_CLK 52
63 #define CAM_CC_IFE_LITE_CSID_CLK_SRC 53
64 #define CAM_CC_IPE_AHB_CLK 54
65 #define CAM_CC_IPE_CLK 55
66 #define CAM_CC_IPE_CLK_SRC 56
67 #define CAM_CC_IPE_FAST_AHB_CLK 57
68 #define CAM_CC_MCLK0_CLK 58
69 #define CAM_CC_MCLK0_CLK_SRC 59
70 #define CAM_CC_MCLK1_CLK 60
71 #define CAM_CC_MCLK1_CLK_SRC 61
72 #define CAM_CC_MCLK2_CLK 62
73 #define CAM_CC_MCLK2_CLK_SRC 63
74 #define CAM_CC_MCLK3_CLK 64
75 #define CAM_CC_MCLK3_CLK_SRC 65
76 #define CAM_CC_PLL0 66
77 #define CAM_CC_PLL0_OUT_EVEN 67
78 #define CAM_CC_PLL0_OUT_ODD 68
79 #define CAM_CC_PLL2 69
80 #define CAM_CC_PLL3 70
81 #define CAM_CC_PLL3_OUT_EVEN 71
82 #define CAM_CC_PLL4 72
83 #define CAM_CC_PLL4_OUT_EVEN 73
84 #define CAM_CC_PLL5 74
85 #define CAM_CC_PLL5_OUT_EVEN 75
86 #define CAM_CC_SFE_LITE_0_CLK 76
87 #define CAM_CC_SFE_LITE_0_FAST_AHB_CLK 77
88 #define CAM_CC_SFE_LITE_1_CLK 78
89 #define CAM_CC_SFE_LITE_1_FAST_AHB_CLK 79
90 #define CAM_CC_SLEEP_CLK 80
91 #define CAM_CC_SLEEP_CLK_SRC 81
92 #define CAM_CC_SLOW_AHB_CLK_SRC 82
93 #define CAM_CC_SM_OBS_CLK 83
94 #define CAM_CC_XO_CLK_SRC 84
95 #define CAM_CC_QDSS_DEBUG_XO_CLK 85
97 /* CAM_CC power domains */
98 #define CAM_CC_TITAN_TOP_GDSC 0
100 /* CAM_CC resets */
101 #define CAM_CC_ICP_BCR 0
102 #define CAM_CC_IFE_0_BCR 1
103 #define CAM_CC_IFE_1_BCR 2
104 #define CAM_CC_IPE_0_BCR 3
105 #define CAM_CC_SFE_LITE_0_BCR 4
106 #define CAM_CC_SFE_LITE_1_BCR 5
108 #endif