accel/qaic: Add AIC200 support
[drm/drm-misc.git] / include / dt-bindings / clock / sophgo,sg2042-rpgate.h
blob8b4522d5f559f51d37c2a9fdfedd19a47b92f0e3
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
2 /*
3 * Copyright (C) 2023 Sophgo Technology Inc. All rights reserved.
4 */
6 #ifndef __DT_BINDINGS_SOPHGO_SG2042_RPGATE_H__
7 #define __DT_BINDINGS_SOPHGO_SG2042_RPGATE_H__
9 #define GATE_CLK_RXU0 0
10 #define GATE_CLK_RXU1 1
11 #define GATE_CLK_RXU2 2
12 #define GATE_CLK_RXU3 3
13 #define GATE_CLK_RXU4 4
14 #define GATE_CLK_RXU5 5
15 #define GATE_CLK_RXU6 6
16 #define GATE_CLK_RXU7 7
17 #define GATE_CLK_RXU8 8
18 #define GATE_CLK_RXU9 9
19 #define GATE_CLK_RXU10 10
20 #define GATE_CLK_RXU11 11
21 #define GATE_CLK_RXU12 12
22 #define GATE_CLK_RXU13 13
23 #define GATE_CLK_RXU14 14
24 #define GATE_CLK_RXU15 15
25 #define GATE_CLK_RXU16 16
26 #define GATE_CLK_RXU17 17
27 #define GATE_CLK_RXU18 18
28 #define GATE_CLK_RXU19 19
29 #define GATE_CLK_RXU20 20
30 #define GATE_CLK_RXU21 21
31 #define GATE_CLK_RXU22 22
32 #define GATE_CLK_RXU23 23
33 #define GATE_CLK_RXU24 24
34 #define GATE_CLK_RXU25 25
35 #define GATE_CLK_RXU26 26
36 #define GATE_CLK_RXU27 27
37 #define GATE_CLK_RXU28 28
38 #define GATE_CLK_RXU29 29
39 #define GATE_CLK_RXU30 30
40 #define GATE_CLK_RXU31 31
41 #define GATE_CLK_MP0 32
42 #define GATE_CLK_MP1 33
43 #define GATE_CLK_MP2 34
44 #define GATE_CLK_MP3 35
45 #define GATE_CLK_MP4 36
46 #define GATE_CLK_MP5 37
47 #define GATE_CLK_MP6 38
48 #define GATE_CLK_MP7 39
49 #define GATE_CLK_MP8 40
50 #define GATE_CLK_MP9 41
51 #define GATE_CLK_MP10 42
52 #define GATE_CLK_MP11 43
53 #define GATE_CLK_MP12 44
54 #define GATE_CLK_MP13 45
55 #define GATE_CLK_MP14 46
56 #define GATE_CLK_MP15 47
58 #endif /* __DT_BINDINGS_SOPHGO_SG2042_RPGATE_H__ */