drm/panel-edp: Add STA 116QHD024002
[drm/drm-misc.git] / include / dt-bindings / interconnect / qcom,sm6115.h
blob21090e585f05fd6b6267d66869f5ff05af898ddf
1 /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
2 /*
3 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2023, Linaro Limited
5 */
7 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM6115_H
8 #define __DT_BINDINGS_INTERCONNECT_QCOM_SM6115_H
10 /* BIMC */
11 #define MASTER_AMPSS_M0 0
12 #define MASTER_SNOC_BIMC_RT 1
13 #define MASTER_SNOC_BIMC_NRT 2
14 #define SNOC_BIMC_MAS 3
15 #define MASTER_GRAPHICS_3D 4
16 #define MASTER_TCU_0 5
17 #define SLAVE_EBI_CH0 6
18 #define BIMC_SNOC_SLV 7
20 /* CNOC */
21 #define SNOC_CNOC_MAS 0
22 #define MASTER_QDSS_DAP 1
23 #define SLAVE_AHB2PHY_USB 2
24 #define SLAVE_APSS_THROTTLE_CFG 3
25 #define SLAVE_BIMC_CFG 4
26 #define SLAVE_BOOT_ROM 5
27 #define SLAVE_CAMERA_NRT_THROTTLE_CFG 6
28 #define SLAVE_CAMERA_RT_THROTTLE_CFG 7
29 #define SLAVE_CAMERA_CFG 8
30 #define SLAVE_CLK_CTL 9
31 #define SLAVE_RBCPR_CX_CFG 10
32 #define SLAVE_RBCPR_MX_CFG 11
33 #define SLAVE_CRYPTO_0_CFG 12
34 #define SLAVE_DCC_CFG 13
35 #define SLAVE_DDR_PHY_CFG 14
36 #define SLAVE_DDR_SS_CFG 15
37 #define SLAVE_DISPLAY_CFG 16
38 #define SLAVE_DISPLAY_THROTTLE_CFG 17
39 #define SLAVE_GPU_CFG 18
40 #define SLAVE_GPU_THROTTLE_CFG 19
41 #define SLAVE_HWKM_CORE 20
42 #define SLAVE_IMEM_CFG 21
43 #define SLAVE_IPA_CFG 22
44 #define SLAVE_LPASS 23
45 #define SLAVE_MAPSS 24
46 #define SLAVE_MDSP_MPU_CFG 25
47 #define SLAVE_MESSAGE_RAM 26
48 #define SLAVE_CNOC_MSS 27
49 #define SLAVE_PDM 28
50 #define SLAVE_PIMEM_CFG 29
51 #define SLAVE_PKA_CORE 30
52 #define SLAVE_PMIC_ARB 31
53 #define SLAVE_QDSS_CFG 32
54 #define SLAVE_QM_CFG 33
55 #define SLAVE_QM_MPU_CFG 34
56 #define SLAVE_QPIC 35
57 #define SLAVE_QUP_0 36
58 #define SLAVE_RPM 37
59 #define SLAVE_SDCC_1 38
60 #define SLAVE_SDCC_2 39
61 #define SLAVE_SECURITY 40
62 #define SLAVE_SNOC_CFG 41
63 #define SLAVE_TCSR 42
64 #define SLAVE_TLMM 43
65 #define SLAVE_USB3 44
66 #define SLAVE_VENUS_CFG 45
67 #define SLAVE_VENUS_THROTTLE_CFG 46
68 #define SLAVE_VSENSE_CTRL_CFG 47
69 #define SLAVE_SERVICE_CNOC 48
71 /* SNOC */
72 #define MASTER_CRYPTO_CORE0 0
73 #define MASTER_SNOC_CFG 1
74 #define MASTER_TIC 2
75 #define MASTER_ANOC_SNOC 3
76 #define BIMC_SNOC_MAS 4
77 #define MASTER_PIMEM 5
78 #define MASTER_QDSS_BAM 6
79 #define MASTER_QPIC 7
80 #define MASTER_QUP_0 8
81 #define MASTER_IPA 9
82 #define MASTER_QDSS_ETR 10
83 #define MASTER_SDCC_1 11
84 #define MASTER_SDCC_2 12
85 #define MASTER_USB3 13
86 #define SLAVE_APPSS 14
87 #define SNOC_CNOC_SLV 15
88 #define SLAVE_OCIMEM 16
89 #define SLAVE_PIMEM 17
90 #define SNOC_BIMC_SLV 18
91 #define SLAVE_SERVICE_SNOC 19
92 #define SLAVE_QDSS_STM 20
93 #define SLAVE_TCU 21
94 #define SLAVE_ANOC_SNOC 22
96 /* CLK Virtual */
97 #define MASTER_QUP_CORE_0 0
98 #define SLAVE_QUP_CORE_0 1
100 /* MMRT Virtual */
101 #define MASTER_CAMNOC_HF 0
102 #define MASTER_MDP_PORT0 1
103 #define SLAVE_SNOC_BIMC_RT 2
105 /* MMNRT Virtual */
106 #define MASTER_CAMNOC_SF 0
107 #define MASTER_VIDEO_P0 1
108 #define MASTER_VIDEO_PROC 2
109 #define SLAVE_SNOC_BIMC_NRT 3
111 #endif