?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
drm/ast: Only warn about unsupported TX chips on Gen4 and later
[drm/drm-misc.git] / include / linux / ata.h
blob792e10a09787f8cf07b9d267afd28b5bacf685ee
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2
3 /*
4 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
5 * Copyright 2003-2004 Jeff Garzik
6 *
7 * libata documentation is available via 'make {ps|pdf}docs',
8 * as Documentation/driver-api/libata.rst
9 *
10 * Hardware documentation available from http://www.t13.org/
11 */
12
13 #ifndef __LINUX_ATA_H__
14 #define __LINUX_ATA_H__
15
16 #include <linux/bits.h>
17 #include <linux/string.h>
18 #include <linux/types.h>
19
20 /* defines only for the constants which don't work well as enums */
21 #define ATA_DMA_BOUNDARY 0xffffUL
22 #define ATA_DMA_MASK 0xffffffffULL
23
24 enum {
25 /* various global constants */
26 ATA_MAX_DEVICES = 2, /* per bus/port */
27 ATA_MAX_PRD = 256, /* we could make these 256/256 */
28 ATA_SECT_SIZE = 512,
29 ATA_MAX_SECTORS_128 = 128,
30 ATA_MAX_SECTORS = 256,
31 ATA_MAX_SECTORS_1024 = 1024,
32 ATA_MAX_SECTORS_LBA48 = 65535,/* avoid count to be 0000h */
33 ATA_MAX_SECTORS_TAPE = 65535,
34 ATA_MAX_TRIM_RNUM = 64, /* 512-byte payload / (6-byte LBA + 2-byte range per entry) */
35
36 ATA_ID_WORDS = 256,
37 ATA_ID_CONFIG = 0,
38 ATA_ID_CYLS = 1,
39 ATA_ID_HEADS = 3,
40 ATA_ID_SECTORS = 6,
41 ATA_ID_SERNO = 10,
42 ATA_ID_BUF_SIZE = 21,
43 ATA_ID_FW_REV = 23,
44 ATA_ID_PROD = 27,
45 ATA_ID_MAX_MULTSECT = 47,
46 ATA_ID_DWORD_IO = 48, /* before ATA-8 */
47 ATA_ID_TRUSTED = 48, /* ATA-8 and later */
48 ATA_ID_CAPABILITY = 49,
49 ATA_ID_OLD_PIO_MODES = 51,
50 ATA_ID_OLD_DMA_MODES = 52,
51 ATA_ID_FIELD_VALID = 53,
52 ATA_ID_CUR_CYLS = 54,
53 ATA_ID_CUR_HEADS = 55,
54 ATA_ID_CUR_SECTORS = 56,
55 ATA_ID_MULTSECT = 59,
56 ATA_ID_LBA_CAPACITY = 60,
57 ATA_ID_SWDMA_MODES = 62,
58 ATA_ID_MWDMA_MODES = 63,
59 ATA_ID_PIO_MODES = 64,
60 ATA_ID_EIDE_DMA_MIN = 65,
61 ATA_ID_EIDE_DMA_TIME = 66,
62 ATA_ID_EIDE_PIO = 67,
63 ATA_ID_EIDE_PIO_IORDY = 68,
64 ATA_ID_ADDITIONAL_SUPP = 69,
65 ATA_ID_QUEUE_DEPTH = 75,
66 ATA_ID_SATA_CAPABILITY = 76,
67 ATA_ID_SATA_CAPABILITY_2 = 77,
68 ATA_ID_FEATURE_SUPP = 78,
69 ATA_ID_MAJOR_VER = 80,
70 ATA_ID_COMMAND_SET_1 = 82,
71 ATA_ID_COMMAND_SET_2 = 83,
72 ATA_ID_CFSSE = 84,
73 ATA_ID_CFS_ENABLE_1 = 85,
74 ATA_ID_CFS_ENABLE_2 = 86,
75 ATA_ID_CSF_DEFAULT = 87,
76 ATA_ID_UDMA_MODES = 88,
77 ATA_ID_HW_CONFIG = 93,
78 ATA_ID_SPG = 98,
79 ATA_ID_LBA_CAPACITY_2 = 100,
80 ATA_ID_SECTOR_SIZE = 106,
81 ATA_ID_WWN = 108,
82 ATA_ID_LOGICAL_SECTOR_SIZE = 117, /* and 118 */
83 ATA_ID_COMMAND_SET_3 = 119,
84 ATA_ID_COMMAND_SET_4 = 120,
85 ATA_ID_LAST_LUN = 126,
86 ATA_ID_DLF = 128,
87 ATA_ID_CSFO = 129,
88 ATA_ID_CFA_POWER = 160,
89 ATA_ID_CFA_KEY_MGMT = 162,
90 ATA_ID_CFA_MODES = 163,
91 ATA_ID_DATA_SET_MGMT = 169,
92 ATA_ID_SCT_CMD_XPORT = 206,
93 ATA_ID_ROT_SPEED = 217,
94 ATA_ID_PIO4 = (1 << 1),
95
96 ATA_ID_SERNO_LEN = 20,
97 ATA_ID_FW_REV_LEN = 8,
98 ATA_ID_PROD_LEN = 40,
99 ATA_ID_WWN_LEN = 8,
100
101 ATA_PCI_CTL_OFS = 2,
102
103 ATA_PIO0 = (1 << 0),
104 ATA_PIO1 = ATA_PIO0 | (1 << 1),
105 ATA_PIO2 = ATA_PIO1 | (1 << 2),
106 ATA_PIO3 = ATA_PIO2 | (1 << 3),
107 ATA_PIO4 = ATA_PIO3 | (1 << 4),
108 ATA_PIO5 = ATA_PIO4 | (1 << 5),
109 ATA_PIO6 = ATA_PIO5 | (1 << 6),
110
111 ATA_PIO4_ONLY = (1 << 4),
112
113 ATA_SWDMA0 = (1 << 0),
114 ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1),
115 ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2),
116
117 ATA_SWDMA2_ONLY = (1 << 2),
118
119 ATA_MWDMA0 = (1 << 0),
120 ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1),
121 ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2),
122 ATA_MWDMA3 = ATA_MWDMA2 | (1 << 3),
123 ATA_MWDMA4 = ATA_MWDMA3 | (1 << 4),
124
125 ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2),
126 ATA_MWDMA2_ONLY = (1 << 2),
127
128 ATA_UDMA0 = (1 << 0),
129 ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
130 ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
131 ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
132 ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
133 ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
134 ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
135 ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
136 /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */
137
138 ATA_UDMA24_ONLY = (1 << 2) | (1 << 4),
139
140 ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */
141
142 /* DMA-related */
143 ATA_PRD_SZ = 8,
144 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
145 ATA_PRD_EOT = (1 << 31), /* end-of-table flag */
146
147 ATA_DMA_TABLE_OFS = 4,
148 ATA_DMA_STATUS = 2,
149 ATA_DMA_CMD = 0,
150 ATA_DMA_WR = (1 << 3),
151 ATA_DMA_START = (1 << 0),
152 ATA_DMA_INTR = (1 << 2),
153 ATA_DMA_ERR = (1 << 1),
154 ATA_DMA_ACTIVE = (1 << 0),
155
156 /* bits in ATA command block registers */
157 ATA_HOB = (1 << 7), /* LBA48 selector */
158 ATA_NIEN = (1 << 1), /* disable-irq flag */
159 ATA_LBA = (1 << 6), /* LBA28 selector */
160 ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
161 ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */
162 ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
163 ATA_BUSY = (1 << 7), /* BSY status bit */
164 ATA_DRDY = (1 << 6), /* device ready */
165 ATA_DF = (1 << 5), /* device fault */
166 ATA_DSC = (1 << 4), /* drive seek complete */
167 ATA_DRQ = (1 << 3), /* data request i/o */
168 ATA_CORR = (1 << 2), /* corrected data error */
169 ATA_SENSE = (1 << 1), /* sense code available */
170 ATA_ERR = (1 << 0), /* have an error */
171 ATA_SRST = (1 << 2), /* software reset */
172 ATA_ICRC = (1 << 7), /* interface CRC error */
173 ATA_BBK = ATA_ICRC, /* pre-EIDE: block marked bad */
174 ATA_UNC = (1 << 6), /* uncorrectable media error */
175 ATA_MC = (1 << 5), /* media changed */
176 ATA_IDNF = (1 << 4), /* ID not found */
177 ATA_MCR = (1 << 3), /* media change requested */
178 ATA_ABORTED = (1 << 2), /* command aborted */
179 ATA_TRK0NF = (1 << 1), /* track 0 not found */
180 ATA_AMNF = (1 << 0), /* address mark not found */
181 ATAPI_LFS = 0xF0, /* last failed sense */
182 ATAPI_EOM = ATA_TRK0NF, /* end of media */
183 ATAPI_ILI = ATA_AMNF, /* illegal length indication */
184 ATAPI_IO = (1 << 1),
185 ATAPI_COD = (1 << 0),
186
187 /* ATA command block registers */
188 ATA_REG_DATA = 0x00,
189 ATA_REG_ERR = 0x01,
190 ATA_REG_NSECT = 0x02,
191 ATA_REG_LBAL = 0x03,
192 ATA_REG_LBAM = 0x04,
193 ATA_REG_LBAH = 0x05,
194 ATA_REG_DEVICE = 0x06,
195 ATA_REG_STATUS = 0x07,
196
197 ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */
198 ATA_REG_CMD = ATA_REG_STATUS,
199 ATA_REG_BYTEL = ATA_REG_LBAM,
200 ATA_REG_BYTEH = ATA_REG_LBAH,
201 ATA_REG_DEVSEL = ATA_REG_DEVICE,
202 ATA_REG_IRQ = ATA_REG_NSECT,
203
204 /* ATA device commands */
205 ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */
206 ATA_CMD_CHK_POWER = 0xE5, /* check power mode */
207 ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */
208 ATA_CMD_IDLE = 0xE3, /* place in idle power mode */
209 ATA_CMD_EDD = 0x90, /* execute device diagnostic */
210 ATA_CMD_DOWNLOAD_MICRO = 0x92,
211 ATA_CMD_DOWNLOAD_MICRO_DMA = 0x93,
212 ATA_CMD_NOP = 0x00,
213 ATA_CMD_FLUSH = 0xE7,
214 ATA_CMD_FLUSH_EXT = 0xEA,
215 ATA_CMD_ID_ATA = 0xEC,
216 ATA_CMD_ID_ATAPI = 0xA1,
217 ATA_CMD_SERVICE = 0xA2,
218 ATA_CMD_READ = 0xC8,
219 ATA_CMD_READ_EXT = 0x25,
220 ATA_CMD_READ_QUEUED = 0x26,
221 ATA_CMD_READ_STREAM_EXT = 0x2B,
222 ATA_CMD_READ_STREAM_DMA_EXT = 0x2A,
223 ATA_CMD_WRITE = 0xCA,
224 ATA_CMD_WRITE_EXT = 0x35,
225 ATA_CMD_WRITE_QUEUED = 0x36,
226 ATA_CMD_WRITE_STREAM_EXT = 0x3B,
227 ATA_CMD_WRITE_STREAM_DMA_EXT = 0x3A,
228 ATA_CMD_WRITE_FUA_EXT = 0x3D,
229 ATA_CMD_WRITE_QUEUED_FUA_EXT = 0x3E,
230 ATA_CMD_FPDMA_READ = 0x60,
231 ATA_CMD_FPDMA_WRITE = 0x61,
232 ATA_CMD_NCQ_NON_DATA = 0x63,
233 ATA_CMD_FPDMA_SEND = 0x64,
234 ATA_CMD_FPDMA_RECV = 0x65,
235 ATA_CMD_PIO_READ = 0x20,
236 ATA_CMD_PIO_READ_EXT = 0x24,
237 ATA_CMD_PIO_WRITE = 0x30,
238 ATA_CMD_PIO_WRITE_EXT = 0x34,
239 ATA_CMD_READ_MULTI = 0xC4,
240 ATA_CMD_READ_MULTI_EXT = 0x29,
241 ATA_CMD_WRITE_MULTI = 0xC5,
242 ATA_CMD_WRITE_MULTI_EXT = 0x39,
243 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
244 ATA_CMD_SET_FEATURES = 0xEF,
245 ATA_CMD_SET_MULTI = 0xC6,
246 ATA_CMD_PACKET = 0xA0,
247 ATA_CMD_VERIFY = 0x40,
248 ATA_CMD_VERIFY_EXT = 0x42,
249 ATA_CMD_WRITE_UNCORR_EXT = 0x45,
250 ATA_CMD_STANDBYNOW1 = 0xE0,
251 ATA_CMD_IDLEIMMEDIATE = 0xE1,
252 ATA_CMD_SLEEP = 0xE6,
253 ATA_CMD_INIT_DEV_PARAMS = 0x91,
254 ATA_CMD_READ_NATIVE_MAX = 0xF8,
255 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
256 ATA_CMD_SET_MAX = 0xF9,
257 ATA_CMD_SET_MAX_EXT = 0x37,
258 ATA_CMD_READ_LOG_EXT = 0x2F,
259 ATA_CMD_WRITE_LOG_EXT = 0x3F,
260 ATA_CMD_READ_LOG_DMA_EXT = 0x47,
261 ATA_CMD_WRITE_LOG_DMA_EXT = 0x57,
262 ATA_CMD_TRUSTED_NONDATA = 0x5B,
263 ATA_CMD_TRUSTED_RCV = 0x5C,
264 ATA_CMD_TRUSTED_RCV_DMA = 0x5D,
265 ATA_CMD_TRUSTED_SND = 0x5E,
266 ATA_CMD_TRUSTED_SND_DMA = 0x5F,
267 ATA_CMD_PMP_READ = 0xE4,
268 ATA_CMD_PMP_READ_DMA = 0xE9,
269 ATA_CMD_PMP_WRITE = 0xE8,
270 ATA_CMD_PMP_WRITE_DMA = 0xEB,
271 ATA_CMD_CONF_OVERLAY = 0xB1,
272 ATA_CMD_SEC_SET_PASS = 0xF1,
273 ATA_CMD_SEC_UNLOCK = 0xF2,
274 ATA_CMD_SEC_ERASE_PREP = 0xF3,
275 ATA_CMD_SEC_ERASE_UNIT = 0xF4,
276 ATA_CMD_SEC_FREEZE_LOCK = 0xF5,
277 ATA_CMD_SEC_DISABLE_PASS = 0xF6,
278 ATA_CMD_CONFIG_STREAM = 0x51,
279 ATA_CMD_SMART = 0xB0,
280 ATA_CMD_MEDIA_LOCK = 0xDE,
281 ATA_CMD_MEDIA_UNLOCK = 0xDF,
282 ATA_CMD_DSM = 0x06,
283 ATA_CMD_CHK_MED_CRD_TYP = 0xD1,
284 ATA_CMD_CFA_REQ_EXT_ERR = 0x03,
285 ATA_CMD_CFA_WRITE_NE = 0x38,
286 ATA_CMD_CFA_TRANS_SECT = 0x87,
287 ATA_CMD_CFA_ERASE = 0xC0,
288 ATA_CMD_CFA_WRITE_MULT_NE = 0xCD,
289 ATA_CMD_REQ_SENSE_DATA = 0x0B,
290 ATA_CMD_SANITIZE_DEVICE = 0xB4,
291 ATA_CMD_ZAC_MGMT_IN = 0x4A,
292 ATA_CMD_ZAC_MGMT_OUT = 0x9F,
293
294 /* marked obsolete in the ATA/ATAPI-7 spec */
295 ATA_CMD_RESTORE = 0x10,
296
297 /* Subcmds for ATA_CMD_FPDMA_RECV */
298 ATA_SUBCMD_FPDMA_RECV_RD_LOG_DMA_EXT = 0x01,
299 ATA_SUBCMD_FPDMA_RECV_ZAC_MGMT_IN = 0x02,
300
301 /* Subcmds for ATA_CMD_FPDMA_SEND */
302 ATA_SUBCMD_FPDMA_SEND_DSM = 0x00,
303 ATA_SUBCMD_FPDMA_SEND_WR_LOG_DMA_EXT = 0x02,
304
305 /* Subcmds for ATA_CMD_NCQ_NON_DATA */
306 ATA_SUBCMD_NCQ_NON_DATA_ABORT_QUEUE = 0x00,
307 ATA_SUBCMD_NCQ_NON_DATA_SET_FEATURES = 0x05,
308 ATA_SUBCMD_NCQ_NON_DATA_ZERO_EXT = 0x06,
309 ATA_SUBCMD_NCQ_NON_DATA_ZAC_MGMT_OUT = 0x07,
310
311 /* Subcmds for ATA_CMD_ZAC_MGMT_IN */
312 ATA_SUBCMD_ZAC_MGMT_IN_REPORT_ZONES = 0x00,
313
314 /* Subcmds for ATA_CMD_ZAC_MGMT_OUT */
315 ATA_SUBCMD_ZAC_MGMT_OUT_CLOSE_ZONE = 0x01,
316 ATA_SUBCMD_ZAC_MGMT_OUT_FINISH_ZONE = 0x02,
317 ATA_SUBCMD_ZAC_MGMT_OUT_OPEN_ZONE = 0x03,
318 ATA_SUBCMD_ZAC_MGMT_OUT_RESET_WRITE_POINTER = 0x04,
319
320 /* READ_LOG_EXT pages */
321 ATA_LOG_DIRECTORY = 0x0,
322 ATA_LOG_SATA_NCQ = 0x10,
323 ATA_LOG_NCQ_NON_DATA = 0x12,
324 ATA_LOG_NCQ_SEND_RECV = 0x13,
325 ATA_LOG_CDL = 0x18,
326 ATA_LOG_CDL_SIZE = ATA_SECT_SIZE,
327 ATA_LOG_IDENTIFY_DEVICE = 0x30,
328 ATA_LOG_SENSE_NCQ = 0x0F,
329 ATA_LOG_SENSE_NCQ_SIZE = ATA_SECT_SIZE * 2,
330 ATA_LOG_CONCURRENT_POSITIONING_RANGES = 0x47,
331
332 /* Identify device log pages: */
333 ATA_LOG_SUPPORTED_CAPABILITIES = 0x03,
334 ATA_LOG_CURRENT_SETTINGS = 0x04,
335 ATA_LOG_SECURITY = 0x06,
336 ATA_LOG_SATA_SETTINGS = 0x08,
337 ATA_LOG_ZONED_INFORMATION = 0x09,
338
339 /* Identify device SATA settings log: */
340 ATA_LOG_DEVSLP_OFFSET = 0x30,
341 ATA_LOG_DEVSLP_SIZE = 0x08,
342 ATA_LOG_DEVSLP_MDAT = 0x00,
343 ATA_LOG_DEVSLP_MDAT_MASK = 0x1F,
344 ATA_LOG_DEVSLP_DETO = 0x01,
345 ATA_LOG_DEVSLP_VALID = 0x07,
346 ATA_LOG_DEVSLP_VALID_MASK = 0x80,
347 ATA_LOG_NCQ_PRIO_OFFSET = 0x09,
348
349 /* NCQ send and receive log */
350 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_OFFSET = 0x00,
351 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_DSM = (1 << 0),
352 ATA_LOG_NCQ_SEND_RECV_DSM_OFFSET = 0x04,
353 ATA_LOG_NCQ_SEND_RECV_DSM_TRIM = (1 << 0),
354 ATA_LOG_NCQ_SEND_RECV_RD_LOG_OFFSET = 0x08,
355 ATA_LOG_NCQ_SEND_RECV_RD_LOG_SUPPORTED = (1 << 0),
356 ATA_LOG_NCQ_SEND_RECV_WR_LOG_OFFSET = 0x0C,
357 ATA_LOG_NCQ_SEND_RECV_WR_LOG_SUPPORTED = (1 << 0),
358 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_OFFSET = 0x10,
359 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_OUT_SUPPORTED = (1 << 0),
360 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_IN_SUPPORTED = (1 << 1),
361 ATA_LOG_NCQ_SEND_RECV_SIZE = 0x14,
362
363 /* NCQ Non-Data log */
364 ATA_LOG_NCQ_NON_DATA_SUBCMDS_OFFSET = 0x00,
365 ATA_LOG_NCQ_NON_DATA_ABORT_OFFSET = 0x00,
366 ATA_LOG_NCQ_NON_DATA_ABORT_NCQ = (1 << 0),
367 ATA_LOG_NCQ_NON_DATA_ABORT_ALL = (1 << 1),
368 ATA_LOG_NCQ_NON_DATA_ABORT_STREAMING = (1 << 2),
369 ATA_LOG_NCQ_NON_DATA_ABORT_NON_STREAMING = (1 << 3),
370 ATA_LOG_NCQ_NON_DATA_ABORT_SELECTED = (1 << 4),
371 ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OFFSET = 0x1C,
372 ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OUT = (1 << 0),
373 ATA_LOG_NCQ_NON_DATA_SIZE = 0x40,
374
375 /* READ/WRITE LONG (obsolete) */
376 ATA_CMD_READ_LONG = 0x22,
377 ATA_CMD_READ_LONG_ONCE = 0x23,
378 ATA_CMD_WRITE_LONG = 0x32,
379 ATA_CMD_WRITE_LONG_ONCE = 0x33,
380
381 /* SETFEATURES stuff */
382 SETFEATURES_XFER = 0x03,
383 XFER_UDMA_7 = 0x47,
384 XFER_UDMA_6 = 0x46,
385 XFER_UDMA_5 = 0x45,
386 XFER_UDMA_4 = 0x44,
387 XFER_UDMA_3 = 0x43,
388 XFER_UDMA_2 = 0x42,
389 XFER_UDMA_1 = 0x41,
390 XFER_UDMA_0 = 0x40,
391 XFER_MW_DMA_4 = 0x24, /* CFA only */
392 XFER_MW_DMA_3 = 0x23, /* CFA only */
393 XFER_MW_DMA_2 = 0x22,
394 XFER_MW_DMA_1 = 0x21,
395 XFER_MW_DMA_0 = 0x20,
396 XFER_SW_DMA_2 = 0x12,
397 XFER_SW_DMA_1 = 0x11,
398 XFER_SW_DMA_0 = 0x10,
399 XFER_PIO_6 = 0x0E, /* CFA only */
400 XFER_PIO_5 = 0x0D, /* CFA only */
401 XFER_PIO_4 = 0x0C,
402 XFER_PIO_3 = 0x0B,
403 XFER_PIO_2 = 0x0A,
404 XFER_PIO_1 = 0x09,
405 XFER_PIO_0 = 0x08,
406 XFER_PIO_SLOW = 0x00,
407
408 SETFEATURES_WC_ON = 0x02, /* Enable write cache */
409 SETFEATURES_WC_OFF = 0x82, /* Disable write cache */
410
411 SETFEATURES_RA_ON = 0xaa, /* Enable read look-ahead */
412 SETFEATURES_RA_OFF = 0x55, /* Disable read look-ahead */
413
414 /* Enable/Disable Automatic Acoustic Management */
415 SETFEATURES_AAM_ON = 0x42,
416 SETFEATURES_AAM_OFF = 0xC2,
417
418 SETFEATURES_SPINUP = 0x07, /* Spin-up drive */
419 SETFEATURES_SPINUP_TIMEOUT = 30000, /* 30s timeout for drive spin-up from PUIS */
420
421 SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */
422 SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */
423
424 SETFEATURES_CDL = 0x0d, /* Enable/disable cmd duration limits */
425
426 /* SETFEATURE Sector counts for SATA features */
427 SATA_FPDMA_OFFSET = 0x01, /* FPDMA non-zero buffer offsets */
428 SATA_FPDMA_AA = 0x02, /* FPDMA Setup FIS Auto-Activate */
429 SATA_DIPM = 0x03, /* Device Initiated Power Management */
430 SATA_FPDMA_IN_ORDER = 0x04, /* FPDMA in-order data delivery */
431 SATA_AN = 0x05, /* Asynchronous Notification */
432 SATA_SSP = 0x06, /* Software Settings Preservation */
433 SATA_DEVSLP = 0x09, /* Device Sleep */
434
435 SETFEATURE_SENSE_DATA = 0xC3, /* Sense Data Reporting feature */
436 SETFEATURE_SENSE_DATA_SUCC_NCQ = 0xC4, /* Sense Data for successful NCQ commands */
437
438 /* feature values for SET_MAX */
439 ATA_SET_MAX_ADDR = 0x00,
440 ATA_SET_MAX_PASSWD = 0x01,
441 ATA_SET_MAX_LOCK = 0x02,
442 ATA_SET_MAX_UNLOCK = 0x03,
443 ATA_SET_MAX_FREEZE_LOCK = 0x04,
444 ATA_SET_MAX_PASSWD_DMA = 0x05,
445 ATA_SET_MAX_UNLOCK_DMA = 0x06,
446
447 /* feature values for DEVICE CONFIGURATION OVERLAY */
448 ATA_DCO_RESTORE = 0xC0,
449 ATA_DCO_FREEZE_LOCK = 0xC1,
450 ATA_DCO_IDENTIFY = 0xC2,
451 ATA_DCO_SET = 0xC3,
452
453 /* feature values for SMART */
454 ATA_SMART_ENABLE = 0xD8,
455 ATA_SMART_READ_VALUES = 0xD0,
456 ATA_SMART_READ_THRESHOLDS = 0xD1,
457
458 /* feature values for Data Set Management */
459 ATA_DSM_TRIM = 0x01,
460
461 /* password used in LBA Mid / LBA High for executing SMART commands */
462 ATA_SMART_LBAM_PASS = 0x4F,
463 ATA_SMART_LBAH_PASS = 0xC2,
464
465 /* ATAPI stuff */
466 ATAPI_PKT_DMA = (1 << 0),
467 ATAPI_DMADIR = (1 << 2), /* ATAPI data dir:
468 0=to device, 1=to host */
469 ATAPI_CDB_LEN = 16,
470
471 /* PMP stuff */
472 SATA_PMP_MAX_PORTS = 15,
473 SATA_PMP_CTRL_PORT = 15,
474
475 SATA_PMP_GSCR_DWORDS = 128,
476 SATA_PMP_GSCR_PROD_ID = 0,
477 SATA_PMP_GSCR_REV = 1,
478 SATA_PMP_GSCR_PORT_INFO = 2,
479 SATA_PMP_GSCR_ERROR = 32,
480 SATA_PMP_GSCR_ERROR_EN = 33,
481 SATA_PMP_GSCR_FEAT = 64,
482 SATA_PMP_GSCR_FEAT_EN = 96,
483
484 SATA_PMP_PSCR_STATUS = 0,
485 SATA_PMP_PSCR_ERROR = 1,
486 SATA_PMP_PSCR_CONTROL = 2,
487
488 SATA_PMP_FEAT_BIST = (1 << 0),
489 SATA_PMP_FEAT_PMREQ = (1 << 1),
490 SATA_PMP_FEAT_DYNSSC = (1 << 2),
491 SATA_PMP_FEAT_NOTIFY = (1 << 3),
492
493 /* cable types */
494 ATA_CBL_NONE = 0,
495 ATA_CBL_PATA40 = 1,
496 ATA_CBL_PATA80 = 2,
497 ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */
498 ATA_CBL_PATA_UNK = 4, /* don't know, maybe 80c? */
499 ATA_CBL_PATA_IGN = 5, /* don't know, ignore cable handling */
500 ATA_CBL_SATA = 6,
501
502 /* SATA Status and Control Registers */
503 SCR_STATUS = 0,
504 SCR_ERROR = 1,
505 SCR_CONTROL = 2,
506 SCR_ACTIVE = 3,
507 SCR_NOTIFICATION = 4,
508
509 /* SError bits */
510 SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */
511 SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */
512 SERR_DATA = (1 << 8), /* unrecovered data error */
513 SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */
514 SERR_PROTOCOL = (1 << 10), /* protocol violation */
515 SERR_INTERNAL = (1 << 11), /* host internal error */
516 SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */
517 SERR_PHY_INT_ERR = (1 << 17), /* PHY internal error */
518 SERR_COMM_WAKE = (1 << 18), /* Comm wake */
519 SERR_10B_8B_ERR = (1 << 19), /* 10b to 8b decode error */
520 SERR_DISPARITY = (1 << 20), /* Disparity */
521 SERR_CRC = (1 << 21), /* CRC error */
522 SERR_HANDSHAKE = (1 << 22), /* Handshake error */
523 SERR_LINK_SEQ_ERR = (1 << 23), /* Link sequence error */
524 SERR_TRANS_ST_ERROR = (1 << 24), /* Transport state trans. error */
525 SERR_UNRECOG_FIS = (1 << 25), /* Unrecognized FIS */
526 SERR_DEV_XCHG = (1 << 26), /* device exchanged */
527 };
528
529 enum ata_prot_flags {
530 /* protocol flags */
531 ATA_PROT_FLAG_PIO = (1 << 0), /* is PIO */
532 ATA_PROT_FLAG_DMA = (1 << 1), /* is DMA */
533 ATA_PROT_FLAG_NCQ = (1 << 2), /* is NCQ */
534 ATA_PROT_FLAG_ATAPI = (1 << 3), /* is ATAPI */
535
536 /* taskfile protocols */
537 ATA_PROT_UNKNOWN = (u8)-1,
538 ATA_PROT_NODATA = 0,
539 ATA_PROT_PIO = ATA_PROT_FLAG_PIO,
540 ATA_PROT_DMA = ATA_PROT_FLAG_DMA,
541 ATA_PROT_NCQ_NODATA = ATA_PROT_FLAG_NCQ,
542 ATA_PROT_NCQ = ATA_PROT_FLAG_DMA | ATA_PROT_FLAG_NCQ,
543 ATAPI_PROT_NODATA = ATA_PROT_FLAG_ATAPI,
544 ATAPI_PROT_PIO = ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_PIO,
545 ATAPI_PROT_DMA = ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_DMA,
546 };
547
548 enum ata_ioctls {
549 ATA_IOC_GET_IO32 = 0x309, /* HDIO_GET_32BIT */
550 ATA_IOC_SET_IO32 = 0x324, /* HDIO_SET_32BIT */
551 };
552
553 /* core structures */
554
555 struct ata_bmdma_prd {
556 __le32 addr;
557 __le32 flags_len;
558 };
559
560 /*
561 * id tests
562 */
563 #define ata_id_is_ata(id) (((id)[ATA_ID_CONFIG] & (1 << 15)) == 0)
564 #define ata_id_has_lba(id) ((id)[ATA_ID_CAPABILITY] & (1 << 9))
565 #define ata_id_has_dma(id) ((id)[ATA_ID_CAPABILITY] & (1 << 8))
566 #define ata_id_has_ncq(id) ((id)[ATA_ID_SATA_CAPABILITY] & (1 << 8))
567 #define ata_id_queue_depth(id) (((id)[ATA_ID_QUEUE_DEPTH] & 0x1f) + 1)
568 #define ata_id_removable(id) ((id)[ATA_ID_CONFIG] & (1 << 7))
569 #define ata_id_has_atapi_AN(id) \
570 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
571 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
572 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 5)))
573 #define ata_id_has_fpdma_aa(id) \
574 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
575 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
576 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 2)))
577 #define ata_id_has_devslp(id) \
578 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
579 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
580 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 8)))
581 #define ata_id_has_ncq_autosense(id) \
582 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
583 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
584 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 7)))
585 #define ata_id_has_dipm(id) \
586 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
587 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
588 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 3)))
589 #define ata_id_iordy_disable(id) ((id)[ATA_ID_CAPABILITY] & (1 << 10))
590 #define ata_id_has_iordy(id) ((id)[ATA_ID_CAPABILITY] & (1 << 11))
591 #define ata_id_u32(id,n) \
592 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
593 #define ata_id_u64(id,n) \
594 ( ((u64) (id)[(n) + 3] << 48) | \
595 ((u64) (id)[(n) + 2] << 32) | \
596 ((u64) (id)[(n) + 1] << 16) | \
597 ((u64) (id)[(n) + 0]) )
598
599 #define ata_id_cdb_intr(id) (((id)[ATA_ID_CONFIG] & 0x60) == 0x20)
600 #define ata_id_has_da(id) ((id)[ATA_ID_SATA_CAPABILITY_2] & (1 << 4))
601
602 static inline bool ata_id_has_hipm(const u16 *id)
603 {
604 u16 val = id[ATA_ID_SATA_CAPABILITY];
605
606 if (val == 0 || val == 0xffff)
607 return false;
608
609 return val & (1 << 9);
610 }
611
612 static inline bool ata_id_has_fua(const u16 *id)
613 {
614 if ((id[ATA_ID_CFSSE] & 0xC000) != 0x4000)
615 return false;
616 return id[ATA_ID_CFSSE] & (1 << 6);
617 }
618
619 static inline bool ata_id_has_flush(const u16 *id)
620 {
621 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
622 return false;
623 return id[ATA_ID_COMMAND_SET_2] & (1 << 12);
624 }
625
626 static inline bool ata_id_has_flush_ext(const u16 *id)
627 {
628 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
629 return false;
630 return id[ATA_ID_COMMAND_SET_2] & (1 << 13);
631 }
632
633 static inline u32 ata_id_logical_sector_size(const u16 *id)
634 {
635 /* T13/1699-D Revision 6a, Sep 6, 2008. Page 128.
636 * IDENTIFY DEVICE data, word 117-118.
637 * 0xd000 ignores bit 13 (logical:physical > 1)
638 */
639 if ((id[ATA_ID_SECTOR_SIZE] & 0xd000) == 0x5000)
640 return (((id[ATA_ID_LOGICAL_SECTOR_SIZE+1] << 16)
641 + id[ATA_ID_LOGICAL_SECTOR_SIZE]) * sizeof(u16)) ;
642 return ATA_SECT_SIZE;
643 }
644
645 static inline u8 ata_id_log2_per_physical_sector(const u16 *id)
646 {
647 /* T13/1699-D Revision 6a, Sep 6, 2008. Page 128.
648 * IDENTIFY DEVICE data, word 106.
649 * 0xe000 ignores bit 12 (logical sector > 512 bytes)
650 */
651 if ((id[ATA_ID_SECTOR_SIZE] & 0xe000) == 0x6000)
652 return (id[ATA_ID_SECTOR_SIZE] & 0xf);
653 return 0;
654 }
655
656 /* Offset of logical sectors relative to physical sectors.
657 *
658 * If device has more than one logical sector per physical sector
659 * (aka 512 byte emulation), vendors might offset the "sector 0" address
660 * so sector 63 is "naturally aligned" - e.g. FAT partition table.
661 * This avoids Read/Mod/Write penalties when using FAT partition table
662 * and updating "well aligned" (FS perspective) physical sectors on every
663 * transaction.
664 */
665 static inline u16 ata_id_logical_sector_offset(const u16 *id,
666 u8 log2_per_phys)
667 {
668 u16 word_209 = id[209];
669
670 if ((log2_per_phys > 1) && (word_209 & 0xc000) == 0x4000) {
671 u16 first = word_209 & 0x3fff;
672 if (first > 0)
673 return (1 << log2_per_phys) - first;
674 }
675 return 0;
676 }
677
678 static inline bool ata_id_has_lba48(const u16 *id)
679 {
680 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
681 return false;
682 if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2))
683 return false;
684 return id[ATA_ID_COMMAND_SET_2] & (1 << 10);
685 }
686
687 static inline bool ata_id_hpa_enabled(const u16 *id)
688 {
689 /* Yes children, word 83 valid bits cover word 82 data */
690 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
691 return false;
692 /* And 87 covers 85-87 */
693 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
694 return false;
695 /* Check command sets enabled as well as supported */
696 if ((id[ATA_ID_CFS_ENABLE_1] & (1 << 10)) == 0)
697 return false;
698 return id[ATA_ID_COMMAND_SET_1] & (1 << 10);
699 }
700
701 static inline bool ata_id_has_wcache(const u16 *id)
702 {
703 /* Yes children, word 83 valid bits cover word 82 data */
704 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
705 return false;
706 return id[ATA_ID_COMMAND_SET_1] & (1 << 5);
707 }
708
709 static inline bool ata_id_has_pm(const u16 *id)
710 {
711 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
712 return false;
713 return id[ATA_ID_COMMAND_SET_1] & (1 << 3);
714 }
715
716 static inline bool ata_id_rahead_enabled(const u16 *id)
717 {
718 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
719 return false;
720 return id[ATA_ID_CFS_ENABLE_1] & (1 << 6);
721 }
722
723 static inline bool ata_id_wcache_enabled(const u16 *id)
724 {
725 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
726 return false;
727 return id[ATA_ID_CFS_ENABLE_1] & (1 << 5);
728 }
729
730 static inline bool ata_id_has_read_log_dma_ext(const u16 *id)
731 {
732 /* Word 86 must have bit 15 set */
733 if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
734 return false;
735
736 /* READ LOG DMA EXT support can be signaled either from word 119
737 * or from word 120. The format is the same for both words: Bit
738 * 15 must be cleared, bit 14 set and bit 3 set.
739 */
740 if ((id[ATA_ID_COMMAND_SET_3] & 0xC008) == 0x4008 ||
741 (id[ATA_ID_COMMAND_SET_4] & 0xC008) == 0x4008)
742 return true;
743
744 return false;
745 }
746
747 static inline bool ata_id_has_sense_reporting(const u16 *id)
748 {
749 if (!(id[ATA_ID_CFS_ENABLE_2] & BIT(15)))
750 return false;
751 if ((id[ATA_ID_COMMAND_SET_3] & (BIT(15) | BIT(14))) != BIT(14))
752 return false;
753 return id[ATA_ID_COMMAND_SET_3] & BIT(6);
754 }
755
756 static inline bool ata_id_sense_reporting_enabled(const u16 *id)
757 {
758 if (!ata_id_has_sense_reporting(id))
759 return false;
760 /* ata_id_has_sense_reporting() == true, word 86 must have bit 15 set */
761 if ((id[ATA_ID_COMMAND_SET_4] & (BIT(15) | BIT(14))) != BIT(14))
762 return false;
763 return id[ATA_ID_COMMAND_SET_4] & BIT(6);
764 }
765
766 /**
767 *
768 * Word: 206 - SCT Command Transport
769 * 15:12 - Vendor Specific
770 * 11:6 - Reserved
771 * 5 - SCT Command Transport Data Tables supported
772 * 4 - SCT Command Transport Features Control supported
773 * 3 - SCT Command Transport Error Recovery Control supported
774 * 2 - SCT Command Transport Write Same supported
775 * 1 - SCT Command Transport Long Sector Access supported
776 * 0 - SCT Command Transport supported
777 */
778 static inline bool ata_id_sct_data_tables(const u16 *id)
779 {
780 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 5) ? true : false;
781 }
782
783 static inline bool ata_id_sct_features_ctrl(const u16 *id)
784 {
785 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 4) ? true : false;
786 }
787
788 static inline bool ata_id_sct_error_recovery_ctrl(const u16 *id)
789 {
790 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 3) ? true : false;
791 }
792
793 static inline bool ata_id_sct_long_sector_access(const u16 *id)
794 {
795 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 1) ? true : false;
796 }
797
798 static inline bool ata_id_sct_supported(const u16 *id)
799 {
800 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 0) ? true : false;
801 }
802
803 /**
804 * ata_id_major_version - get ATA level of drive
805 * @id: Identify data
806 *
807 * Caveats:
808 * ATA-1 considers identify optional
809 * ATA-2 introduces mandatory identify
810 * ATA-3 introduces word 80 and accurate reporting
811 *
812 * The practical impact of this is that ata_id_major_version cannot
813 * reliably report on drives below ATA3.
814 */
815
816 static inline unsigned int ata_id_major_version(const u16 *id)
817 {
818 unsigned int mver;
819
820 if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
821 return 0;
822
823 for (mver = 14; mver >= 1; mver--)
824 if (id[ATA_ID_MAJOR_VER] & (1 << mver))
825 break;
826 return mver;
827 }
828
829 static inline bool ata_id_is_sata(const u16 *id)
830 {
831 /*
832 * See if word 93 is 0 AND drive is at least ATA-5 compatible
833 * verifying that word 80 by casting it to a signed type --
834 * this trick allows us to filter out the reserved values of
835 * 0x0000 and 0xffff along with the earlier ATA revisions...
836 */
837 if (id[ATA_ID_HW_CONFIG] == 0 && (short)id[ATA_ID_MAJOR_VER] >= 0x0020)
838 return true;
839 return false;
840 }
841
842 static inline bool ata_id_has_tpm(const u16 *id)
843 {
844 /* The TPM bits are only valid on ATA8 */
845 if (ata_id_major_version(id) < 8)
846 return false;
847 if ((id[48] & 0xC000) != 0x4000)
848 return false;
849 return id[48] & (1 << 0);
850 }
851
852 static inline bool ata_id_has_dword_io(const u16 *id)
853 {
854 /* ATA 8 reuses this flag for "trusted" computing */
855 if (ata_id_major_version(id) > 7)
856 return false;
857 return id[ATA_ID_DWORD_IO] & (1 << 0);
858 }
859
860 static inline bool ata_id_has_trusted(const u16 *id)
861 {
862 if (ata_id_major_version(id) <= 7)
863 return false;
864 return id[ATA_ID_TRUSTED] & (1 << 0);
865 }
866
867 static inline bool ata_id_has_unload(const u16 *id)
868 {
869 if (ata_id_major_version(id) >= 7 &&
870 (id[ATA_ID_CFSSE] & 0xC000) == 0x4000 &&
871 id[ATA_ID_CFSSE] & (1 << 13))
872 return true;
873 return false;
874 }
875
876 static inline bool ata_id_has_wwn(const u16 *id)
877 {
878 return (id[ATA_ID_CSF_DEFAULT] & 0xC100) == 0x4100;
879 }
880
881 static inline int ata_id_form_factor(const u16 *id)
882 {
883 u16 val = id[168];
884
885 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
886 return 0;
887
888 val &= 0xf;
889
890 if (val > 5)
891 return 0;
892
893 return val;
894 }
895
896 static inline int ata_id_rotation_rate(const u16 *id)
897 {
898 u16 val = id[217];
899
900 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
901 return 0;
902
903 if (val > 1 && val < 0x401)
904 return 0;
905
906 return val;
907 }
908
909 static inline bool ata_id_has_ncq_send_and_recv(const u16 *id)
910 {
911 return id[ATA_ID_SATA_CAPABILITY_2] & BIT(6);
912 }
913
914 static inline bool ata_id_has_ncq_non_data(const u16 *id)
915 {
916 return id[ATA_ID_SATA_CAPABILITY_2] & BIT(5);
917 }
918
919 static inline bool ata_id_has_ncq_prio(const u16 *id)
920 {
921 return id[ATA_ID_SATA_CAPABILITY] & BIT(12);
922 }
923
924 static inline bool ata_id_has_trim(const u16 *id)
925 {
926 if (ata_id_major_version(id) >= 7 &&
927 (id[ATA_ID_DATA_SET_MGMT] & 1))
928 return true;
929 return false;
930 }
931
932 static inline bool ata_id_has_zero_after_trim(const u16 *id)
933 {
934 /* DSM supported, deterministic read, and read zero after trim set */
935 if (ata_id_has_trim(id) &&
936 (id[ATA_ID_ADDITIONAL_SUPP] & 0x4020) == 0x4020)
937 return true;
938
939 return false;
940 }
941
942 static inline bool ata_id_current_chs_valid(const u16 *id)
943 {
944 /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
945 has not been issued to the device then the values of
946 id[ATA_ID_CUR_CYLS] to id[ATA_ID_CUR_SECTORS] are vendor specific. */
947 return (id[ATA_ID_FIELD_VALID] & 1) && /* Current translation valid */
948 id[ATA_ID_CUR_CYLS] && /* cylinders in current translation */
949 id[ATA_ID_CUR_HEADS] && /* heads in current translation */
950 id[ATA_ID_CUR_HEADS] <= 16 &&
951 id[ATA_ID_CUR_SECTORS]; /* sectors in current translation */
952 }
953
954 static inline bool ata_id_is_cfa(const u16 *id)
955 {
956 if ((id[ATA_ID_CONFIG] == 0x848A) || /* Traditional CF */
957 (id[ATA_ID_CONFIG] == 0x844A)) /* Delkin Devices CF */
958 return true;
959 /*
960 * CF specs don't require specific value in the word 0 anymore and yet
961 * they forbid to report the ATA version in the word 80 and require the
962 * CFA feature set support to be indicated in the word 83 in this case.
963 * Unfortunately, some cards only follow either of this requirements,
964 * and while those that don't indicate CFA feature support need some
965 * sort of quirk list, it seems impractical for the ones that do...
966 */
967 return (id[ATA_ID_COMMAND_SET_2] & 0xC004) == 0x4004;
968 }
969
970 static inline bool ata_id_is_ssd(const u16 *id)
971 {
972 return id[ATA_ID_ROT_SPEED] == 0x01;
973 }
974
975 static inline u8 ata_id_zoned_cap(const u16 *id)
976 {
977 return (id[ATA_ID_ADDITIONAL_SUPP] & 0x3);
978 }
979
980 static inline bool ata_id_pio_need_iordy(const u16 *id, const u8 pio)
981 {
982 /* CF spec. r4.1 Table 22 says no IORDY on PIO5 and PIO6. */
983 if (pio > 4 && ata_id_is_cfa(id))
984 return false;
985 /* For PIO3 and higher it is mandatory. */
986 if (pio > 2)
987 return true;
988 /* Turn it on when possible. */
989 return ata_id_has_iordy(id);
990 }
991
992 static inline bool ata_drive_40wire(const u16 *dev_id)
993 {
994 if (ata_id_is_sata(dev_id))
995 return false; /* SATA */
996 if ((dev_id[ATA_ID_HW_CONFIG] & 0xE000) == 0x6000)
997 return false; /* 80 wire */
998 return true;
999 }
1000
1001 static inline bool ata_drive_40wire_relaxed(const u16 *dev_id)
1002 {
1003 if ((dev_id[ATA_ID_HW_CONFIG] & 0x2000) == 0x2000)
1004 return false; /* 80 wire */
1005 return true;
1006 }
1007
1008 static inline int atapi_cdb_len(const u16 *dev_id)
1009 {
1010 u16 tmp = dev_id[ATA_ID_CONFIG] & 0x3;
1011 switch (tmp) {
1012 case 0: return 12;
1013 case 1: return 16;
1014 default: return -1;
1015 }
1016 }
1017
1018 static inline int atapi_command_packet_set(const u16 *dev_id)
1019 {
1020 return (dev_id[ATA_ID_CONFIG] >> 8) & 0x1f;
1021 }
1022
1023 static inline bool atapi_id_dmadir(const u16 *dev_id)
1024 {
1025 return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
1026 }
1027
1028 static inline bool ata_ok(u8 status)
1029 {
1030 return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
1031 == ATA_DRDY);
1032 }
1033
1034 static inline bool lba_28_ok(u64 block, u32 n_block)
1035 {
1036 /* check the ending block number: must be LESS THAN 0x0fffffff */
1037 return ((block + n_block) < ((1 << 28) - 1)) && (n_block <= ATA_MAX_SECTORS);
1038 }
1039
1040 static inline bool lba_48_ok(u64 block, u32 n_block)
1041 {
1042 /* check the ending block number */
1043 return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= ATA_MAX_SECTORS_LBA48);
1044 }
1045
1046 #define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
1047 #define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
1048 #define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
1049 #define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
1050
1051 #endif /* __LINUX_ATA_H__ */
Kernel DRM miscellaneous fixes and cross-tree changes