drm/panel-edp: Add STA 116QHD024002
[drm/drm-misc.git] / include / linux / memregion.h
blobc013214677897ad5843a7345dd4271a487627ddb
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _MEMREGION_H_
3 #define _MEMREGION_H_
4 #include <linux/types.h>
5 #include <linux/errno.h>
6 #include <linux/range.h>
7 #include <linux/bug.h>
9 struct memregion_info {
10 int target_node;
11 struct range range;
14 #ifdef CONFIG_MEMREGION
15 int memregion_alloc(gfp_t gfp);
16 void memregion_free(int id);
17 #else
18 static inline int memregion_alloc(gfp_t gfp)
20 return -ENOMEM;
22 static inline void memregion_free(int id)
25 #endif
27 /**
28 * cpu_cache_invalidate_memregion - drop any CPU cached data for
29 * memregions described by @res_desc
30 * @res_desc: one of the IORES_DESC_* types
32 * Perform cache maintenance after a memory event / operation that
33 * changes the contents of physical memory in a cache-incoherent manner.
34 * For example, device memory technologies like NVDIMM and CXL have
35 * device secure erase, and dynamic region provision that can replace
36 * the memory mapped to a given physical address.
38 * Limit the functionality to architectures that have an efficient way
39 * to writeback and invalidate potentially terabytes of address space at
40 * once. Note that this routine may or may not write back any dirty
41 * contents while performing the invalidation. It is only exported for
42 * the explicit usage of the NVDIMM and CXL modules in the 'DEVMEM'
43 * symbol namespace on bare platforms.
45 * Returns 0 on success or negative error code on a failure to perform
46 * the cache maintenance.
48 #ifdef CONFIG_ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION
49 int cpu_cache_invalidate_memregion(int res_desc);
50 bool cpu_cache_has_invalidate_memregion(void);
51 #else
52 static inline bool cpu_cache_has_invalidate_memregion(void)
54 return false;
57 static inline int cpu_cache_invalidate_memregion(int res_desc)
59 WARN_ON_ONCE("CPU cache invalidation required");
60 return -ENXIO;
62 #endif
63 #endif /* _MEMREGION_H_ */