include/linux/platform_data/pxa_sdhci.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * include/linux/platform_data/pxa_sdhci.h
   4  *
   5  * Copyright 2010 Marvell
   6  *      Zhangfei Gao <zhangfei.gao@marvell.com>
   7  *
   8  * PXA Platform - SDHCI platform data definitions
   9  */
  10
  11 #ifndef _PXA_SDHCI_H_
  12 #define _PXA_SDHCI_H_
  13
  14 /* pxa specific flag */
  15 /* Require clock free running */
  16 #define PXA_FLAG_ENABLE_CLOCK_GATING (1<<0)
  17 /* card always wired to host, like on-chip emmc */
  18 #define PXA_FLAG_CARD_PERMANENT (1<<1)
  19 /* Board design supports 8-bit data on SD/SDIO BUS */
  20 #define PXA_FLAG_SD_8_BIT_CAPABLE_SLOT (1<<2)
  21
  22 /*
  23  * struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI
  24  * @flags: flags for platform requirement
  25  * @clk_delay_cycles:
  26  *      mmp2: each step is roughly 100ps, 5bits width
  27  *      pxa910: each step is 1ns, 4bits width
  28  * @clk_delay_sel: select clk_delay, used on pxa910
  29  *      0: choose feedback clk
  30  *      1: choose feedback clk + delay value
  31  *      2: choose internal clk
  32  * @clk_delay_enable: enable clk_delay or not, used on pxa910
  33  * @max_speed: the maximum speed supported
  34  * @host_caps: Standard MMC host capabilities bit field.
  35  * @quirks: quirks of platfrom
  36  * @quirks2: quirks2 of platfrom
  37  * @pm_caps: pm_caps of platfrom
  38  */
  39 struct sdhci_pxa_platdata {
  40         unsigned int    flags;
  41         unsigned int    clk_delay_cycles;
  42         unsigned int    clk_delay_sel;
  43         bool            clk_delay_enable;
  44         unsigned int    max_speed;
  45         u32             host_caps;
  46         u32             host_caps2;
  47         unsigned int    quirks;
  48         unsigned int    quirks2;
  49         unsigned int    pm_caps;
  50 };
  51 #endif /* _PXA_SDHCI_H_ */