include/xen/interface/hvm/params.h

   1 /* SPDX-License-Identifier: MIT */
   2
   3 #ifndef __XEN_PUBLIC_HVM_PARAMS_H__
   4 #define __XEN_PUBLIC_HVM_PARAMS_H__
   5
   6 #include <xen/interface/hvm/hvm_op.h>
   7
   8 /*
   9  * Parameter space for HVMOP_{set,get}_param.
  10  */
  11
  12 #define HVM_PARAM_CALLBACK_IRQ 0
  13 /*
  14  * How should CPU0 event-channel notifications be delivered?
  15  *
  16  * If val == 0 then CPU0 event-channel notifications are not delivered.
  17  * If val != 0, val[63:56] encodes the type, as follows:
  18  */
  19
  20 #define HVM_PARAM_CALLBACK_TYPE_GSI      0
  21 /*
  22  * val[55:0] is a delivery GSI.  GSI 0 cannot be used, as it aliases val == 0,
  23  * and disables all notifications.
  24  */
  25
  26 #define HVM_PARAM_CALLBACK_TYPE_PCI_INTX 1
  27 /*
  28  * val[55:0] is a delivery PCI INTx line:
  29  * Domain = val[47:32], Bus = val[31:16] DevFn = val[15:8], IntX = val[1:0]
  30  */
  31
  32 #if defined(__i386__) || defined(__x86_64__)
  33 #define HVM_PARAM_CALLBACK_TYPE_VECTOR   2
  34 /*
  35  * val[7:0] is a vector number.  Check for XENFEAT_hvm_callback_vector to know
  36  * if this delivery method is available.
  37  */
  38 #elif defined(__arm__) || defined(__aarch64__)
  39 #define HVM_PARAM_CALLBACK_TYPE_PPI      2
  40 /*
  41  * val[55:16] needs to be zero.
  42  * val[15:8] is interrupt flag of the PPI used by event-channel:
  43  *  bit 8: the PPI is edge(1) or level(0) triggered
  44  *  bit 9: the PPI is active low(1) or high(0)
  45  * val[7:0] is a PPI number used by event-channel.
  46  * This is only used by ARM/ARM64 and masking/eoi the interrupt associated to
  47  * the notification is handled by the interrupt controller.
  48  */
  49 #endif
  50
  51 #define HVM_PARAM_STORE_PFN    1
  52 #define HVM_PARAM_STORE_EVTCHN 2
  53
  54 #define HVM_PARAM_PAE_ENABLED  4
  55
  56 #define HVM_PARAM_IOREQ_PFN    5
  57
  58 #define HVM_PARAM_BUFIOREQ_PFN 6
  59
  60 /*
  61  * Set mode for virtual timers (currently x86 only):
  62  *  delay_for_missed_ticks (default):
  63  *   Do not advance a vcpu's time beyond the correct delivery time for
  64  *   interrupts that have been missed due to preemption. Deliver missed
  65  *   interrupts when the vcpu is rescheduled and advance the vcpu's virtual
  66  *   time stepwise for each one.
  67  *  no_delay_for_missed_ticks:
  68  *   As above, missed interrupts are delivered, but guest time always tracks
  69  *   wallclock (i.e., real) time while doing so.
  70  *  no_missed_ticks_pending:
  71  *   No missed interrupts are held pending. Instead, to ensure ticks are
  72  *   delivered at some non-zero rate, if we detect missed ticks then the
  73  *   internal tick alarm is not disabled if the VCPU is preempted during the
  74  *   next tick period.
  75  *  one_missed_tick_pending:
  76  *   Missed interrupts are collapsed together and delivered as one 'late tick'.
  77  *   Guest time always tracks wallclock (i.e., real) time.
  78  */
  79 #define HVM_PARAM_TIMER_MODE   10
  80 #define HVMPTM_delay_for_missed_ticks    0
  81 #define HVMPTM_no_delay_for_missed_ticks 1
  82 #define HVMPTM_no_missed_ticks_pending   2
  83 #define HVMPTM_one_missed_tick_pending   3
  84
  85 /* Boolean: Enable virtual HPET (high-precision event timer)? (x86-only) */
  86 #define HVM_PARAM_HPET_ENABLED 11
  87
  88 /* Identity-map page directory used by Intel EPT when CR0.PG=0. */
  89 #define HVM_PARAM_IDENT_PT     12
  90
  91 /* Device Model domain, defaults to 0. */
  92 #define HVM_PARAM_DM_DOMAIN    13
  93
  94 /* ACPI S state: currently support S0 and S3 on x86. */
  95 #define HVM_PARAM_ACPI_S_STATE 14
  96
  97 /* TSS used on Intel when CR0.PE=0. */
  98 #define HVM_PARAM_VM86_TSS     15
  99
 100 /* Boolean: Enable aligning all periodic vpts to reduce interrupts */
 101 #define HVM_PARAM_VPT_ALIGN    16
 102
 103 /* Console debug shared memory ring and event channel */
 104 #define HVM_PARAM_CONSOLE_PFN    17
 105 #define HVM_PARAM_CONSOLE_EVTCHN 18
 106
 107 #define HVM_NR_PARAMS          19
 108
 109 #endif /* __XEN_PUBLIC_HVM_PARAMS_H__ */