tools/perf/arch/x86/util/evsel.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include <stdio.h>
   3 #include <stdlib.h>
   4 #include "util/evsel.h"
   5 #include "util/env.h"
   6 #include "util/pmu.h"
   7 #include "util/pmus.h"
   8 #include "linux/string.h"
   9 #include "topdown.h"
  10 #include "evsel.h"
  11 #include "util/debug.h"
  12 #include "env.h"
  13
  14 #define IBS_FETCH_L3MISSONLY   (1ULL << 59)
  15 #define IBS_OP_L3MISSONLY      (1ULL << 16)
  16
  17 void arch_evsel__set_sample_weight(struct evsel *evsel)
  18 {
  19         evsel__set_sample_bit(evsel, WEIGHT_STRUCT);
  20 }
  21
  22 /* Check whether the evsel's PMU supports the perf metrics */
  23 bool evsel__sys_has_perf_metrics(const struct evsel *evsel)
  24 {
  25         struct perf_pmu *pmu;
  26         u32 type = evsel->core.attr.type;
  27
  28         /*
  29          * The PERF_TYPE_RAW type is the core PMU type, e.g., "cpu" PMU
  30          * on a non-hybrid machine, "cpu_core" PMU on a hybrid machine.
  31          * The slots event is only available for the core PMU, which
  32          * supports the perf metrics feature.
  33          * Checking both the PERF_TYPE_RAW type and the slots event
  34          * should be good enough to detect the perf metrics feature.
  35          */
  36 again:
  37         switch (type) {
  38         case PERF_TYPE_HARDWARE:
  39         case PERF_TYPE_HW_CACHE:
  40                 type = evsel->core.attr.config >> PERF_PMU_TYPE_SHIFT;
  41                 if (type)
  42                         goto again;
  43                 break;
  44         case PERF_TYPE_RAW:
  45                 break;
  46         default:
  47                 return false;
  48         }
  49
  50         pmu = evsel->pmu;
  51         if (pmu && perf_pmu__is_fake(pmu))
  52                 pmu = NULL;
  53
  54         if (!pmu) {
  55                 while ((pmu = perf_pmus__scan_core(pmu)) != NULL) {
  56                         if (pmu->type == PERF_TYPE_RAW)
  57                                 break;
  58                 }
  59         }
  60         return pmu && perf_pmu__have_event(pmu, "slots");
  61 }
  62
  63 bool arch_evsel__must_be_in_group(const struct evsel *evsel)
  64 {
  65         if (!evsel__sys_has_perf_metrics(evsel) || !evsel->name ||
  66             strcasestr(evsel->name, "uops_retired.slots"))
  67                 return false;
  68
  69         return arch_is_topdown_metrics(evsel) || arch_is_topdown_slots(evsel);
  70 }
  71
  72 int arch_evsel__hw_name(struct evsel *evsel, char *bf, size_t size)
  73 {
  74         u64 event = evsel->core.attr.config & PERF_HW_EVENT_MASK;
  75         u64 pmu = evsel->core.attr.config >> PERF_PMU_TYPE_SHIFT;
  76         const char *event_name;
  77
  78         if (event < PERF_COUNT_HW_MAX && evsel__hw_names[event])
  79                 event_name = evsel__hw_names[event];
  80         else
  81                 event_name = "unknown-hardware";
  82
  83         /* The PMU type is not required for the non-hybrid platform. */
  84         if (!pmu)
  85                 return  scnprintf(bf, size, "%s", event_name);
  86
  87         return scnprintf(bf, size, "%s/%s/",
  88                          evsel->pmu ? evsel->pmu->name : "cpu",
  89                          event_name);
  90 }
  91
  92 static void ibs_l3miss_warn(void)
  93 {
  94         pr_warning(
  95 "WARNING: Hw internally resets sampling period when L3 Miss Filtering is enabled\n"
  96 "and tagged operation does not cause L3 Miss. This causes sampling period skew.\n");
  97 }
  98
  99 void arch__post_evsel_config(struct evsel *evsel, struct perf_event_attr *attr)
 100 {
 101         struct perf_pmu *evsel_pmu, *ibs_fetch_pmu, *ibs_op_pmu;
 102         static int warned_once;
 103
 104         if (warned_once || !x86__is_amd_cpu())
 105                 return;
 106
 107         evsel_pmu = evsel__find_pmu(evsel);
 108         if (!evsel_pmu)
 109                 return;
 110
 111         ibs_fetch_pmu = perf_pmus__find("ibs_fetch");
 112         ibs_op_pmu = perf_pmus__find("ibs_op");
 113
 114         if (ibs_fetch_pmu && ibs_fetch_pmu->type == evsel_pmu->type) {
 115                 if (attr->config & IBS_FETCH_L3MISSONLY) {
 116                         ibs_l3miss_warn();
 117                         warned_once = 1;
 118                 }
 119         } else if (ibs_op_pmu && ibs_op_pmu->type == evsel_pmu->type) {
 120                 if (attr->config & IBS_OP_L3MISSONLY) {
 121                         ibs_l3miss_warn();
 122                         warned_once = 1;
 123                 }
 124         }
 125 }
 126
 127 int arch_evsel__open_strerror(struct evsel *evsel, char *msg, size_t size)
 128 {
 129         if (!x86__is_amd_cpu())
 130                 return 0;
 131
 132         if (!evsel->core.attr.precise_ip &&
 133             !(evsel->pmu && !strncmp(evsel->pmu->name, "ibs", 3)))
 134                 return 0;
 135
 136         /* More verbose IBS errors. */
 137         if (evsel->core.attr.exclude_kernel || evsel->core.attr.exclude_user ||
 138             evsel->core.attr.exclude_hv || evsel->core.attr.exclude_idle ||
 139             evsel->core.attr.exclude_host || evsel->core.attr.exclude_guest) {
 140                 return scnprintf(msg, size, "AMD IBS doesn't support privilege filtering. Try "
 141                                  "again without the privilege modifiers (like 'k') at the end.");
 142         }
 143
 144         return 0;
 145 }